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Highly integrated 2D ultrasonic arrays and electronics for modular large apertures
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Highly integrated 2D ultrasonic arrays and electronics for modular large apertures
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1
HIGHLY INTEGRATED 2D ULTRASONIC ARRAYS
AND
ELECTRONICS FOR MODULAR LARGE APERTURES
by
Robert Wodnicki
A Dissertation Presented to the
FACULTY OF THE USC GRADUATE SCHOOL
UNIVERSITY OF SOUTHERN CALIFORNIA
In Partial Fulfillment of the
Requirements for the Degree
DOCTOR OF PHILOSOPHY
(BIOMEDICAL ENGINEERING)
August 2020
Copyright © 2020 Robert Wodnicki
ii
DEDICATION
For my family
iii
ACKNOWLEDGEMENTS
A project of this magnitude requires significant resources and time and effort by a team of
researchers and I wish to acknowledge their help.
Foremost, I wish to thank my advisor Prof. Qifa Zhou for his unwavering support
throughout my entire course of study here at USC. His boundless energy and enthusiasm have
been a continuous source of inspiration in my work and studies. I would also like to acknowledge
the help and support of our department chair Prof. Kirk Shung, as well as Prof. Jesse Yen in the
Biomedical Engineering department.
I owe a tremendous debt of gratitude to our Principal Investigator Prof. Kathy Ferrara of
Stanford University for her continued support and encouragement of our efforts. Without Prof.
Ferrara’s vision and leadership, the work described here would not have been possible.
At UC Davis I enjoyed great and very productive interactions with Doug Stephens, Yu Liu,
Josquin Foiret, Victoria Chiu, and Rui Zhang. Their early and strong support of my work is greatly
appreciated.
Over the years of my work in the Ultrasound lab at USC I have had the great privilege to
work with a large group of extremely talented doctoral students and researchers. They have
supported and had direct contributions to many of the results described in this thesis and I am
forever grateful for the time and effort which they have dedicated to this work.
In particular, I wish to acknowledge Nestor Cabrera-Munoz, Chi-Tat (Harry) Chiu, and
Ruimin Chen for their unflappable support of all of my transducer fabrication ideas. I am forever
indebted to the continuous and intense collaboration with Haochen Kang who has been both a
great researcher and great friend throughout the many years of this project. Hayong Jung and Di
iv
Li both made very significant contributions to the design of the ASICs described in this thesis.
Thomas Cummins taught me the intricacies of high frequency array fabrication. Zeyu Chen, Yizhe
Sun, Laiming Jiang, and Jayesh Adhikari all made very significant and persistent contributions to
the fabrication of the acoustic arrays, and I am very grateful for their time, patience and dedication
in this regard.
Last but not least, I would like to acknowledge the love and support of my family and
friends, without whom this work would not be possible.
v
TABLE OF CONTENTS
DEDICATION ............................................................................................................................. ii
ACKNOWLEDGEMENTS ....................................................................................................... iii
LIST OF TABLES ..................................................................................................................... vii
LIST OF FIGURES .................................................................................................................. viii
ABSTRACT .................................................................................................................................. x
INTRODUCTION ............................................................................................... 1
MULTIPLEXED 2D AND 1.75D ARRAYS .......................................................................................... 2
LARGE 2D ARRAYS FOR HEPATOCELLULAR CARCINOMA ......................................................... 5
PROPOSED MODULAR LARGE APERTURE ARRAY FOR LIVER CANCER ................................... 9
MULTI-DIMENSIONAL TRANSDUCER ARRAYS ............................................................................. 12
IMPLEMENTATION OF LARGE 2D ARRAY APERTURES ................................................................. 14
MODULAR LARGE APERTURE 2D ARRAY ARCHITECTURE IMPLEMENTATION ...................... 17
THESIS OVERVIEW .............................................................................................................................. 20
ASIC ARCHITECTURE .................................................................................... 23
2.1 ASIC OVERVIEW ................................................................................................................................. 24
FIRST-GENERATION ASIC (ASIC-1) DESIGN AND FABRICATION .......................................... 26
2.1.1 Unit Cell Architecture ............................................................................................... 28
2.1.2 Switch Operation ...................................................................................................... 32
2.1.3 Preamplifier .............................................................................................................. 36
2.1.4 Integration with Ultrasound System ......................................................................... 40
LOW CHARGE-INJECTION SWITCHING ASIC (ASIC-2) ............................................................ 41
ELECTRIC MODULE VALIDATION .................................................................................................... 43
CONCLUSIONS ...................................................................................................................................... 45
DIRECT ASSEMBLY PROTOTYPE ............................................................. 46
INTRODUCTION .................................................................................................................................... 46
MODULAR DIRECT ASSEMBLY ARRAY CONCEPT ....................................................................... 49
ACOUSTIC STACK-UP ......................................................................................................................... 53
PROCESS FLOW .................................................................................................................................... 53
COMPOSITE ........................................................................................................................................... 54
COMPOSITE THICKNESS AND MATCHING LAYER DESIGN ........................................................ 59
FABRICATION ....................................................................................................................................... 63
INTERPOSER BACKING ........................................................................................................................ 65
COMPOSITE, AND MATCHING LAYERS ........................................................................................... 67
ASSEMBLY TO ASIC ........................................................................................................................... 70
RESULTS ................................................................................................................................................ 75
3.11.1 Acoustic Stack Evaluation ..................................................................................... 75
vi
3.11.2 Test Setup and Electrical Interface ....................................................................... 77
3.11.3 Pulse-echo Testing ................................................................................................ 78
3.11.4 Imaging ................................................................................................................. 80
CONCLUSIONS ...................................................................................................................................... 83
ADJACENT ASSEMBLY PROTOTYPE ....................................................... 84
INTRODUCTION .................................................................................................................................... 84
MOTIVATION FOR INTERPOSER BACKING WITH PCB ................................................................ 86
ACOUSTIC MODULE FABRICATION ................................................................................................. 94
ASIC MODULE PCB ........................................................................................................................ 103
ASSEMBLY OF ACOUSTIC MODULE TO THE ASIC MODULE .................................................. 104
IMPROVING YIELD AND RELIABILITY OF ASSEMBLY ................................................................. 106
4.6.1 Sensor assembly for 2D arrays ............................................................................... 107
4.6.2 Increasing yield of assembly connections ............................................................... 109
ACOUSTIC RESULTS FOR THE ASSEMBLED MODULE ................................................................. 114
SINGLE MODULE IMAGING RESULTS ........................................................................................... 116
MULTIPLE MODULE IMAGE RESULTS .......................................................................................... 122
IMPROVEMENT IN CHARGE-INJECTION INDUCED IMAGE ARTIFACT .................................... 132
CONCLUSIONS .................................................................................................................................... 133
SUMMARY ....................................................................................................... 135
SUMMARY OF RESULTS TO DATE .................................................................................................. 135
LIMITATIONS AND FUTURE WORK ................................................................................................ 139
BIBLIOGRAPHY ..................................................................................................................... 141
vii
LIST OF TABLES
Table 2-1: Specifications of the Interface ASIC ........................................................................... 27
Table 2-2: Small signal model parameters .................................................................................... 38
Table 3-1: Modular 2D Array Design parameters ........................................................................ 50
Table 3-2: Composite bulk material parameters ........................................................................... 57
Table 3-3: Acoustic and design parameters .................................................................................. 58
Table 3-4: Material properties for the fabricated array ................................................................. 72
Table 3-5: Measured acoustic results for the fabricated array modules ....................................... 76
Table 4-1: 2D Array Backing Type Trade-Off ............................................................................. 89
Table 4-2: 2D Array Module acoustic materials ........................................................................... 96
Table 4-3: Array design details ................................................................................................... 100
Table 4-4: Summary of performance data for large array module ............................................. 121
viii
LIST OF FIGURES
Figure 1-1. Clinical applications of volumetric imaging arrays. .................................................... 2
Figure 1-2. Ultrasound Localization Microscopy (ULM) image obtained for rat liver. ................. 3
Figure 1-3. Hepatocellular carcinoma disease process ................................................................... 5
Figure 1-4. Liver cancer detection by ultrasound scanning ............................................................ 6
Figure 1-5. Mechanically swept large area synthetic aperture. ...................................................... 8
Figure 1-6. Illustration of different types of 2D arrays. ................................................................ 10
Figure 1-7. Benefits of a 1.5D probe highly focused in the elevational dimension. .................... 11
Figure 1-8. Cross-section of construction of large 2D ultrasound transducer arrays. .................. 13
Figure 1-9. Illustration of the prototype large modular array concept. ......................................... 17
Figure 1-10. Illustration of the modular array and ASIC interface electronics. ........................... 18
Figure 2-1. ASIC-1 photomicrograph ........................................................................................... 25
Figure 2-2. Schematic of the unit cell circuitry for the ASIC-1 device. ....................................... 28
Figure 2-3. Timing diagram for operation of the unit cell circuitry of Figure 2-2. ...................... 29
Figure 2-4. Basic switch architecture for the ASIC-1 device. ...................................................... 30
Figure 2-5. Simulation results for the unit switch. ........................................................................ 31
Figure 2-6. Small signl model of the receive circuit for the unit cell of Figure 2-2. .................... 36
Figure 2-7. Frequency response of the unit cell preamplifier (ASIC-1) ....................................... 39
Figure 2-8. Low switching-noise architecture switch implemented in ASIC-2. .......................... 41
Figure 2-9. Validation of electrical function of the ASIC-1 device. ............................................ 42
Figure 3-1. Schematic representation of the proposed 2D array by direct assembly ................... 48
Figure 3-2. Schematic cross-section of the acoustic stack assembled to an ASIC substrate. ....... 51
Figure 3-3. Process flow for fabrication and assembly of the acoustic stack. .............................. 52
Figure 3-4. Transmit electrical impedance in air for composite without backing or matching .... 60
Figure 3-5. Fabrication of multi-array acoustic module. .............................................................. 63
Figure 3-6. Interposer fabrication process .................................................................................... 64
Figure 3-7. Assembly process for fabrication of the acoustic/ASIC module ............................... 69
Figure 3-8. Transmit electrical impedance for the completed acoustic stack ............................... 73
Figure 3-9. Maps of measured acoustic data for the 1´3 module fabrication sample .................. 74
Figure 3-10. Pulse/Echo two-way response for KLM model and normalized measured data ..... 77
Figure 3-11. Image of 20 µm wire targets spaced at 1.5 mm intervals ........................................ 81
Figure 4-1. Tiled modular array prototype for a 6 x 40 elements 1.75D array. ............................ 85
Figure 4-2. Survey of acoustic backing and signal routing architectures for 2D arrays ............... 87
Figure 4-3. KLM model results for different backing architectures. ............................................ 88
Figure 4-4. KLM model results for increasing flex thickness. ..................................................... 90
Figure 4-5. Fabrication of the acoustic module. ........................................................................... 92
Figure 4-6. Comparison of transmit electrical impedance (KLM model vs. Measured). ............. 94
Figure 4-7. Cross section of the acoustic stack for the 600 µm pitch 2D array. ........................... 97
Figure 4-8. Micro-probing test results for the fabricated large array acoustic module. ............... 98
Figure 4-9. ASIC module PCB and closeup of the ASICs and wire-bonding. ........................... 101
ix
Figure 4-10. Assembly of the acoustic module to the ASIC PCB module. ................................ 102
Figure 4-11: Oblique side view of the completed module assembly. ......................................... 105
Figure 4-12. Backing surface planarity mapping. ....................................................................... 109
Figure 4-13. Backing polymer separation. .................................................................................. 110
Figure 4-14. Comparison of KLM modeling and measured pulse/echo results for 2D array. ... 113
Figure 4-15. Mapped acoustic test results for two fabricated modular arrays. ........................... 114
Figure 4-16. Field II simulations for the 600 µm array at 35 mm electronic focus. ................... 116
Figure 4-17. Imaging results for fabricated modular array with highly echogenic cysts ........... 117
Figure 4-18. Imaging results for fabricated modular array with anechoic cysts. ....................... 118
Figure 4-19. Imaging results for fabricated modular array with axial/lateral wire targets. ........ 119
Figure 4-20. Line-spread functions for the large element 2D array and ASIC. .......................... 120
Figure 4-21. Integrated three module array. ............................................................................... 122
Figure 4-22. Imaging the CIRS 054GS phantom with three different array constructions. ....... 123
Figure 4-23. Imaging the resolution wire-target grouping in the CIRS 054GS phantom ........... 124
Figure 4-24. Verasonics VSX numerical simulation of theoretical wire-target phantom. ......... 125
Figure 4-25. Simulated line spread functions for a 120 lateral dimension element probe. ....... 126
Figure 4-26. Comparison of the fabricated 1.75D modular array to production probes ............ 127
Figure 4-27. Comparison of imaging at depth for 1.75D array and production probes. ............ 128
Figure 4-28. Comparison of acoustic glitch for ASIC-1 and ASIC-2 devices. .......................... 131
x
ABSTRACT
Tiled modular 2D ultrasound arrays have the potential for realizing large apertures for novel
diagnostic applications. One important potential application for a large aperture array is screening
and surveillance of hepatocellular carcinoma (HCC) lesions which represent an increasing disease
burden in Asia, Europe and North America. HCC due to advanced liver cirrhosis caused by
hepatitis B (HBV) and C (HBC), as well as Non-Alcoholic Steatohepatitis (NASH) in overweight
and obese populations, is especially challenging for screening with standard ultrasound due to the
requirements to traverse the subcutaneous fat layer which leads to a significant reduction in signal
and therefore reduced penetration depth. A high yield large aperture modular 2D or 1.75D array
has the potential for realizing a significant improvement over standard ultrasound equipment used
for screening for HCC. The large aperture in the azimuthal dimension can result in improved lateral
resolution using a lower frequency which allows for high resolution imaging at greater depths. In
addition, the 1.75D array aperture provides electronic focusing in elevation for superior slice
thickness uniformity along the entire axial range which in turn can improve contrast. These
features have the potential for improved sensitivity of detection and surveillance of HCC lesions
in difficult to scan patient populations and are the final intended outcome of the presented research.
The thesis presents the results of work for fabrication of tileable 2D array modules implemented
using 1-3 composites of high bandwidth PIN-PMN-PT material closely coupled with high voltage
CMOS Application Specific Integrated Circuit (ASIC) electronics for buffering and multiplexing
functions. Two types of integrated arrays are described: “Direct Assembly”, where the 2D acoustic
array module is assembled directly on top of the ASIC silicon substrate, and “Adjacent Assembly”,
where the 2D acoustic array module is assembled adjacent to a group of ASICs and both share a
common Printed Circuit Board (PCB) substrate.
xi
The 2D acoustic array module is based on a 1-3 composite of single crystal PIN-PMN-PT
transducer material which benefits from improved electromechanical coupling coefficient, k33’,
and increased Curie temperature. The backing for the 2D acoustic array module consists of a novel
3D printed acrylic frame that is filled with conducting and acoustically absorbing silver epoxy
material. This interposer backing effectively connects each of the 2D array elements to respective
signal channel connections on a supporting PCB or on a silicon ASIC substrate.
The thesis first presents the design, analysis and testing of a prototype high voltage switching
and buffering interface ASIC which is intended to be used to implement a large tiled modular
ultrasound array either by direct or by adjacent assembly. The ASIC is implemented in a special-
purpose, 0.35 µm high voltage (50 V) CMOS process, and comprises 40 unit cells with each cell
being composed of 4 high voltage switches and a respective buffering preamplifier. Interfacing of
the ASICs to a commercially available highly versatile open-architecture ultrasound imaging
system, the Verasonics Vantage 128, is implemented using a local FPGA controller and is also
described in the context of the ASIC design. The ASIC operates up to 45 Vpp transmit voltage and
has a designed -3dB receive frequency of 7.5 MHz when interfaced to a nominal 6 pF transducer
source capacitance. The results of electrical validation tests of the ASIC are presented in detail. A
second ASIC was designed to alleviate charge-injection which was observed in the first generation
of tested ASICs. The architecture of this second generation of ASICs is presented with test results.
The acoustic design and fabrication process for a 2D PIN-PMN-PT based transducer array
module having 4.5 MHz center frequency and nominal 308 µm pitch elements is discussed in
detail. The process for integration of the 2D acoustic array module by direct assembly to the
designed and validated ASIC is explained. The results of acoustic measurements and imaging tests
with a prototype 5x5 element direct assembly module interfaced to the Verasonics system are
presented. The prototype array demonstrates 80% mean fractional bandwidth of the functional 2D
xii
array elements, and acceptable images for the very small aperture.
The design, fabrication and testing of a large aperture modular 1.75D array by adjacent assembly
to a PCB with 4 interface ASICs is presented next. The 1.75D transducer array is supported by a
3D printed conducting and acoustically attenuating interposer backing which links the array to a
PCB housing the interface ASICs. A novel low temperature approach for assembly of the acoustic
modules to the printed circuit board utilizing “stamping” simultaneous printing of conductive
adhesive on all interposer terminals is presented. The fabricated large 1.75D array module for
direct assembly consists of an array of 6 x 20 elements at 600 µm pitch in azimuth, and 1600 µm
pitch in elevation. The combined acoustic electric assembly displayed excellent overall mean
fractional bandwidth of 81% for functional elements, high element interconnect yield of 93%, and
had a center frequency of 3.5 MHz, and -20dB pulse length of 850 ns. The device was interfaced
to the Verasonics system for testing, and images were acquired using an industry standard tissue
mimicking phantom. The device displays promising image quality given the relatively small
number of azimuthal elements. Axial resolution was found to be between 250 µm and 500 µm,
while lateral resolution was found to be between 500 µm and 1 mm. Multiple of the tileable
modules have been fabricated, and 2 module and 3 module array apertures have been built and
tested. Results of imaging and pulse-echo evaluation with these arrays are presented.
The image quality of the novel 1.75D multi-module arrays is compared to industry standard
probes that are known to be used for screening and surveillance of HCC, highlighting increased
penetration depth and improvements in lateral resolution.
1
INTRODUCTION
Ultrasound transducer arrays are used extensively in modern medical practice. Linear arrays,
composed of a row of individual elements have been broadly applied in the diagnosis and staging
of malignancies in the liver, kidney, breast and thyroid (Hoskins, Martin, & Thrush, 2010; Shung,
2015). Phased arrays, in which the elements emit a focused beam that is steered, have found
application in cardiology for diagnosis of structural abnormalities in the heart muscle and valves
(Otto, 2007). Curvilinear arrays combine aspects of linear and phased arrays and are widely used
for abdominal and fetal imaging (Hoskins et al., 2010). The majority of these transducer arrays
have a one to one mapping between the ultrasound system channels and the individual array
elements. Newer probes incorporate electronic multiplexing or beamforming operations at the
probe itself to allow for a larger number of elements to be used with the existing 128 or 256 channel
ultrasound systems. In particular, 2D and 1.75D multiplexed arrays have shown promise for
improved contrast which is of particular importance for detection and differentiation of cancerous
lesions (Wildes et. al; Fernandez et al). Large apertures with spatial compounding also are
beneficial for improving lateral resolution (Bottenus et al).
As will be discussed further below, an important application of these technologies is the
detection, and surveillance of putative lesions of Hepatocellular Carcinoma (HCC) in cirrhotic
liver. This chapter will introduce and expand on these concepts, while setting the stage for
development of a novel modular large area array for screening and surveillance of liver cancer.
2
Multiplexed 2D and 1.75D Arrays
A large aperture array requires means for processing many more 2D and 1.75D array elements
than available system channels. This presents a bottleneck in terms of signal processing capability
which must be resolved before a large aperture array can be constructed. Multiplexed (“muxed”)
probes, integrating commercially available high voltage multiplexing electronics either on the
system side of the cable or in the probe handle, were introduced to expand the number of elements
beyond the limitations of existing systems, increasing the number of elements from 128 system
channels to 192 or more elements to enlarge the field of view (Hoskins et al., 2010) and allow for
the implementation of expanding aperture in elevation for improved contrast to noise ratio (CNR)
(Daft et al., 1994; Fernandez et al., 2003). Muxing electronics yield additional benefits by
increasing the size of the physical aperture laterally for these larger probes. Muxing is also used to
Figure 1-1. Clinical applications of volumetric imaging arrays.
Left shows volumetrically rendered image of fetus in the womb based on large ultrasonically acquired 3D data set,
Right shows mitral valve image in orthogonal views as well as volumetric rendered images. Image on Left acquired
using GE Voluson 4D technology, (BENIOT.). Images on Right acquired with GE Vivid E9 4D, Trans-Esophageal
Echocardiography probe (TEE).
3
add additional rows of elements in the elevational plane to help reduce slice thickness and thereby
enhance CNR (D. G. Wildes et al., 1997).
Two-dimensional arrays, consisting of an XY matrix of elements are a more recent
development in clinical use and have largely been focused on echocardiography (Figure 1-1)
(Hoskins et al., 2010) and fetal imaging (W. Lee et al., 2017; Timor-tritsch & Platt, 2002). These
probes may have a matrix of between 32 x 32 to 64 x 64 elements or more and are used to acquire
volumetric data sets of the heart in real-time (Hung et al., 2007; D. Wildes et al., 2016; Douglas
G. Wildes & Smith, 2012). Clinically relevant information including ejection fraction, and leaflet
stenosis can be determined by the physician, either using orthogonal planes or by interpreting
surface rendered volumes views (Hung et al., 2007). More recently introduced probes have
Figure 1-2. Ultrasound Localization Microscopy (ULM) image obtained for rat liver.
Image obtained by tracking systemically injected microbubbles and inferring the anatomy of the microvasculature
based on the bubble tracks (Foiret et al., 2017) Close-up in (f) shows micro-vessels which are roughly 100 µm in
diameter. Blurring of the image due to tissue motion and out-of-plane artifacts visible in (f) could potentially be
mitigated using large 2D arrays that are focused in elevation. (Couture, Hingot, Heiles, Muleki-Seya, & Tanter,
2018; Foiret et al., 2017)
4
expanded the clinical use of 2D matrix arrays to include obstetrics (W. Lee et al., 2017),
abdominal (Wilson, Gupta, Eliasziw, & Andrew, 2009), and periphery vascular (Vicenzini et al.,
2012) applications. Endocavity 2D array probes are also a very active area of research and clinical
use in recent years (Choe et al., 2012; Gurun, Hasler, & Degertekin, 2011; Tan et al., 2017; D.
Wildes et al., 2016) .
There are a number of advanced applications which are the subject of current and recent
research that will benefit from 2D arrays with much larger apertures than are available in
commercial systems. These applications include automated breast ultrasound (Chou, Tiu, Chen, &
Chang, 2007; Son et al., 2014; Robert Wodnicki et al., 2011; Yen & Smith, 2004), plane wave
imaging with large matrix arrays for high speed acquisition of volumes enabling 3D mapping of
stiffness and blood flow in cardiology applications (Provost et al., 2014), as well as high intensity
focused ultrasound (HiFU) for therapeutic treatment of cancer (Wan & Ebbini, 2008).
An exciting recent development in ultrasound imaging research has been the introduction of
Ultrasound Localization Microscopy (ULM) for super-resolution (Foiret et al., 2017; O. Couture,
V. Hingot, B. Heiles, P. Muleki-Seya, & M. Tanter, 2018). This technique uses systemically
injected microbubbles to image the microvasculature in the body by tracking the paths of the
bubbles over time to infer the diffraction-limited anatomical structure (Figure 1-2). An important
problem with ULM is ambiguity due to aliasing of out-of-plane echoes into the imaging plane,
which tends to blur the inferred, super-resolved, in-plane structures (O. Couture et al., 2018). This
problem could be mitigated by the use of a large array with a highly focused and thin elevational
plane slice to effectively reject out-of-plane data (O. Couture et al., 2018).
5
Large 2D Arrays for Hepatocellular Carcinoma
Hepatocellular Carcinoma (HCC) is becoming an increasingly important and prevalent
disease condition in North America and the world (Ernesto Roldan-Valadez et al., 2008). HCC,
the most common primary malignancy of the liver, is associated with cirrhosis and represents the
endpoint of a long series of disease processes (Figure 1-3). The starting point for the disease is
toxic insults to liver hepatocytes either through viral infection (HCB and HCV), or by long term
use of alcohol (Hassett et al., 2103). More recently, with increasing prevalence of obesity in North
America, progression of fatty liver (NAFLD and NASH) has been an additional significant risk
factor for HCC (Ernesto Roldan-Valadez et al., 2008; Jamak Modaresi Esfeh et al., 2019). Necrosis
of hepatocytes due to viral infection or liver toxicity leads to regeneration to maintain functioning
of the organ. However, the rate of hepatocytic regeneration is slower than that of connective tissue
generation, and this leads to proliferation of dense connective fibrosis which is not functional
Figure 1-3. Hepatocellular carcinoma disease process
HCC is the endpoint of a series of disease processes that start with insults to the hepatic cells either through viral
means, or alcohol toxicity, or fatty deposits due to obesity and metabolic syndrome. The resulting necrosis leads to
remodeling which over time causes liver fibrosis which progress to cirrhosis in advanced cases. Liver cirrhosis is
the basis for formation of carcinomas which if not addressed (through surveillance with ultrasound) eventually lead
to decompensation and mortality in a significant number of patients.
6
parenchyma.
Once liver fibrosis is established and in the absence of mitigation of the original disease-
causing factors, a repeated cycle of necrosis and remodeling eventually leads to very significant
build-up of fibrotic tissue which can impair the basic functioning of the organ and lead to patients
experiencing outwardly visible symptoms. At this point, the disease has progressed to actual
cirrhosis and becomes a much more serious and potentially life-threatening condition.
Morphologically, cirrhosis is associated with regenerative nodules of liver tissue which are isolated
from each other by bridging septa of fibrosis (Pittman, 2018). Outward symptoms of cirrhosis
include portal hypertension which in turn causes buildup of excess fluid in the abdomen (ascites)
as well as in the extremities (edema) (Nathalia Martines Tunissiolli et al., 2017; Hasseett et al.,
Figure 1-4. Liver cancer detection by ultrasound scanning
Ultrasound is used for detecting putative hepatocellular cancer (HCC) lesions in the liver and differentiating them
from fluid filled cysts. (a) shows the relative location of the liver in the abdomen as well as an example of an HCC
mass that has infiltrated venous tissue, (b) shows a suspicious mass detected on ultrasound which is most likely a
hemangioma tumor, (c) shows a branch of the hepatic vein (wide arrow) along with a likely benign cyst (thin arrow).
Specificity of the detection process depends on the ability of the ultrasound machine to effectively separate out true
cancerous lesions from fluid filled cysts. (a) adapted from Szklaruk et al., 2003, (b)-(c) adapted from Eberhardt et
al., 2003)
7
2103). The inability of the liver to properly filter toxins out of the blood also leads to effects on
the brain (encephalopathy). Due to continued remodeling in this phase of the disease, the risk of
formation of carcinomas is high, with the prevalence being 9-45% in a ten year period (Fetzer et
al., 2019). Once the disease progresses to formation of actual HCC, prognosis is very poor, with
the mean survival time of untreated patients being less than 4 months (Szklaruk et al., 2003).
Due to the high risk of mortality and statistically very short course of the disease with
cirrhosis progressing to HCC, there is significant incentive for screening and surveillance of
patients with known cirrhotic liver to try to catch the appearance of HCC when it can still be treated
(Hassett et al., 2013; Jamak Modaresi Esfeh, 2019; Singal et al., 2013). An important screening
modality is B-mode ultrasound (Tanaka et al., 2020) with additional newer testing to evaluate
fibrosis being done using dedicated transient elastography (TE) machines (Flores et al., 2015).
Ultrasound is the modality of choice due to the fact that patients with cirrhotic liver are typically
followed at very close intervals (3-6 months) and therefore an inexpensive procedure is preferred
over CT or MRI. After initial screening, patients enter a surveillance program which continues
indefinitely at the prescribed interval. Detection of putative lesions leads to referral for CT or MRI
testing or contrast enhanced ultrasound (CEUS) to obtain a definitive differentiation of benign
cysts or malignancy (HCC). When a malignant tumor is identified, and depending on the staging,
it can either be resected if possible, or a full liver transplant may be recommended.
Effective screening for liver cancer depends on the ability to identify and differentiate tumors
in the parenchyma (Figure 1-4). Tumors present as a hypoechoic mass with scattering energy
visible internal to the mass [Figure 1-4 (b)] (Eberhardt et al., 2003). These must be differentiated
from veins and arteries [Figure 1-4 (c)] as well as fluid-filled cysts which typically appear as
8
completely empty (black) hypoechoic cysts in ultrasound. As will be discuss later in Section 1.4
the ability to differentiate a filled mass from a hypoechoic cyst depends on the contrast to noise
ratio (CNR) of the imaging process, which in turn is a function of the design and performance of
the ultrasound probe and system being used.
Figure 1-5. Mechanically swept large area synthetic aperture.
These generate highly detailed images by integrating multiple acquired views over a large aperture with a
physically swept probe. Left-Top shows the mechanical sweep concept, Left-Bottom compares lateral spot
size with swept vs. traditional imaging, Right-Top shows liver scans with and without swept aperture. Arrows
indicate blood vessels in cross-section with improved visualization in the case of swept aperture. Right-
Bottom shows a fetal head imaged with traditional and swept aperture. The swept aperture case has finer
speckle, finer delineation of tissue boundaries as well as enhancement of fine cavity structures (arrows).
Adapted from (Bottenus et al., 2016)
9
Recently, it has been observed that an increasing number of patients with cirrhosis and HCC
in North America are overweight and obese (Bril et al., 2015; Saitta et al., 2019). The presence of
a thick layer of aberrating abdominal fat can degrade the penetration depth and sensitivity of the
ultrasound probe (Modica et al., 2011; O’Brien et al., 2018), making it difficult to identify and
differentiate putative masses in the liver (Zhang, Fowler et al., 2018). As the incidence of NASH
is itself related to obesity, the prevalence of NASH-related cirrhosis is becoming an increasingly
important disease etiology for HCC in North America (Michelotti et al., 2013). In this case, the
ability to correctly detect and identify HCC lesions in fibrotic liver for the obese patient population
is of increasing importance.
Proposed Modular Large Aperture array for Liver Cancer
To satisfy the requirement for screening and surveillance for HCC in the obese patient
population, this thesis proposes the use of an electronically scanned modular large area array with
plane wave imaging in the azimuthal dimension and synthetic aperture imaging in the elevational
direction. As discussed in detail below, a large array operating at a lower center frequency provides
improved penetration depth while maintaining good lateral resolution. It further provides
improvements in CNR due to electronic focusing in elevation for a uniform slice thickness along
the entire axial range of the image.
Large effective apertures have been previously proposed for use in deep abdominal imaging
for diagnosis and staging of liver cancer (N. Bottenus, Long, Bradway, & Trahey, 2015). Acoustic
attenuation in the body varies exponentially with the inverse of penetration depth and imaging
frequency (Shung, 2015), making it difficult to image at high resolution deep in the body. Lateral
resolution is determined by the F# of the array which is inversely related to the size of the
10
beamforming aperture (Shung, 2015). A large aperture can be used to achieve a finely focused
beam deep in the body by imaging at lower frequency to improve image resolution. Previous
research has shown very promising results with large synthetically produced apertures created
using mechanically swept and single element production probes (Figure 1-5) (Nick Bottenus et al.,
Figure 1-6. Illustration of different types of 2D arrays.
Top-Left shows a traditional 2D array of transducer elements. The different colors for each element are intended to
represent assignment to different system processing channels. Also shown is the focused and steered beam produced
by this 2D phased array (grey). Top-Right shows a 2D array where all elements in each column have been connected
together to behave as a single tall element. This array models the case of a traditional 1D “linear” array. The beam
shown in tan color is not highly focused in the elevational direction along the axial line, and in particular the depth
of focus is limited. Bottom-Center shows a 2D array of transducer elements which have been configured to operate
as 1.5D array. In this case the elements in each column share the same focal delay for azimuthal focus (nominal
color value), whereas along the elevational dimension, different beamforming delays (shaded colors in the graphic)
are used in order to provide strong electronic focus in the elevational plane. This is illustrated by the resulting beam
pattern (gray) which is thinly focused in elevation over a wide axial distance.
11
2016). Additional improvements in detection can be achieved by maintaining a tightly focused
beam in the elevational plane and improving contrast resolution for effective differentiation of
fluid filled cysts and cancerous lesions (Daft et al., 1994). These techniques could potentially
improve the ability to detect malignancy in the liver. For a clinically useful device, it would be
Figure 1-7. Illustration of the benefits of a 1.5D probe which is highly focused electronically in the elevational
dimension.
Top shows a traditional linear 1D array that has a mechanical acoustic lens providing strong focus over a
narrow axial range (poor depth of focus). Top-Right shows three image sections taken near to the probe face,
at the mechanical probe focus and in the far field, illustrating the inability to differentiate anechoic regions
(black holes in the image e.g. fluid filled cysts). Bottom-Right shows the same image sections obtained instead
with a 1.5D array that is strongly electronically focused in elevation, illustrating the ability to detect anechoic
regions over the entire axial range of the probe (adapted from (Zagzebski, 2001)). Red dashed line circles
added to highlight missing cysts Top, vs. detected cysts, Bottom.
12
advantageous to implement the large aperture swept technique by electronic scanning of a fixed
2D array that has a very large field of view both laterally and in elevation (discussed below).
Multi-dimensional Transducer Arrays
In general, 2D arrays of elements can either be used to form a true 2D phased array that is
steered both in the lateral and elevational directions (Figure 1-6, Left) or they can be used to form
so-called “1.5D” or “1.75D” arrays (D. G. Wildes et al., 1997) that are highly focused in the
elevational dimension (Figure 1-6 Middle, and Figure 1-7, adapted from Zagzebski, 2001), in order
to greatly improve the thickness uniformity of the imaged plane and thereby extend the depth of
focus of the receive beam. As defined in (D. G. Wildes et al., 1997), a 1.5D array is a linear array
where each of the elements is subdivided in elevation, and the elements are connected together in
“mirrored” fashion (i.e. mirrored along the center elevational line). A 1.75D array is a linear array
with subdivided elements, where all of the elevational elements are uniquely connected to
individual system channels. A 1.75D array is distinguished from a true 2D array in that the
elements in elevation are spaced at greater than l/2 pitch. This makes it difficult to steer greater
than 30
0
in elevation. A 1.75D array provides excellent focus in the elevational plane for improved
contrast to noise (CNR) of in-plane features, and it also has limited steering in elevation which can
for example be used for compounded plane wave imaging in the elevational direction. Improved
CNR is critical for correctly resolving fluid filled cysts which is important for differential diagnosis
of cancer (Figure 1-7 Right) (Abbey et al., 2012; D. G. Wildes et al., 1997). Cancerous structures
are dense volumes which are visibly “clouded” in an ultrasound image, while benign cysts are
fluid filled and appear black on the inside. A system that has poor elevational focus will have
limited CNR inside the fluid filled cysts outside of the mechanical lens focus, making them appear
13
to be clouded as with malignant lesions, and this potentially leads to false positives (Abbey et al.,
2012; D. G. Wildes et al., 1997).
The 1.5D and 1.75D arrays are thought of as traditional 1D arrays in that they are used to create
slice planes in the tissue similar to the individual slices produced by CT and MR machines. Unlike
CT and MR however, traditional ultrasound 1D (or “Linear”) probes do not acquire multiple slices
in the 3
rd
imaging dimension. As a general rule in ultrasound, 1D, and 1.5D arrays create 2D
images, while 2D arrays create 3D, volumetric data sets. In newer machines, these 3D data sets
are segmented and rendered to create 3D-realistic images which are readily understood by
clinicians as well as the general public (e.g. Figure 1-1).
Figure 1-8. Cross-sectional illustration of construction of large 2D ultrasound transducer arrays.
The arrays combine multiple component layers including the interface ASIC electronics, 3D interconnect technology,
highly integrated 3D backing interposer, and the 2D array transducer elements. Close integration of the 2D array
elements and the interface electronics alleviates the bottleneck of thousands of cables required for connection to the
ultrasound machine.
14
Implementation of large 2D array apertures
Implementation of very large 2D array apertures as described above requires the close
integration of a large two dimensional array of transducer elements with interface electronics
(Figure 1-8). The electronics may be located either immediately behind the elements or near the
array (physically in the ultrasound probe handle). This close integration of hundreds or thousands
of 2D array elements and processing electronics involves many of the same challenges that have
been addressed in existing smaller 2D matrix arrays used in clinical practice; these include
interconnect density, as well as beamforming and system channel count and the associated
complexity of implementation. In addition, because of their size, these very large arrays must be
made using high yielding processes if they are to be practical for production at reasonable cost.
Interconnection to a large number of 2D array elements was first addressed by sparse channel
distribution (S. W. Smith et al., 1996). This is an imperfect solution because it leads to increased
sidelobe energy and noise (Savord & Solomon, 2003; S. W. Smith et al., 1996). Interestingly, it
has recently become an active area of new research (Austeng & Holm, 2002; Diarra, Liebgott,
Robini, Tortoli, & Cachard, 2012; Provost et al., 2014; Yen, Steinberg, & Smith, 2000). Sparsing
of elements solves the problem of system channel count by reducing the number of processing
channels needed. This is an important consideration given the significant power, size, and cost
required for implementation of typical beamforming channels. It is also important because the
cable from the system to the ultrasound probe can be a significant source of injury for sonographers
(Graveling, 2012). A large number of system channels requires a large number of individual
coaxial cables in the system probe cable harness, which makes these cables thick and heavy,
leading to injury for practitioners.
15
Later work for implementation of 2D arrays improved the interconnect density to the elements
using dense flex circuits (Fiering, Hultman, Lee, Light, & Smith, 2000; W. Lee, Idriss, Wolf, &
Smith, 2004) which allowed more channels to be used. The use of a conductive backing fabricated
by drilling holes in a matrix material (S. W. Smith, Trahey, & von Ramm, 1992) or building up a
grid of wire frames or graphite (Greenstein, Lum, Yoshida, & Seyed-Bolorforosh, 1997; Woo &
Roh, 2012) has also been proposed. More recent implementations integrate the 2D transducer
arrays directly on interface electronics utilizing dense quarter wave matching materials (S. Lee,
Choi, Lee, Kim, & Park,; Manh et al., 2016; D. Wildes et al., 2016) and by flip-chip bonding (Jiang
et al., 2017; Wygant et al., 2009).
The main challenge after interconnection to a large array of 2D elements has been accomplished
is in processing the large number of signal channels that arrive in parallel from the array. This
issue has been very successfully addressed using sub-array beamforming (Greenstein, Lum,
Yoshida, & Seyed-Bolorforosh, 1997; Woo & Roh, 2012) by integrating analog beamforming
electronics adjacent to (Tamano et al., 2003) or immediately behind (C. Chen et al., 2017; D.
Wildes et al., 2016; Wygant et al., 2009) the 2D transducer array. Other work has proposed the use
of a dense reconfigurable array of switching circuits immediately behind the array (Erikson,
Hairston, Nicoli, Stockwell, & White, 1997; Thomenius et al., 2014) in order to group large
numbers of transducers to form electronically scanned macro-elements. Row/column (K. Chen,
Lee, & Sodini, 2016; Rasmussen & Jensen, 2013; Seo & Yen, 2009) and Mills Cross arrays have
also been proposed (Yen & Smith, 2002; Yen et al., 2000) as a means to reduce the number of
required processing channels while still preserving image quality. Synthetic aperture imaging is
an important technique which breaks up the beamforming process into individual summations that
are carried out in multiplexed fashion over time (Fernandez et al., 2003; Hazard & Lockwood,
16
1999; Jensen et al., 2013; Wan & Ebbini, 2008). This technique has been used to realize 1.75D
and 2D array beamforming with a limited number of system channels, by successively selecting
rows in the 2D array using multiplexing electronics (Fernandez et al., 2003).
An additional issue which is especially important for very large aperture arrays being developed
for novel imaging algorithm applications is overall yield. Yield of connections to the individual
transducer elements can significantly degrade the performance of a beamforming array (Kofler,
2001; Vachutka, Dolezal, Kollmann, & Klein, 2014; Weigang, Moore, Gessert, Phillips, &
Schafer, 2003). In addition, yield on interface electronics has the potential to disable a large
section of the array should a particular component of the interface and muxing electronics become
inoperative. Lastly, a low yielding array process can mean a significant number of rejected parts
which has the potential to greatly increase the cost of the individual large area arrays, in effect
limiting the availability and application of these devices. The proposed solution to improve yield
during fabrication is to take a modular approach (W. Lee et al., 2017; Lin et al., 2013) where
individual sub-modules are first fabricated, evaluated and sorted, such that only known good
acoustic/electric modules may be integrated to form the much larger array.
Finally, beamforming flexibility continues to be a very important issue for implementation of
novel beamforming applications in general, and also more specifically taking advantage of large
2D array topologies (Bera et al., 2018; Cabrera-Munoz et al., 2018; Deng, Rouze, Palmeri, &
Nightingale, 2017; M. M. Nguyen, Ding, Yu, & Kim, 2014; Z. Wang et al., 2016). The complexity
of 2D arrays constructed for commercial systems makes it difficult to apply them to novel
ultrasound imaging applications without having access to proprietary beamforming algorithms and
detailed knowledge of proprietary front-end interface electronics.
17
Modular large aperture 2D Array architecture implementation
To address the challenges of novel beamforming applications for large 2D and 1.75D transducer
arrays, we have been developing a modular large array architecture (Figure 1-9) utilizing closely
coupled, wide bandwidth acoustic elements and electronics that are directly interfaced to a
commercial research ultrasound beamforming system (Wodnicki et al., 2017; Wodnicki et al.,
Figure 1-9. Illustration of the prototype large modular array concept.
Shown in the figure are 9 modules tiled in the azimuthal direction, and 2 modules tiled in the elevation direction.
Each module combines a 2D array of 16x16=256 transducer elements closely with the interface ASICs using
a specially developed interposer backing. The large aperture provides electronic focus in the elevation
direction for uniform axial depth of focus and improved tissue penetration due to the large azimuthal and
elevational apertures. The use of array modules helps to improve the overall yield of the large area array.
18
2018; Wodnicki et al., 2019; Wodnicki et al., 2020). This thesis presents the development of
electronics, transducer fabrication and assembly processes as well as ultrasound system interfacing
which have been used to build multiple prototype modules to demonstrate acoustic performance
and imaging. These include the design, and validation of a new ASIC with local buffering and
high voltage switches, implementing synthetic aperture scanning for 2D array beamforming; a
novel hybrid 3D printed backing interposer mounted directly on the surface of, or adjacent to, the
interface ASICs using a low temperature conductive adhesive assembly process; and a dense 2D
array acoustic stack incorporating a 1-3 composite of PIN-PMN-PT wide-band piezoelectric
material and two acoustic matching layers. We have fabricated multiple prototype array modules
Figure 1-10. Illustration of the modular array and ASIC interface electronics.
Left shows the architecture of the ASIC switching matrix composed of multiple unit cells, where each cell interfaces
directly with a single 2D transducer element. Each unit cell comprises high voltage switches for transmit signal
multiplexing, as well as low voltage buffer amplifiers to help match the high impedance of the 2D array elements to
the cable and system receive impedance. Right shows a cut-away view of the ASIC which sits underneath the 2D
transducer elements as part of the modular array.
19
using these principle components, and will present results of the completed devices, with a view
towards scaling to implementation of the full large 2D array.
Figure 1-10 illustrates the proposed architecture for implementation of a modular probe
assembly composed of a tiling of multiple 2D transducer arrays direct-assembled to the surface of
a series of tiled front-end interface ASICs. Adjacent assembly of the transducer arrays to a Printed
Circuit Board (PCB) substrate has also been developed and will be presented. The current thesis
reports in detail on the first step towards this goal, which is the realization of modular assemblies
incorporating the fully tileable ASIC as well as the 2D transducer array and an interposer backing
for assembly. In addition, multiple generations of tiled array apertures have been constructed using
these individual modules, and the imaging results with these arrays are also presented.
The prototype ASICs are fabricated in a high voltage (50V) 0.35 µm CMOS process
(Austriamicrosystems, Unterpremstätten, Austria ) and designed to implement multiplexed access
to the 2D array, making possible synthetic aperture scanning in the azimuthal and elevational
directions. The transducers are realized using 1-3 composite of PIN-PMN-PT (CTS, Bollingbrook,
IL) material which has a high electromechanical coupling coefficient (k33 > 0.9) leading to wide
bandwidth operation. The 2D transducer array is assembled to a 2D interposer backing that is
constructed using a novel hybrid process that utilizes a 3D printed acrylic grid to form a mold that
houses the interposer pillars. The interposer provides closely coupled acoustic backing for the
array. This effectively isolates the 2D array from the supporting substrate in order to reduce
ringing and thereby improve the acoustic performance. The interposer and acoustic stack are direct
assembled to the surface of the ASICs using a low temperature conductive adhesive assembly
process to prevent damage of the backing and de-poling of the piezo material. Adjacent assembly
20
to a PCB has also been demonstrated and will be described. Figure 1-10 Right, shows a schematic
cross section of the completed stack-up illustrating the various components of the assembly. Each
of these will be discussed in detail in the chapters below.
An important consideration for large 2D arrays is alleviation of the routing bottleneck that exists
between the dense array of transducer elements and the comparatively lower channel count
ultrasound imaging system. This bottleneck has been resolved using locally integrated
(Application Specific Integrated Circuits) ASIC electronics which implement either sub-aperture
beamforming (C. Chen et al., 2017; K. Chen et al., 2016; Gurun et al., 2011; Jiang et al., 2017;
Savord & Solomon, 2003; D. Wildes et al., 2016), grouping of the elements as reconfigurable
macro elements (Thomenius et al., 2014), or multiplexing of the elements in time by synthetic
aperture imaging (Fernandez et al., 2003; Kang et al., 2017). In this thesis a synthetic aperture
approach is taken for accessing the arrays, and will be used for generating the images presented.
Thesis Overview
The thesis is organized into 4 chapters following the introduction which are summarized as
follows: In Chapter 2, a detailed discussion of the newly designed interface electronics ASICs is
presented. The ASIC is illustrated in Figure 1-10, Left, and includes an array of 5 by 8 interface
cells with each cell connected directly to a single 2D array element. The chapter discusses the
circuitry used to implement the high voltage (50 V) switching functionality. Also described is the
implementation of the buffer preamplifier that is integrated in each cell to match the high
impedance of the elements with the loading off-chip. A second-generation ASIC designed to
mitigate charge injection-related artifacts discovered when testing the first-generation ASICs is
21
also presented. The chapter concludes with test results that validate the electronic functionality of
the fabricated ASICs.
In Chapter 3, the process for direct-assembly of a 2D transducer array to the surface of the
fabricated ASICs is described in detail. The chapter presents the fabrication process for the entire
assembly. This includes a detailed discussion of the design of the 1-3 composite of PIN-PMN-PT
material, as well as fabrication of the acoustic stack. The implementation of the interposer backing
is introduced and described in detail, including the process for fabrication of the 3D printed grid
mold, as well as the filling of the mold to create the backing pillar array. The process for assembly
of the completed acoustic stack to the ASIC silicon substrate is introduced and described in detail.
A single prototype ASIC module with a 5 x 5 array of elements has been implemented and
interfaced to the Verasonics Vantage 128 system. Test results with the fabricated prototype are
introduced and discussed in detail.
In Chapter 4, the process for adjacent assembly of a large element 1.75D array stack to a PCB
housing an array of interface ASICs is presented. The goal of this research is the implementation
of a very large aperture (Figure 1-9), in order to improve the elevational focus and provide
increased penetration into the body. These goals can be achieved using a physically large array of
1.75D transducer elements implementing a topologically smaller array of individually addressable
component elements. In other words, rather than cover a very large aperture with a great number
of small elements, we may instead implement the large aperture with a smaller number of larger
2D elements. An important consideration in this regard is silicon real-estate which is paid for in
mm
2
. Larger ASICs become more expensive, and also, significantly, larger ASICs have much
22
lower yield. Therefore, the use of adjacent assembly, as opposed to direct assembly provides one
path towards implementation of the large aperture array at potentially reduced cost.
Chapter 4 presents the results for fabrication, testing and imaging of large aperture 1.75D array
modules implemented by adjacent assembly of 1.75D transducer arrays next to interface ASICs.
The ASICs used are the same ones which are discussed in Chapter 2 and were used to implement
direct-assembly modules in Chapter 3. The acoustic stack is similar to that described in Chapter 3,
however the center frequency is lower (3.5 MHz, vs. 4.5 MHz) and the size of the elements is
much larger (10x larger physical footprint for each element). The much larger elements lead to a
larger aperture for the relatively small number of elements. In addition, the larger elements
themselves have improved sensitivity. These two points combine to greatly improve the realized
image quality and enabled the use of an industry standard ultrasound quality assurance phantom
to evaluate the fabricated module. Results of interfacing the fabricated adjacent assembly, large
element module with the Verasonics system will also be presented.
The goal of this work is creating multiple modules which can be tiled to build up the large
aperture array thereby realizing improvements in penetration and contrast. Chapter 4 presents the
results of fabrication of multiple of the 1.75D array modules and tiling them to create larger
apertures. To date, both a two-module and a three-module aperture have been constructed and used
for imaging tests with an industry standard phantom. Results of these imaging tests will be
presented in comparison to production probes which are typically used in practice for screening
and surveillance of HCC.
The thesis concludes with Chapter 5 providing a brief summary of the presented results,
limitations, and future work.
23
ASIC ARCHITECTURE
Architectures for large aperture transducer arrays with hundreds to thousands (Greenstein et al.,
1997; Woo et al., 2012, Tamano et al., 2003; Chen et al, 2017; Wildes et al., 2016) of elements are
being investigated for their utility in volumetric imaging and also for their potential to improve
image quality and resolution (Tamano et al., 2003; Fernandez et al., 2003; Thomenius et al., 2014;
Wildes et al., 1997). To improve yield, a tiled approach (Wildes et al., 1997; Kang et al, 2018;
Wodnicki et al., 2017), is advantageous. 1.75D/2D transducer arrays with closely integrated ASIC
electronics have the potential to yield high channel count ultrasound probes with improved
focusing in elevation for novel applications (Fernandez et al., 2003). Large apertures require
special considerations to mitigate unique image artifacts due to gaps between modules and
electrical transient effects magnified by the large number of required switches.
This chapter presents a discussion of the design and testing of two generations of ASICs which
were implemented for the large aperture 2D and 1.75D array modules. The first-generation ASICs
(ASIC-1) were optimized to increase the sensitivity of the high impedance 1.75D elements using
on-chip preamps for buffering and local switching to reduce cable channel count. The second-
generation ASICs (ASIC-2) mitigate the effects of MOSFET charge-injection observed while
imaging with the ASIC-1 devices. The ASIC-2 devices have no on-chip preamps and instead
utilize commercial off-the-shelf buffer amplifiers closely integrated with the custom devices. The
chapter provides a summary of the functionality of the ASIC-1 and ASIC-2 devices. Imaging
results with the array modules built using these devices will be presented in Chapters 3 and 4.
24
2.1 ASIC overview
An important challenge for large 2D and 1.75D arrays with thousands of elements is in
processing the large number of signal channels that arrive in parallel from the array. This issue has
been very successfully addressed using sub-array beamforming (Bera et al., 2018; Savord et al.,
2003) by integrating analog beamforming electronics adjacent to (Tamano et al., 2003) or
immediately behind (Chen et al., 2017; Wildes et al., 2016; Wygant et al., 2009) the 2D transducer
array. Other work has proposed the use of a dense reconfigurable array of switching circuits
immediately behind the array (Thomenius et al., 2014; Kang et al., 9; Erikson et al., 1997) in order
to group large numbers of transducers to form electronically scanned macro-elements.
Row/column (Chen et al, 2016; Rasmussen et al., 2013; Seo et al., 2009) and sparse arrays have
also been proposed (Yen et al., 2002; Yen et al., 2000) as a means to reduce the number of required
processing channels while still preserving image quality. Synthetic aperture imaging is an
important technique which breaks up the beamforming process into individual summations that
are carried out in multiplexed fashion over time (Fernandez et al., 2003; Hazard et al., 1999; Jensen
et al., 2013; Wan et al., 2008). This technique has been used to realize 1.75D and 2D array
beamforming with a limited number of system channels, by successively selecting rows in the 2D
array using multiplexing electronics (Fenandez et al., 2003). Yield of connections to the individual
transducer elements is another important issue which can significantly degrade the performance of
a large area beamforming array (Kofler et al., 2014; Vachutka et al., 2014). Yield on interface
ASICs can also cause a large section of the array to be affected due to the fact that the circuits
share common signal and voltage lines, the failure of any one of which can cause an entire device
to be inoperative. Yield can be improved using modularity (Triger et al., 2010; Lee et al., 2017;
Lin et al., 2013) where individual sub-modules are first fabricated, evaluated and sorted, such that
only known good acoustic/electric modules may be integrated to form the much larger array.
25
To address the need for modular arrays with high yield and reduced artifacts, we have been
developing multiple generations of tileable acoustic modules using custom designed ASIC devices
integrated with tileable acoustic stacks fabricated in our lab (Wodnicki et al., 2017; Wodnicki et
al., 2020; Wodnicki et al., 2018).
There were two generations of ASICs designed, and results for both of these will be presented
here to compare their performance. In particular, the ASIC-1 devices (Wodnicki et al., 2018)
demonstrated good imaging performance; however, visible image artifacts resulted from switching
transients. The ASIC-2 devices were designed to mitigate these switching transients by using a
low charge injection switch topology (Wodnicki et al., 2019). The architecture of the ASIC-1
devices will be reviewed in Section 2.1 including control of the switches and the buffer amplifier
Figure 2-1. ASIC-1 photomicrograph
The ASIC-1 device incorporating multiple multiplexor switches and a buffer for improving the signal to noise (SNR) of 2D and
1.75D transducer array elements. (a) Photomicrograph of the complete device, (b) Close-up view of the unit cell highlighting the
high voltage multiplexor switches, transducer connection pad, and buffer amplifier.
26
design. This basic architecture was modified slightly to yield the ASIC-2 devices which are
described in Section 2.2, including an explanation of the circuitry used to reduce charge-injection
artifacts. We performed imaging experiments with the fabricated acoustic and ASIC modules using
plane wave beamforming (Bercoff et al., 2011). Imaging and test results and comparison of the
two types of ASIC modules with associated acoustic stacks will be presented later in Chapter 4.
First-Generation ASIC (ASIC-1) Design and Fabrication
The ASIC-1 device is designed to multiplex and buffer signals from a 1.75D transducer array,
connecting them to the channels of a highly versatile ultrasound system. As illustrated in Figure
2-1, the device comprises an array of 40 interface cells arranged as 5 columns at 340 µm pitch by
8 rows at 275 µm pitch. The purpose of the ASIC is to construct a 1.75D linear array (Fernandez
et al., 2003; Wildes et al., 1997) capable of dynamic receive focusing in elevation and limited
steering. For a 2D array, access to the large number of elements is the main concern and includes
the two issues of connection to the elements and multiplexing to alleviate the interconnect
bottleneck. In the current design, connection to each element is provided by a single aluminum
transducer pad located in each unit cell on the ASIC [Figure 2-1 (b)]. These are connected to the
module PCB using gold wire-bonds. The routing bottleneck is alleviated by high voltage
multiplexing switches located in each cell, with each switch connecting the respective element to
an analog bus line running down each column. The switching matrix can be operated to scan a
window along the azimuthal direction, and successively multiplex each row of elements in the
elevational direction to the 5 system channels. The ASIC layout is designed to be modular in that
it can be tiled in the azimuthal direction and mirrored in the elevational direction to create tiled
arrays of (5 ´ N) ´ (8 ´ 2) elements (where N is the number of ASICs in azimuth). For example, a
27
100 ´ 16 channel array can be created by tiling 20 chips in azimuth and 2 chips in elevation, for
a total of 40 devices.
Outside of the core array of 40 unit cells, the ASIC includes an array of input/output (“I/O”)
pads [Figure 2-1 (a)]. These are laid out in three tiers and can be wire-bonded or flip-chip attached
to a flex circuit for access to the ultrasound system. The overall size of the ASIC-1 device including
the I/O pads is 1.8 mm ´ 3.6 mm. The small size of the current design is intended to improve
yield and also is constrained by the cost of fabrication.
The ASIC in Figure 2-1 was designed using Cadence Virtuoso (Cadence Design Systems, Inc.,
San Jose, CA, USA) for schematic capture. The designed unit cells were simulated over the design
corners using transistor level circuits in Cadence SPECTRE with a simple capacitance model for
the transducers. These were then built up to a complete schematic of the 40 unit cells. Layout was
done using Cadence, and layout vs. schematic was used to validate the layout relative to the
simulated unit cells, and later for the complete top-level design. The final layout data was
fabricated using a 0.35 µm 50V CMOS fabrication process (AMS H35) through a Multi-Chip
Wafer (MPW) service (Europractice/Fraunhofer, Erlangen Germany) (AMS Design Rules, 2009).
Important ASIC parameters are summarized in Table 2-1.
Table 2-1. Design parameters for ASIC-1
Parameter Value
ASIC Width 1.8 mm
ASIC Height 3.6 mm
Number of Rows 8
Number of Columns 5
Unit Cell Width
340 µm
Unit Cell height
275 µm
28
2.1.1 Unit Cell Architecture
A number of transceiver circuits with locally integrated Transmit/Receive switches and cable
buffer drivers have been proposed in the literature (Wildes et al., 2016; Chen et al., 2016; Moore
et al., 2003; Shunga et al., 2019; Moini et al., 2011). Here we summarize the design of the on-chip
buffers and Transmit/Receive switch circuits which have been implemented in the ASIC-1 device.
These include high voltage switches protecting both input and output nodes of the preamplifier, as
well as a digitally controlled local matrix switch coupling each unit cell to a shared analog column
bus line (Figure 2-2). Each unit cell contains a transimpedance buffer along with 4 high voltage
switches (TX, RX1, RX2, and SEL). Three of the high voltage switches (TX, RX1, RX2) make
Figure 2-2. Schematic of the unit cell circuitry for the ASIC-1 device.
Illustrating the multiple Transmit/Receive protection High Voltage switches (TX, RX1, and RX2) as well as the matrix
multiplexing switch (SEL), the low voltage receive signal buffer amplifier, and digital data storage flip-flop (D). The output of
this circuit is connected to 7 other identical cells in the same column for multiplexing 8 elements to a single analog pad at the
top of the ASIC column.
29
up the transmit/receive switch to protect the amplifier from the transmit signal and also route it
around the amplifier. The fourth switch (SEL) is the select switch which is used to multiplex the
system channels to the individual elements in the array. Connection to the respective transducer of
the unit cell is provided by the interface pad at the connection of the TX and RX1 switches
(XDCR).
The unit cell operates according to the timing diagram shown in Figure 2-3. During the transmit
cycle (TX STATE), the TX switch is turned on, and the RX1 and RX2 switches are turned off,
protecting the amplifier. The SEL switch is turned on if the respective unit cell is transmitting (e.g.
SEL1 and SEL2) and turned off if the cell is not selected. After the transmit cycle completes, the
Figure 2-3. Timing diagram for operation of the unit cell circuitry of Figure 2-2.
The circuit operates in separate transmit and receive states (indicated by TX/RX STATE), with the TX switch being enabled
during the transmit state, and the two RX switches being enabled during the receive state. This effectively serves to route high
voltage signals around the amplifier while also removing the low impedance feedback path of the TX switch during the RX state.
30
TX switch is turned off and the RX1 and RX2 switches are turned on (RX STATE). This connects
the transducer (XDCR) to the preamplifier through the RX1 switch. The output of the preamplifier
drives the analog bus line in the respective column (CH0) of the unit cell, accessed through the
series resistance of the RX2 and SEL switches. The resistance of the TX and RX1 switches is 500
Figure 2-4. Basic switch architecture for the ASIC-1 device.
The high voltage switch is comprised of MOSFETs M1-M2. High voltage level shifter M3-M5 sources current into the control
node to turn the switch on by charging up V gs of M1-M2. The switch is turned off by enabling the low side level shifter M6-M8
which pulls current out of the control node to discharge V gs of M1-M2. The nominal values for HVP/HVN are +/-20V, DVSS is
set to 0V, and DVDD is set to 3.3V in simulation and in the lab.
31
W each, whereas the RX2 and SEL switches are each 250 W by design. The feedback network of
the preamplifier is a 2.5 pF capacitor in parallel with a 100 kW resistor.
As compared to commercial off-the-shelf switching ASICs for ultrasound (HV232 Datasheets,
Supertex, 2013), the on-resistance of the switches used in this design is 20-50 times higher (e.g.
1kW vs. 20 W). In addition, the parasitic capacitance of the design devices is significantly reduced
compared to commercial devices (e.g. 10 pF vs. 100pF). These resistance and capacitance values
Figure 2-5. Simulation results for the unit switch.
During T1, the switch is turned on by activating the high-side level shifter and V gs charges up to the applied supply voltage. After
T1, the switch gate floats with V gs dropping slightly due to injection at the gate, however V gs is still maintained high enough for
the switch to be turned on with the designed on resistance. During T2, the switch is turned off using the low-side circuit.
32
match more closely the impedance of 2D and 1.75D transducer elements which have on the order
of 10-20 times smaller area than the 1D elements for which the commercial devices are intended.
The SEL switch in the unit cell is controlled by a single data bit that is shifted into the cell and
stored in a local flip-flop (D in Figure 2- 2). The flip-flops in the eight cells in each column in the
array are tied together in series and form an eight-bit shift register that is used to transfer the data
for the switches in the column. The data is shifted into the array at the start of the transmit cycle
and also at the start of the receive cycle. This allows the array to be configured to multiplex
different elements on transmit vs. receive which is important for implementing a full synthetic
aperture scanning operation.
2.1.2 Switch Operation
The four switches in the unit cell are designed according to the same basic architecture illustrated
in Figure 2-4 which is derived from earlier work (Jung et al., 2018) and has been adapted for
dynamic operation. The switch is composed of two back to back high voltage (HV) lateral DNMOS
devices (M1, M2). Two devices are required to block the flow of current across the parasitic
substrate diodes in the DNMOS device structure thereby providing off-isolation for bipolar signals
(Shinya et al., 2019; Jung et al., 2018; Dufort et al., 2002; Li et al., 2006). The switch is controlled
by two level shifters: a high side branch (M3-M5) pulls the gate of the switch up to +HVP in
response to a logic input at CLK_H. A low side branch (M6-M8) pulls the gate of the switch down
to -HVN in response to a logic input at CLK_L. The nominal high voltage supplies are +/-20V,
and the logic operates between 0V and +3.3V.
33
The switch is operated in static and dynamic modes with up to 40 Vpp (+/-20 V) signals with 20
V tolerant thick gate devices. The switch was simulated using Cadence SPECTRE (Cadence
Design Systems Inc, San Jose, CA, USA) with results presented in Figure 2-5.
2.1.2.1 Static Mode
In the static mode (Figure 2-5), the switch is turned on by applying CLK_H=3.3V which drives
current into the high side current mirror (M4-M5). The current mirror then drives current to the
Control node which charges up the parasitic gate capacitance across the shared Vgs of the switch
devices. It is assumed that the switch has previously been stabilized with 0V at both terminals. In
this mode, the logic signal at CLK_H is held high for the entire duration of the period of operation.
For example, for the TX1 switch (Figure 2-2), CLK_H can be held high for the entire transmit
cycle (e.g. 10-20 µs). The switch in Figure 2-4 is turned off by applying CLK_L=0V (active low),
which drives current into the low side current mirror (M7-M8), which in turn pulls current out of
the Control node and discharges the parasitic gate capacitance of the switches, turning them off.
In the static mode, CLK_L is held low for the entire duration of the off period. For example, during
the receive cycle, TX1 (Figure 2-2) can be held off by holding CLK_L low for the entire cycle.
Operation in the static mode is limited due to the requirement that Vgs not exceed the maximum
for the selected transistors which therefore requires the transmit signal to be less than 20Vpp. In
addition, operation in static mode implies continuous current draw which can lead to excess power
dissipation in a large array with thousands of switches, especially during long duration receive
cycles necessary for deep abdominal imaging (e.g. 200 µs or more).
34
2.1.2.2 Dynamic Mode
In the dynamic mode, the control voltage at the gate of M1/M2 is allowed to float independently
of the high side and low side drivers. Dynamic switch architectures have been explored extensively
in the past (Kang et al., 2018; Shinya et al., 2019; Dufort et al., 2002; Li et al., 2006), and are
useful for implementing high voltage tolerant switches with low on-state leakage currents and
logic level tolerant gate-source voltages.
To turn the switch on in dynamic mode, CLK_H=3.3V is applied for a charging period T1
(Figure 2-5). This charges up the parasitic gate-source capacitance of the switch devices to
Vgs(ON) = HVP. The source is assumed to be at rest and therefore at 0V. At the end of the charging
period, CLK_H=0V, and the current mirror devices are turned off which stops the flow of current
into the gate-source capacitance and also allows the Control node to float, similar in operation to
DRAM (Kang et al., 2018; Shinya et al., 2019; Dufort et al., 2002; Razavi et al., 2015; Tan et al.,
2019). In practice, leakage currents at the gates of the switch devices will discharge the gate
capacitance over time and charge-injection causes Vgs to decrease slightly (Figure 2-5).
To turn off the switch, CLK_L=0V is applied for a period T2. This discharges the gate-source
capacitance of the switches through the low-side current mirror until Vgs(OFF) = 0V. Vg drops
from the high voltage until it reaches the same voltage as Vs. After that, Vg and Vs continue to drop
together until they both reach HVN while the low-side mirror is operating. When CLK_L returns
to +3.3V, Vgs(OFF)=0V is maintained indefinitely.
Operation in the static mode vs. the dynamic mode each have advantages and disadvantages. An
important consideration for the array is power dissipation. When CLK_H is turned on, the current
mirror draws a static current which can be significant for a large array of tiled modules each
35
comprising hundreds of unit cells on their respective switching ASICs. To mitigate this problem
as well as to enable operation with bipolar signals greater than the FET Vgs level (20Vpp), the
switches can be operated in dynamic mode. During the transmit cycle, off-isolation is critical to
prevent crosstalk between elements and it can be improved by using the switches in the static mode
instead of in the dynamic mode.
2.1.2.3 Pre-charge / Hold
To control the switches, the logic bit DOUT from the flip-flop (D in Figure 2-2) in each unit cell
is routed to a logic block that gates two global control signals for each switch: SSWH and SSWL.
The CLK_H signal (Figure 2-4) is generated by the logical combination of DOUT and SSWH,
while the CLK_L signal (Figure 2-4) is generated by the logical combination of DOUT and SSWL.
In this way, the logic bit DOUT in fact does not turn the switch on or off, but instead provides
access to the selected switch so that it can be turned on or off using the global control signals. This
control architecture necessitates a global pre-charge and hold operation. During the pre-charge
phase, all the flip-flops are turned on by toggling the global set signal SN. This allows all SEL
switches in the array to be turned on using the global SSWH signal. Data are then shifted into the
registers in each column with only the switches to be turned off being selected. Then the global
SSWL signal is used to turn off these selected switches. SSWL can then be held for the entire
duration of the given cycle as needed to improve off isolation of the switches.
For imaging close to the skin line, it is important to be able to complete the data programming
and switch configuration for receive within 1-2 µs. This is accomplished using a high-speed data
clock (40 MHz) as well as switch charge-on time of 0.5 µs.
36
2.1.3 Preamplifier
As was illustrated in Figure 2-2, the unit cell integrates high voltage switches along with a
respective preamplifier for each array element. The preamplifier is implemented as an inverting
amplifier using a standard cell op-amp from the AMS H35 analog library (AMS Design Rules,
2009). The details of the circuitry for the op-amp are not described here since the design is a
Figure 2-6. Small signl model of the receive circuit for the unit cell of Figure 2-2.
VOUT is the signal taken at the input to the ultrasound system (C2 in parallel with R3). The transducer is modeled as a small
signal source (VIN) in series with a capacitace (C3) correponding to the impedance of the 1.75D transducer element. Resistances
R4 and R2 model high voltage switches in the receive signal path.
37
standard cell that is proprietary to AMS. Important details of the unit cell are summarized in Table
2-2 including the preamplifier and switch design parameters
The use of an op-amp in the inverting configuration is a common architecture for sensor interface
and is also implemented in interface ASICs for ultrasound (Wygant et al., 2009; Chen et al., 2016;
Moini et al., 2011; Nikoozadeh et al., 2008). Here we use a capacitive feedback element for gain
along with a feedback resistor for DC stabilization. A small signal model of the receive circuitry
along with a simplified model of the transducer element near resonance is shown in Figure 2-6.
This model was used to derive the overall receive transfer function, H(s)= VOUT/VIN, which is
given by (1).
𝐻(𝑠) =
𝑠𝐶
(
𝑅
*
(1+ 𝑠𝐶
(
𝑅
-
)(1 + 𝑠𝐶
*
𝑅
*
)
𝑅
(
𝑅
(
+ (1 + 𝑠𝐶
.
𝑅
(
) 𝑅
.
𝜔
0
𝜔
0
+𝑠11+
𝑠 𝐶
(
𝑅
*
(1+𝑠 𝐶
(
𝑅
-
)(1+𝑠𝐶
*
𝑅
*
)
2
(1)
The definition and values for each of the circuit components in the small signal model are listed
in Table 2-2. The analysis assumes a simple model for the transducer in receive mode as a
capacitance (C3) in series with the small signal input voltage (VIN). The analysis also assumes
interface to a configurable ultrasonic imaging system (Verasonics Vantage 128, Verasonics Inc.,
Kirkland, WA, USA) using a standard ultrasound cable modeled simply as a capacitance to ground
(C2) in parallel with the system input resistance to ground (R3). The output is taken after the series
38
resistance (R2) comprised of the preamp protection switch (RX2 in Figure 2-2) and the cell
selection switch (SEL in Figure 2-2). The output is dropped across the parallel circuit of C2 and
R3. The bandwidth of the amplifier wt is assumed to be 2p ´ 20 MHz for the model.
The model in (1) was analyzed using Matlab and the model parameters were fit to the results of
Cadence SPECTRE simulations as well as actual lab measurements of the fabricated devices
interfaced to the Verasonics system using a standard ultrasound cable (Philips/ATL L7-4 type
purchased used).
The magnitude of the frequency response for (1) is plotted in Figure 2-7(a) and also includes the
results of the transistor level implementation of the circuit in Figure 2-2. The circuit was simulated
for the receive case without noise using SPECTRE simulation and included the transistor level
preamp and high voltage switch circuits. Fig 7 (a) shows results assuming a standard cable
capacitance load (blue line) as well as the case for an unloaded condition (red line). The transistor
level simulation and lab measured data in Figure 2-7 are all plotted using caret symbols.
Table 2-2. Fitted design parameters and model values for
ASIC-1 simulations and testing assuming cable loading
Parameter Model SPECTRE
Simulation
Lab Test
Receive
Feedback
Capacitor
C1 2.5 pF 2.5 pF
Feedback Resistor R1
100 kW 100 kW
RX1 RON R4
411 W 411 W
RX2, SEL RON –
250 W
–
TX –
500 W
–
RX2+SEL RON R2
700 W 520 W
Cable Capacitance C2 100 pF 150 pF
Verasonics Rin R3
8 kW 8 kW
Transducer Model C3 5pF 6 pF
Amplifier BW
wt 2p´20´10
6
2p´20´10
6
39
Both the analytical model and the transistor level simulation predict the maximum gain occurring
near 2 MHz for a minimal loading condition (10 pF) and then decreasing linearly in dB to a -3dB
frequency of 6.8 MHz. When operated instead with a modeled cable load (100 pF), the response
peaks at 1.2 MHz and the -3dB frequency occurs much lower (3.1 MHz). The required operating
range for the array modules is between 2 MHz and 5 MHz and within this range the signal roll-off
(-6 dB) of the preamplifier is acceptable for initial imaging. This loss would be mitigated in future
ASIC designs with an on-chip cable driver similar to the commercially available MAX4805 which
Figure 2-7. Frequency response of the unit cell preamplifier (ASIC-1)
(a) compares analytical model (solid lines) to SPECTRE transitor-level simulations (carets) for minimal output loading (red) vs.
ultrasound cable loading (blue), and (b) compares analytical model (solid line) to lab measured data (carets) with cable loading
and interface to the Verasonics system. The fitted analytical model obtains good results vs. SPECTRE simulation and lab
measurements. The measured lab data cuts off more sharply near 1MHz due to the lower band edge cutoff of a Verasonics system
digital bandpass filter at the input.
40
should yield results similar to the unloaded case [red line in Figure 2-7(a)]. Figure 2-7 (b) shows
electronics-only lab-measured results for the unit cell interfaced to the Verasonics system. For this
test a 6 pF capacitor and a sinewave generator input modeled the transducer in receive mode. The
measured results for this test were similar to the cable-loaded case in Figure 2-7(a). The analytical
model of (1) was fit to the measured data with the parameters in Table 2-2 and is also plotted in
Figure 2-7 (b) for comparison. In this case a cable load of 150 pF in the analytical model yielded
satisfactory fitting results [Figure 2-7 (b)].
2.1.4 Integration with Ultrasound System
For imaging, the ASICs have been successful integrated with a Verasonics Vantage 128 system
which allows for direct control of the beamforming parameters. Control of the ASICs was
accomplished using an Arctix 7 FPGA (Xilinx Inc., San Jose, CA, USA) integrated on the distal
end of the probe cable, local to the ASICs and transducer array.
The Verasonics system is designed to program industry standard muxed probes using an 8-bit
serial interface integrated in the ultrasound cable. To increase flexibility in control of the ASICs,
we have implemented a command control protocol on top of this serial interface using codes which
serve as keys to a look up table stored locally in the FPGA and read out in real-time during imaging.
To reduce jitter, we use Verasonics system channel 1 as a timing signal that initiates and
synchronizes the probe transmit/receive cycles to the system. The databus rate for the Verasonics
communication is 1 MBPS, whereas communication with the ASICs occurs at 40 MPBS. The
higher data rate allows reconfiguration of the switches to be accomplished immediately after the
end of the transmit cycle so that a minimal amount of the receive signal is lost when different
transmit and receive configurations are used (e.g. for synthetic aperture imaging). The VHDL
41
control circuitry also generates all of the timing control signals which are required to actuate the
high voltage switches.
Low Charge-Injection Switching ASIC (ASIC-2)
An important consideration for an electronically scanned array is the reduction of image artifacts
caused by mux switch actuation. This problem is especially acute in arrays where a different
multiplexing array configuration is used for the transmit vs. the receive cycle (e.g. full synthetic
Figure 2-8. Low switching-noise architecture switch implemented in ASIC-2.
Resistors R1 and R2 have been added to the ASIC-1 switch design (Figure 2-4) to effectively reduce the applied V gs voltage across
M1 and M4 which in turn reduces the drain currents in these devices, and slows down the charge on and off times for the control
node of M8 and M9 and thereby reduce the charge injection seen at SW1 and SW2.
42
aperture beamforming). Switch actuation can lead to electronic switching transients (or “glitches”)
being coupled to the array elements due to charge injection. The simultaneous transition of
thousands of switches in a large 2D array emits a plane wave due to this coupling, and results in
visible image artifacts for strongly echogenic targets (e.g. flat plate reflectors, and wires).
Testing of the ASIC-1 switch architecture (Figure 2-4) indicated the presence of switching
artifacts which were visible in initial images for highly echogenic targets. The ASIC-2 device was
designed with a new low charge-injection switch architecture to mitigate this effect (Figure 2-8).
The topology is a modification that reduces the charge injection on the switching terminals (SW1
and SW2) and thereby leads to a reduction in the observed image artifacts due to switching.
Figure 2-9. Validation of electrical function of the ASIC-1 device.
(a) Receive test showing transition from the transmit (TX) to the receive (RX) state with the output being driven by
the on-chip preamplifier for a 2 MHz input signal applied with a probe needle at the unit cell pad, with a 1 µs switch
on transient, (b) High Voltage switch test showing actuation of the mux select switch in response to digital control
signal input. Output follows 50 Vpp input with reduction to 40 Vpp due to filtering of the switch RON driving the
cable load.
43
The switch consists of high side (M1-M3) and low side (M4-M7) high voltage level shifters
which charge and discharge the gate-source capacitance of the actual high voltage switching
devices M8 and M9. Charge injection is a well-known phenomenon in CMOS circuits that is
caused by establishing (switch on) and quenching (switch off) of the conduction channel under the
MOSFET gate (Razavi, et al., 2000; Wegmann et al., 1987). There are many techniques for
reduction of charge injection including the use of dummy switches and modulation of the gate-
source charging waveform (Razavi, et al., 2000; Wegmann et al., 1987). For the circuit of Figure
2-8, drain resistors (R1 and R2) effectively improve fine control of the gate voltage and thereby
allow the creation of a reduced control current at the drains of the turn on (M1) and turn off (M4)
control FETs. The reduced control current translates to a similar reduction in the current in the
drains of M3 and M5 which leads to reduced voltage edge rate on the gate source nodes of M8 and
M9 and results in lower charge injection (Razavi, et al., 2000; Wegmann et al., 1987). FETs M5-
M7 implement a Wilson current mirror which has higher output resistance and helps prevent
charge on the Control node from leaking.
The unit switch cell circuit of Figure 2-8 was used to build the ASIC-2 multiplexing devices
designed to interface to an array of 5 columns and 8 rows of transducer elements. Other than the
reduced switching noise, the ASIC-2 design has similar architecture and control as the ASIC-1
design, however it omits the buffer amplifier. This ASIC design was implemented using the same
0.35 µm 50V CMOS fabrication process as the ASIC-1 devices (AMS H35) (ANS Design Rules,
2009).
Electric Module Validation
Prior to integrating the ASICs with the acoustic stack PCBs, ASIC functionality was evaluated
using a needle probe and benchtop testing. The ASICs were connected to power and ground, as
44
well as individual analog channel input/outputs. The ASICs were also directly interfaced to the
FPGA controller which generated all of the timing and data signals for programming the ASIC
and actuating the switches in real-time.
A probe needle landed on the transducer interface pad at the center of each ASIC-1 device unit
cell and provided direct access for monitoring the multiplexed signals as well as for applying test
signals for input stimulus for the preamplifiers.
We validated both the transmit and receive functionality separately for the ASIC-1 devices by
electronic testing with the probe needles with results shown in Figure 2-9. Figure 2-9 (a) shows
the receive path test, with a low voltage signal applied at the probe needle landing on the transducer
interface pad, through a 6 pF series capacitance which is meant to model the capacitance of the
1.75D transducer elements. The green trace in the figure is the control signal for actuating the TX,
RX1, and RX2 switches to switch the input signal between the bypass path around the amplifier
and the amplifier itself. The red trace is the low voltage analog signal applied through the
capacitance to the probe needle. The blue trace is the measured signal at the output of the ASIC
preamplifier, as provided to the oscilloscope through one of the I/O pads at the top of the ASIC
column for the respective cell. This test demonstrates low voltage functionality of the switching
circuits as well as amplification through the receive preamplifier.
To validate high voltage switch functionality as shown in Figure 2-9 (b), a 50 Vpp test signal
(blue) was applied to the I/O pads at the top of the ASIC, which then routed this test signal down
the analog bus in the respective column of the ASIC. The digital control signals were actuated to
turn on the high voltage switches in the cells and the resulting transmit signal (red) was detected
at the probe needle. After the switch was digitally actuated, the red trace followed the blue trace
45
with a slight phase delay due to propagation delay on test cables and through the ASIC electronics,
demonstrating effective operation of the device.
Conclusions
This chapter presented results of fabrication and testing of multiple generation ASIC switching
devices for implementation of large area probes with improved image quality. In testing with co-
integrated acoustic arrays (Chapters 3 and 4), the ASIC-1 based modules produced images with
excellent axial resolution and acceptable lateral resolution, however they also displayed significant
ghost echoes when imaging highly echogenic targets. This effect was discovered to be due to
charge-injection on the high voltage switches. The ASIC-2 based modules benefited from a low
charge-injection high voltage switch architecture ASIC and demonstrated -30 dB reduction in
observed switching artifacts relative to the ASIC-1 results. Future work will integrate multiple
modules to implement a large aperture 1.75D array with improved lateral resolution and reduced
switching artifacts.
46
DIRECT ASSEMBLY PROTOTYPE
Introduction
The implementation of large 2D array apertures requires the close integration of a two-
dimensional assembly of transducer elements with interface electronics located either immediately
behind the elements or near the array (physically in the ultrasound probe handle). This close
integration of hundreds or thousands of 2D array elements and processing electronics involves
many of the same challenges that have been addressed in existing smaller 2D matrix arrays used
in clinical practice; these include interconnect density, as well as beamforming and system channel
count and the associated complexity of implementation. In addition, because of their size, large
arrays must be made using high yielding processes if they are to be practical for production at
reasonable cost.
Interconnection to a large number of 2D array elements has been addressed using sparse
channel distribution (Turnbull et al., 1991; Austeng et al., 2002; Diarra et al., 2012; Yen et al.,
2000) Sparse element geometries reduce the number of processing channels needed; however, this
is an imperfect solution because it leads to increased sidelobe energy and the signal to noise ratio
(SNR) suffers due to lower echo energy (Savord et al., 2003). Later work for implementation of
2D arrays improved the interconnect density to the elements using dense flex circuits (Fiering et
47
al., 2000; Lee et al., 2004) which allows more channels to be used. The use of a conductive backing
fabricated by drilling holes in a matrix material (Smith et al., 1992) or building up a grid of wire
frames or graphite (Greenstien et al., 1997; Woo et al., 2014) has also been proposed. Recent
implementations have integrated the 2D transducer arrays directly on interface electronics utilizing
an interfacing surface layer such as epoxy and dense quarter wavelength matching materials (Kang
et al., 2017; Lee et al., 2012; Manh et al., 2016; Wildes et al., 2016) and by flip-chip bonding
(Jiang et al., 2017; Wygant et al., 2009).
An important consideration for large aperture arrays being developed for novel imaging
algorithm applications is overall yield. Poor yield of connections to the individual transducer
elements can significantly degrade the performance of a beamforming array (Kofler et al., 2001;
Vachutka et al., 2014; Weigang et al., 2003). In addition, low yield on interface electronics has the
potential to disable a large section of the array should a particular component of the interface and
muxing electronics become inoperative. Lastly, a low yielding array process can result in a
significant number of rejected parts, increasing the cost of the individual large area arrays, in effect
limiting the availability and application of these devices. The proposed solution to improve yield
during fabrication of large arrays is to take a modular approach (Kang et al., 2017; Lee et al., 2017;
Triger et al., 2010; Lin et al., 2013), where individual sub-modules are first fabricated, evaluated
and sorted, and only known good modules may be integrated to form the much larger array.
To address the challenges for high density 2D transducer arrays, we have been developing
modular integrated electronics and 2D array fabrication processes which implement closely
integrated processing and sensing functions. In this chapter, we provide a detailed description of
the design, fabrication and testing of a prototype 2D array module based on this approach,
48
including integrated electronics, and a novel acoustic stack module developed specifically for this
prototype. The acoustic module consists of a 1-3 composite of PIN-PMN-PT (lead indium niobate-
lead magnesium niobate-lead titanate) single crystal piezoelectric material; the design and process
flow for fabrication of which will be described in detail. The acoustic stack is built on top of a
novel 3D printed interposer backing which provides direct connection for the large number of 2D
array elements to the surface of the interface ASICs as well as attenuating acoustic energy at the
backside of the array. Backside attenuation is critical to suppress ringing and leads to improved
bandwidth resolution (Shung et al., 2015) and excellent pulse width which results in high quality
images with good axial resolution. The completed 2D module has been interfaced to a Verasonics
Vantage 128 system, and wire-target images were acquired, demonstrating performance of the
array.
Figure 3-1. Schematic representation of the proposed 2D array by direct assembly
Showing an array of 26 modules, 2 in elevation and 13 in azimuth, illustrating interconnect of the 2D transducer
array elements and ASICs by a highly integrated grid of interposer backing pillars.
49
Modular Direct Assembly Array Concept
The concept for the modular direct assembly array with interposer backing is illustrated in Figure
3-1. A wide aperture is created by tiling multiple array modules in both azimuthal and elevational
directions. Each module consists of an acoustic stack with multiple matching layers (shown in
white), the interposer backing (providing both electrical 2D connectivity and backside acoustic
attenuation and shown in blue), and the respective interface ASICs for each of the modular arrays
(shown as tan).
The ASICs used here consist of an array of unit cells each of which has a buffer amplifier and
associated high voltage multiplexing circuitry. The ASIC grid consists of 5 columns of 8 unit cells
each at a pitch of 340 µm in azimuth and 275 µm in elevation. The ASICs are designed to be tiled
in the azimuthal dimension to yield very wide apertures and can also be tiled in two rows in the
elevation dimension to increase the elevational aperture for finer focusing in elevation. Tiling is
facilitated by a design in which only 1 of the 4 edges of the device has bond pads. This
configuration is not typical for production ASICs however it has been used for tiled sensor arrays
(Fisher et al., 2007; Ballabriga et al., 2012) with direct assembly. Removing the bond pads from
the 3 tiling edges allows the individual ASICs to be placed very close to each other and thereby
minimize gaps which lead to acoustic dead area.
The interposer is a 2D grid of conducting pillars with acoustically-absorbing properties that has
been fabricated with the aid of a 3D printed acrylic grid mold. The pitch in azimuth and elevation
of the interposer matches with the respective dimensions on the ASICs, thereby making it possible
to assemble the interposer and acoustic stack directly on to the surface of the electronics substrate.
50
The 2D transducer array, in turn, is built directly on top of the interposer and it also matches exactly
the pitch of the ASIC 2D array in azimuth and elevation.
The combined modular assembly is designed to implement a 1.75D array (Wildes et al., 1997;
Fernandez et al., 2003) which is capable of dynamic receive focus in elevation for uniform and
reduced elevational slice thickness. This is intended to improve contrast to noise ratio (CNR) by
reducing the effects of out of plane artifacts on in-plane anechoic regions (e.g. fluid filled cysts).
Imaging in the azimuthal dimension is accomplished by connecting each ASIC column to a unique
Verasonics system channel. Imaging in the elevation dimension can be accomplished by synthetic
aperture imaging by rows which can be done either on transmit or receive, or in both cases
(Fernandez et al., 2003).
Table 3-1. Modular 2D Array Design Goals.
Parameter Value
Module Tiling
2 ´ 13
Number of Elements
16 ´ 65
Aperture Size
4.5 mm ´ 22 mm
ASICs Used 26
System Channels (1.5D) 65
Array Module Cells
8 ´ 5
Pitch
275 µm ´ 340 µm
Module Size
2.2 mm ´ 1.7 mm
Center Frequency 4.5 MHz
* All array dimensions are Elevation ´ Azimuth
51
Figure 3-1 illustrates one possible array configuration for the proposed modular array, consisting
of 13 tiled modules in azimuth and 2 tiled modules in elevation. In this case, the pitches in azimuth
and elevation match those of the existing ASIC. The azimuthal pitch is one lambda at the center
frequency of 4.5 MHz. With 13 of the modules tiled in azimuth and 5 columns for each module,
there are a total of 65 channels in this example configuration. The overall azimuthal aperture given
the ASIC dimensions in Table 3-1 is 22 mm, and the elevational aperture is 4.5 mm. These
dimensions assume no gaps between the arrays. Ultimately, the array could be increased to a full
9 ´ 44 mm aperture for clinical imaging by increasing the size of the ASICs in elevation. A
redesigned ASIC could also be optimized for larger elevational pitch taking advantage of the
reduced need for steering in elevation for a 1.75D array.
Figure 3-2. Schematic cross-section of the acoustic stack assembled to an ASIC substrate.
Illustrating the interposer with terminals assembled to the ASIC using conducting adhesive and gold bumps, the 3D
printed acrylic grid support for the interposer backing pillars, the PIN-PMN-PT composite and dual matching
layers. Layer thicknesses are not shown to scale.
52
Using 128 of the Verasonics Vantage system channels to allow simultaneous access to all of the
individual elements in elevation creates a 1.75D array capable of limited steering and imaging in
the elevational dimension. It is also possible to use only 64 system channels in the azimuthal
dimension and tie the mirrored elements together along the midline, which creates instead a 1.5D
array that cannot be steered in elevation but uses fewer system resources.
Figure 3-3. Process flow for fabrication and assembly of the acoustic stack.
(a) Assemble the composite with first matching layer to the interposer, (b) dice and fill the 2D array, (c) sputter top
electrode for ground, (d) glue second matching layer, (e) flip over stack and dice the bottom terminals for assembly
to ASIC, (f) assemble to ASIC.
53
Table 3-1 provides a summary of the design goals for the proposed modular 2D/1.75D array.
Acoustic Stack-Up
Figure 3-2 illustrates the cross-section of the stack-up for the unit array modules. The module
includes the ASIC substrate with gold bumped pads that are bonded to the interposer bottom
terminals with conductive adhesive. The interposer itself is a 2D array of cured conductive epoxy
pillars, which are each topped by a 1-3 composite pillar array of PIN-PMN-PT piezo material. The
composite pillars are then covered by two distinct matching layers and an intervening gold
sputtered electrode linking them all together to create the common ground connection. This
transducer ground is further connected to interposer pillars which bring it down to be made
available to the ASIC for connection to the system ground.
Process Flow
The complete process flow for fabrication of the direct assembly transducer/ASIC module using
the 3D printed interposer grid is summarized in Figure 3-3 The process begins with fabrication of
the interposer which serves both as an acoustic backing absorber and also as a 2D interconnect that
links the transducer elements to the ASIC. The next step in the process is fabrication of the
composite which is done in the lab using standard dice and fill methods. This is followed by casting
and lapping of the first matching layer which is a silver loaded epoxy. The composite and first
matching layer are then assembled to the interposer to form the acoustic stack. The stack is diced
in the X and Y dimensions to singulate the 2D array elements. The kerfs are filled, the top electrode
is sputtered, and then the second matching layer is laminated on top of the array. The completed
acoustic stack is then assembled to the ASIC modules using conductive adhesive. The ASICs are
fabricated by an external vendor and come singulated for assembly; they are mounted to a PCB
54
and wire-bonded for connection of the I/O pads to the system. Each of these steps are described in
further detail below.
Composite
Composite piezo material is used extensively for single element transducers as well as for linear
arrays (Cha et al., 2014); however, it is not commonly used for 2D arrays. Here we construct a
1.75D array which is in effect a hybrid between a linear and a 2D array. In this case, using 1-3
composite is beneficial to obtain high fractional bandwidth (FBW). The composite is composed of
piezo pillars of single crystal material (e.g. PIN-PMN-PT) with the kerf being filled with non-
conducting epoxy (e.g. EPO-TEK 301). The main advantage of a piezo composite, be it 1-3
composite or 2-2 composite, is in reducing coupling of acoustic energy into lateral modes, which
would normally decrease the electromechanical coupling coefficient of the piezo material (Kim et
al., 2006).
The goal for composite fabrication is to approximate k33 for the material which corresponds to
exclusive resonance in the longitudinal mode. This can be accomplished as long as the element
heights are greater than twice their width. As an example, the bulk kT for the PIN-PMN-PT
material used (PIN24, CTS Corp., Bolingbrook, IL, USA) is 0.5, (CTS Datasheets, 2018) (slightly
lower than that for PMN-PT material which is typically 0.6), whereas k33 is 0.89. The use of
composites results in improvement in FBW (Cheng et al., 2003) that is associated with this increase
in electromechanical coupling.
In general, 2D arrays are not made using composite material since they are pitched at l/2 to
reduce the effects of grating lobes when steering greater than 30
o
off axis which is necessary for
volumetric imaging. This design choice (l/2 pitch) results in pillars with a high aspect ratio and is
55
therefore similar to a 1-3 composite. However, for the case of a linear array, the pitch is most often
chosen to be l because there is not a requirement for extensive steering, and also, due to the fact
that a larger pitch array is easier to fabricate. The fabricated array presented here is a linear array
which is intended to have wide bandwidth and is subdivided into multiple elements in elevation in
order to create a finely focused elevational plane. The array is diced to create a composite in both
the lateral and elevational dimensions in order to take full advantage of high FBW in both the
azimuthal and elevational planes.
Design of the composite can be completed simply by assuming half width pillars; however, if
we do so then we give up a significant amount of acoustic output, since only one quarter of the
aperture is active with a 25% volume fraction (VF) 1-3 composite. We may increase the width of
the composite pillars, thereby increasing the VF to increase the acoustic output of the array;
however, at some point the electromechanical coupling coefficient for the material will drop
significantly as the material begins to look more like bulk material than a true composite. For our
application, where penetration is important, we wish to maximize both the acoustic output as well
as the FBW by judicious choice of the VF for the specific piezo and matrix materials that we will
use for the composite. In addition, we would like to obtain a model of the composite material for
simulation purposes to aid in optimizing properties for the acoustic matching layers.
An analytical model for composites which has been described previously in the literature (Chan
et al., 1989; Smith et al., 1991) was used for optimization and comparison with fabricated results.
Using the model, the density of the composite material is defined by
𝜌̅ =𝜈 𝜌
6
+𝜈 7𝜌
8
(1)
56
where, n is the VF of the piezo material in the composite, 𝜈 7 =1−𝜈, is the VF for the matrix
material, 𝜌
6
is the density of the piezo material and 𝜌
8
is the density of the matrix material. The
composite values for the longitudinal mode for the elastic stiffness, piezoelectric, and dielectric
constants are given by
𝑐̅ ((
;
= 𝜈1𝑐
((
;
−
. < =>
?@
AB
@?
C
DB
@E
F
E
G
2+𝜈 7𝑐
**
(2)
𝑒̅ ((
= 𝜈I𝑒
((
−
. < =>
?@
AB
@?
C
DB
@E
F
G
J+𝜈 7𝑐
**
(3)
𝜖̅ ((
L
= 𝜈I𝜖
((
L
−
. < =>
?@
E
G
J+𝜈 7𝜖
**
8
(4)
𝑐̅ ((
M
=𝑐̅ ((
;
+ 𝑒̅ ((
.
/𝜖̅ ((
L
(5)
where 𝛾 =𝜈 (𝑐
**
+𝑐)+𝜈 7(𝑐
**
;
+𝑐
*.
;
) is used to simplify the notation.
The electromechanical coupling coefficient 𝑘
Q
0
, the acoustic impedance, 𝑍
̅ , and the longitudinal
velocity, 𝑣̅ T
, for the composite are then determined as follows,
𝑘
Q
0
=𝑒̅ ((
/ (𝑐̅ ((
M
𝜖̅ ((
L
)
*/.
(6)
𝑍
̅ = (𝑐̅ ((
M
𝜌̅)
*/.
(7)
𝑣̅ T
=(𝑐̅ ((
M
/ 𝜌̅)
*/.
(8)
57
Table 3-2 summarizes the material parameters used for the bulk piezo material, PIN24%-PIN-
PT, (CTS Corp., Bolingbrook, IL, USA), as well as the matrix material EPO-TEK 301 (Epoxy
Technology, Billerica, MA, USA). Analytical results were computed for 𝑍
̅ , 𝑘
Q
0
, r, and 𝑣̅ T
, with
respect to VF given the material parameters in Table 3-2, using Matlab (MathWorks, Natick, MA,
USA). A VF of 65% was selected as a reasonable tradeoff between sensitivity, bandwidth and ease
of fabrication. The values of the acoustic parameters predicted by the analytical model for this VF
are summarized in Table 3-3.
Table 3-2. Composite Material Parameters
Value Units Description
𝒄
𝟏𝟏
𝑬
12.43 ´ 10
10
N/m
2
Stiffness of PIN24%-PMN-PT <11>
𝒄
𝟏𝟐
𝑬
10.90 ´ 10
10
N/m
2
Stiffness of PIN24%-PMN-PT <12>
𝒄
𝟏𝟑
𝑬
11.02 ´ 10
10
N/m
2
Stiffness of PIN24%-PMN-PT <13>
𝒄
𝟑𝟑
𝑬
12.45 ´ 10
10
N/m
2
Stiffness of PIN24%-PMN-PT <33>
𝒆
𝟑𝟏
-9.11 C/m
2
Transverse piezoelectric constant
𝒆
𝟑𝟑
17.60 C/m
2
Longitudinal piezoelectric constant
𝝐
𝟎
8.854 ´ 10
-12
F/m Permittivity of free space
𝝐
𝟑𝟑
𝑺
𝝐
^
×868 F/m Clamped dielectric constant
𝝆
𝒄
8122 kg/m
3
Density of bulk PIN24%-PMN-PT
𝒄
𝟏𝟏
0.81 ´ 10
10
N/m
2
Stiffness of EPOTEK-301 <11>
𝒄
𝟏𝟐
0.46 ´ 10
10
N/m
2
Stiffness of EPOTEK-301 <12>
𝝆
𝑷
1150 kg/m
3
Density of EPOTEK-301
𝝐
𝟏𝟏
𝝐
^
×4 F/m Dielectric constant of EPOTEK-301
58
The acoustic/electric module (described in 3.10) utilized the ASIC of Chapter 2 that incorporates
a buffer amplifier at each element to help match the impedance of the transducers to the system
cable and input impedance. This ASIC buffer has a bandpass response that peaks at low frequency.
To counteract this effect and obtain wider bandwidth, we designed the composite to be centered at
a frequency of 6.25 MHz which is higher than our final array design frequency of 4.5 MHz.
The l pitch at fc = 4.5 MHz can be calculated given the speed of sound, c, in tissue as follows:
𝜆 =
B
f
g
(9)
Table 3-3. Acoustic and design parameters
Param. Analytical
[Eq. (1)-(8)]
Final KLM
Device Model
Description
VF 65% 65% Volume Fraction
𝒁
i
20.8 MRayls 20.3 MRayls Composite Impedance
𝒌
𝒕
QQQ
0.80 0.68 Electromechanical
Coupling Coefficient
𝝆 i 5682 kg/m
3
5600 kg/m
3
Density
𝒗
𝒍
i 3665 m/s 3620 m/s Velocity
𝒁
𝒎𝟏
6.74 MRayls 7.2 MRayls ML1 Impedance
𝒁
𝒎𝟐
2.18 MRayls 1.8 MRayls ML2 Impedance
𝒕
𝑪
290 µm 280 µm Composite thickness
𝒕
𝒎𝟏
70 µm 55 µm ML1 thickness
𝒕
𝒎𝟐
75 µm 85 µm
ML2 thickness
𝒕
𝒃
4 mm 4 mm Backing thickness
59
which results in a pitch of 1540
s
t
4.5 𝑀𝐻𝑧 ⁄ =342 𝜇𝑚. This element pitch matches the
azimuthal pitch of the ASIC electronics. For the elevational pitch, we use the designed pitch of the
ASIC in elevation, 275 µm, which provides a slight advantage for steering in elevation if needed.
The 1-3 composite pillar pitch for these array pitch values was 170 µm, and 138 µm in azimuth
and elevation, respectively. For the 65% VF, corresponding composite pillar widths were 137 and
111 µm in azimuth and elevation respectively. For simplicity of fabrication, a dicing kerf of 30
µm was used in both dimensions.
Composite Thickness and Matching Layer Design
The thickness for the composite at the 6.25 MHz design frequency can be calculated using
(Wang et al., 2013; IEEE Standard 176-1987, 1988),
𝑓
~
=
i
. 0
g
(12)
which sets the anti-resonance frequency, fa of the composite given the composite longitudinal
velocity vl, and the thickness, tc. For low k materials (12) is frequently used as an approximation
for the resonance frequency, fr , (IEEE Standard 176-1987, 1988; Shung et al., 2015); however the
high k value for PIN-PMN-PT makes (12) appropriate for fa for this design. The analytical model
given by (1)-(8), predicts a composite speed of sound of 3665 m/s, which for 6.25 MHz and (12)
corresponds to a composite thickness of 290 µm.
60
Figure 3-4 shows a plot of KLM model (PiezoCAD, Sonic Concepts, Bothell, WA) and
measured results for the transmit electrical impedance, Z, in air for the composite design described
above. This composite measured 11 mm ´ 5 mm ´ 0.29 mm and was fabricated according to the
process outlined in Section 3.7. The plotted data compare KLM results, Zm, given measured
parameters for an actual fabricated composite (dashed lines) and measured impedance data, Zd
Figure 3-4. Transmit electrical impedance in air for composite without backing or matching layers
Showing phase and magnitude of the data with linear axes. Solid lines are for the measured data (Zd) for an 11 mm
x 5 mm x 290 µm thick composite sample, dashed lines are for the KLM model (Zm) using final fabricated material
parameters.
61
(solid lines) from a representative fabricated composite sample. As can be seen in Figure 3-4, we
obtained excellent agreement between the KLM model and measured data.
The coupling factor, 𝑘
0
i
, of the fabricated composite was determined from the measured data by
(IEEE Standard 176-1987, 1988),
𝑘
0
i
=
.
f
f
tan
.
f
Df
f
(13)
where fa is the anti-resonance frequency and fr is the resonance frequency and was found to be 0.77
after poling which was close to that predicted by the analytical model (0.8). The density of the
composite was calculated by measuring the volume and mass and found to be 5100 kg/m
3
.
A two matching layer system was used to optimize the bandwidth of the array. The impedance
of these materials can be determined by (Desilets et al., 1978),
𝑍
s*
= A𝑍
-
𝑍
T
(
F
*/
(14)
𝑍
s.
= A𝑍
𝑍
T
F
*/
(15)
where, 𝑍
, is the acoustic impedance of the composite (20.8 MRayls predicted by the analytical
design), and 𝑍
T
=1.50 𝑀𝑅𝑎𝑦𝑙𝑠 is the acoustic impedance of water. 𝑍
s*
and 𝑍
s.
are the acoustic
impedance values of the first and second matching layers respectively and can be computed from
(14)-(15) as 6.74, and 2.18 MRayls respectively.
62
Using a widely available database (Selfridge et al., 1985) of acoustic parameters for various
materials, we selected the second matching layer material to be Acrylonitrile Butadiene Styrene
(ABS) with Z = 2.2 MRayls. The first matching layer was a silver epoxy mixture consisting of 2-
3 µm sized silver particles in Insulcast 501 that has a reported acoustic impedance Z = 7.3 MRayls
(Wang et al., 2001). Material parameters for these matching layers are listed in Table 3-4. We used
70 µm thickness for the first matching layer and 75 µm for the second matching layer in a KLM
model for the complete acoustic stack. The final fabricated matching layer thicknesses were 55
µm and 85 µm for the first and second matching layers respectively. These values have been
summarized in Table 3-3.
The backing thickness was chosen such that the roundtrip attenuation would be greater than -
40dB. The material used for this design was E-Solder 3022 which has attenuation between 13
dB/cm/MHz and 37 dB/cm/MHz, depending on whether or not it is centrifuged (Wang et al.,
2001). For this design, the E-Solder was centrifuged; however it is also part of an acrylic matrix
in the backing interposer (described in Section 3.7 below), and we therefore expect the final
attenuation to be lower than reported in the literature. For the purpose of design, we used a nominal
value of 20 dB/cm/MHz as an initial starting point. We calculated the required thickness of the
backing by assuming -20 dB attenuation in one direction at 2.5 MHz, which results in a minimum
backing thickness of 0.4 cm.
Results for the KLM model of the acoustic stack will be presented in Section 3.8 and compared
to the final measured data.
63
Fabrication
Fabrication of the acoustic stack for the modular prototype was done in a batch process, starting
with a larger grouping of 2D array elements which was later diced into smaller sub-arrays for
assembly to the ASIC. This process [Figure 3-5(a)-(g)] includes fabrication of the interposer, the
composite, 2D dicing of the assembled acoustic stack and lamination of multiple matching layers.
The final acoustic sub-array module for ASIC assembly had 5 × 6 acoustic transducer elements,
and the batch array had a grouping of 3 of these smaller sub-arrays. While the ASIC used
Figure 3-5. Fabrication of multi-array acoustic module.
(a) interposer, (b) composite, (c) composite with first matching layer laminated to interposer with dicing along the
azimuthal direction, (d) dicing in elevation direction, (e) gold sputtered electrode, (f) Lamination of second matching
layer, (g) Cross-sectional view of completed single module acoustic stack; each multi-array module has 3 stacks
which are diced out prior to assembly.
64
implements a 5 × 8 array, we reduced the final acoustic aperture in elevation to avoid overlapping
and potentially damaging the bond wires near the top of the ASIC assembly [Figure 3-7 (a)]. In
this section, fabrication of the 1 × 3 grouping of sub-arrays will be described.
Figure 3-6. Interposer fabrication process
(a) the initial 3D printed acrylic grid with 340 µm x 275 µm elements and supporting outer frame, (b) close-up of
the acrylic grid with empty tubes that will be filled with conducting epoxy for the backing, (c) completed interposer
backing with cured E-Solder conducting epoxy filling the acrylic grid, (d) cross-section of the completed interposer
illustrating the high aspect ratio of the pillars and grid walls, (e) close-up of holes in the side-walls of a rejected
acrylic grid, and (f) close-up of a similar grid that has been filled with silver epoxy illustrating bridging shorts
between adjacent pillars.
65
Interposer backing
The interposer was fabricated by a hybrid process which uses a 3D printed acrylic grid as a mold
for conductive backing material (Figure 3-6). The mold becomes part of the final interposer and
serves to electrically isolate the channels from each other and also increases structural integrity
and dimensional stability of the pillar array.
It is possible to fabricate an interposer pillar array by dicing a solid block of backing material;
however the aspect ratio for the isolating walls by dicing cannot be made greater than 20:1, due to
the limitation of the maximum blade exposure. For the tall backing required (e.g. 4000 µm), this
results in isolation walls that are almost as wide as the element pitch itself (4000/20 = 200 µm).
Therefore, the advantage of using 3D printing is the ability to produce backing stacks which have
very high VF for the acoustically attenuating material (E-Solder 3022) vs. the grid matrix (acrylic).
This allows for a sharper pulse/echo response and therefore improved -20 dB pulse width (due to
reduced ringing), which in turn improves the axial resolution.
The interposer grid frames [Figure 3-6(a)-(b)] were printed using a ProJet 3500 HD printer (3D
Systems, Inc., Rock Hill, SC, USA) in XHD mode using VisiJet M3 Crystal acrylate material. The
printer has a published resolution of 750 DPI (34 µm) in the X and Y dimensions parallel to the
printing platen and 1600 DPI (16 µm) layer thickness. Figure 3-6(a) shows an example grid printed
by this process for the direct assembly array. The pitch for the interposer is designed to match the
ASIC which also matches the transducer composite pitch, being 340 µm in azimuth and 275 µm
in elevation. To maximize the volume of backing material contained in the grid holes, the walls
were designed to be printed at the minimum feature size of the printer. In this case, the best
resolution of the printer should be used in the elevational dimension since the elevation pitch is
66
finer than the azimuthal pitch. This was achieved by rotating the part in the design to orient the
elevation direction parallel to the printing platen. The achieved wall thicknesses were 30 µm in
elevation and 100 µm in the azimuthal direction.
After printing, the grid holes contained a sacrificial layer of a wax-like vendor-proprietary
material which must be cleared. We attempted to clear the wax using solvents including alcohol,
acetone, trichloroethylene, and the manufacturer’s own proprietary liquid. Cleaning with the
solvents resulted in the fine walls of the grid being significantly damaged. The most effective
method to clear the wax was found to be a combination of heat (75 ℃ oven) and capillary action
(Kimwipes, McMaster-Carr Supply Company, Santa Fe Springs, CA, USA). An important issue
with the finely printed interposer grids for the arrays is the presence of pin-holes in the very thin
walls between interposer channels [Figure 3-6(e)-(f)], which lead to shorting between the elements
due to E-Solder bridging through the holes. After clearing the wax, the walls of the interposer were
inspected for these holes and grids with obvious defects were discarded.
The grids were filled using the following process: First, a 3D printed acrylic containment dam
was glued to a 2”´ 2” piece of carrier glass and filled with E-Solder 3022 conductive adhesive
(Von Roll Isola, New Haven, CT, USA). This assembly was then centrifuged before applying the
grids. E-Solder is known to increase its acoustic attenuation after centrifugation (Wang et al, 2001).
This can only be accomplished before the grids have been filled, since the E-Solder does not
migrate once it is contained in the grid, and the excessive force damages the fine structures in the
interposer.
In the next step, the grids were forced down into the centrifuged uncured E-Solder material
which was contained by the dam. To minimize wasted material due to squeeze out, the dam was
67
designed to be as close as possible to the size of the grid itself. In addition, the grids were
surrounded by a thick border which provided structural stability to the fragile grid frame.
After filling, the interposers were cured overnight at room temperature and then post-cured at
45
℃ for 2 hours the next day. Once cured, the interposers were polished on both sides to remove
excess cured material and expose the tops and bottoms of the interposer pillars for assembly
[Figure 3-6(c)]. The completed interposer backing array had a fill factor of 63% and separation
wall aspect ratios of 133:1 (4000 µm/30 µm) in the elevational dimension, and 40:1 (4000 µm/100
µm) in the azimuthal dimension [refer to Figure 3-5(g) for an illustration of these dimensions].
Composite, and Matching layers
To create the composite, bulk PIN-PMN-PT material was lapped to a thickness of 280 µm and
diced with a 30 µm kerf in X and Y dimensions at half the element pitch resulting in pillars that
were 140 µm wide in azimuth and, 108 µm wide in elevation. The kerfs were left to soak in DI
water to clear debris and were then dried and filled with de-gassed EPO-TEK 301 as kerf filler.
After cure, both sides of the composite were polished and sputtered with 500 Å of Chromium and
1000 Å of Gold.
The completed composite [Figure 3-5(b)] was next waxed to glass and a silver-loaded epoxy
was mixed in the lab and cast in place using a dam and centrifugation to provide the first matching
layer. The epoxy used was Insulcast 501 (Insulcast, Montgomeryville, PA), loaded with 2-3 µm
silver particles (Sigma-Aldrich Inc., St. Louis, MO, USA) at a ratio of 8 gm silver to 2.825 gm
mixture of Insulcast 501 and Insulcure 9. This ratio is higher than previously reported for high
frequency probes (Wang et al., 2001) and is necessary to obtain the required performance for our
low frequency elements. After overnight cure and 45
℃ post-cure for 2 hours, the matching layer
68
was lapped to the design thickness. The samples were then perimeter diced to remove them from
the glass.
The composite with the first matching layer was next assembled to the completed interposer
using a purpose-built positioning system with X, Y, Z and Theta micrometers coupled to a
positioning stage. The system incorporates a clamp to apply pressure after assembly. Alignment
was monitored using a USB microscope (Dino-Lite, AnMo Electronics Corp., Hsinchu, Taiwan)
positioned to view from the side. The composite kerfs were lined up with the interposer grid frame
in order to reduce the overlap of piezo material with the acrylic frame to minimize ringing. The
interposer was mounted to a glass slide and positioned using the micrometers, with the exposed
pillars facing up. The composite was mounted to a glass chuck using 60
℃ wax and was secured
to the bottom of the clamp and held in place above the interposer. A thin layer of uncured E-Solder
was spread on the interposer top surface, and the composite was lowered down to contact the
interposer. Some squeeze out of the conductive adhesive occurs in this process, and it is later
removed with the dicing saw after post-curing.
Pressure was applied with the clamp by hand and the clamp locked in place and the assembly
was then cured overnight in the dry-box and post-cured the next day at 45
℃ for 2 hours. At the
end of the post-cure, the oven temperature was increased to 65 ℃ so that the composite and
matching layer stack could be released from the glass chuck on the clamp by melting the wax seal.
The elements were next singulated to create the 2D array in a two-step process [Figure 3-5(c)-
(d)]. In the first step, the elements were diced along the azimuthal dimension at the element pitch
using a dicing saw (Tcar 864-1, Thermocarbon, Casselberry, FL, USA). In the second step, after
kerf fill and cure, the elements were diced in the elevational dimension and filled. This two-step
69
process is critical to ensure high yield of the elements since the small amount of E-Solder under
each pillar must be supported by kerf fill to prevent pull-out of the 2D elements during dicing.
The dicing kerf for the 2D element singulation was 55 µm wide and the depth was chosen to go
through the first matching layer, the composite, the uniform E-Solder connection layer and finally
penetrating slightly into the interposer grid frame. While the composite itself had 30 µm kerfs, the
wider 55 µm kerf was necessary to avoid fracturing the blade for the deeper cuts. The final dicing
depth was > 400 µm and is critical to ensure that the elements are electrically separated from one
another and not shorted in the interposer backing. Alignment of the dicing saw was done from
Figure 3-7. Assembly process for fabrication of the acoustic/ASIC module
(a) shows the wire-bonded ASIC, (b) shows the diced assembly terminals at bottom of the interposer, (c) shows a
close-up of the gold stud bumps on the ASIC for assembly, (d) shows results of the stamp test with the conductive
adhesive, (e) shows stamped conductive adhesive at the bottom of the interposer, (f) interposer and ASIC prior to
assembly, (g) interposer assembled to ASIC surface, (h) final completed module.
70
above using grid markers in the interposer [Figure 3-5(c)]. After dicing, the kerfs were baked at
45
℃ to clear the water and were then filled from the side using capillary action with EPO-TEK
301 and allowed to cure overnight. The tops of the elements were inspected, and any residual kerf
filling epoxy left on the first matching layer removed with a sharp blade.
The top surfaces of all of the elements were linked together by sputtering a uniform layer of 500
Å Chromium and 1000 Å Gold [Figure 3-5(e)]. The second matching layer (ABS plastic) was next
laminated to the top surface of the acoustic stack under pressure using a clamp. A high viscosity
epoxy resin (DER-332, Sigma-Aldrich Inc., St. Louis, MO, USA) cured with a curing agent
(Versamine C31, BASF Corp., Florham Park, NJ, USA) was used for the lamination of the second
matching layer [Figure 3-5(f)]. To ensure no bubbles in the adhesive bond line, the uncured epoxy
was de-gassed and dispensed using a 0.2 µm PTFE filter (VWR International, Radnor, PA). Figure
3-5(g) shows a photomicrograph cross-section of a representative completed sub-array acoustic
stack illustrating the layers in the stack-up as described in this section. The second matching layer
glue line was cured overnight under clamped pressure and then post-cured in the oven at 45
0
C.
Assembly to ASIC
Assembly of the interposer to the ASIC is a potential source of electrical shorts and opens which
will reduce element interconnect yield. A low temperature process in this step is critical due to the
presence of acrylic material in the interposer grid frame, and epoxy matching and bonding layers,
all of which have glass transition temperatures below 150
℃ and high coefficients of thermal
expansion (CTE). Elevated temperature is also undesirable due to the possibility of de-poling of
the piezo material. For these reasons, a low temperature cure conductive adhesive process was
developed for assembly of the acoustic stack to the ASIC.
71
The ASIC was direct-mounted to the module PCB and wire-bond connections performed to link
the I/O pads to the board [Figure 3-7(a)] by a vendor (Chip Targets, Richardson, TX, USA). The
PCB was processed for ENEPIG surface finish beforehand to enhance wire-bonding reliability
(Superior Processing, Placentia, CA, USA). Gold stud bumping of the ASIC transducer pads was
used to break the aluminum oxide barrier layer that forms on the pads to create an inert and ohmic
electrical connection point for the interposer pillar terminals and the conductive adhesive.
Prior to assembly, the acoustic stack was flipped over to expose the bottom side of the interposer
pillars. The interposer was diced along the grid frame using the dicing saw to a depth of 200 µm
[Figure 3-7(b)], exposing the pillars which form terminals for direct connection of the interposer
to the surface of the ASIC.
To reduce the chance of opens and ensure high yield of the connections, conductive epoxy was
used for assembly of the interposer and acoustic stack to the surface of the ASIC. This process
differs from standard ultrasound transducer to flex attach in which nonconductive epoxy (e.g.
EPO-TEK 301) is used to form the bonds between the flex circuit and the acoustic stack (Cabrera-
Munoz et al., 2018; Chiu et al., 2017). The conductive epoxy is meant to take-up variation in
surface planarity to increase assembly yield. The wire-bonded ASIC module was positioned on
the clamp system micrometer stage for alignment to the interposer and acoustic stack using the
side-looking USB microscope camera. Electrostatic Discharge (ESD) precautions were used
throughout the process to protect the ASIC.
72
The interposer was waxed to a glass assembly fixture (using 60
℃ wax) and suspended above
the ASIC module for the alignment. Prior to final alignment, the interposer bottom terminals were
lowered down into a 25 µm thin layer of conductive adhesive (E-Solder 3022) that was spread out
on a glass slide. A uniform layer of the adhesive was obtained by spreading using a sharp blade
supported by a brass ring glued to the surface of the glass slide which had been previously lapped
to 25um thickness. Shorting is critical, and it is prevented by ensuring that the backside of the
interposer is diced to form terminals [Figure 3-7(e)]. The terminals are far enough apart, and the
gaps between them deep enough such that when the part is lifted out of the uniform adhesive layer
only the terminals themselves retain the adhesive material [Figure 3-7(e)]. For these very closely
spaced terminals, some bridging is occasionally observed (e.g. center of [Figure 3-7(e)]), and this
was removed by hand with a needle prior to assembly. This “stamping” method is similar to other
Table 3-4. Material properties for the fabricated array
Acoustic Layer Material Z
(MRayls)
𝝆 i
(kg/m
3
)
𝒗
𝒍
i (m/s) Attn.
(dB/cm/MHz)
Design
thickness
Backing Pillars E-Solder 3022, Von Roll 5.5 2500 2110 13–20 4 mm
Interposer grid Vero Clear Acrylic, 3D Systems
¾ ¾ ¾ ¾
4 mm
Piezo Layer 1-3 Composite: PIN24%-PMN-PT
/ EPOTEK-301
20.8 5682 3665
¾ 290 µm
Matching Layer 1
2-3 µm Silver particles in Insulcast 501
7.33 3860 1900
¾ 70 µm
Matching Layer 2 Acrylonitrile butadiene styrene (ABS) 2.2 1190 1850
¾ 75 µm
Substrate Silicon/CMOS ASIC
¾ ¾ ¾ ¾ 600 µm
* Material properties are from (Selfridge et al., 1985; Wang et al, 2001; Cabrera-Munoz et al., 2018 and Eq. (1)-(8)
73
stamping techniques proposed (Dutt et al., 2016; Park et al., 1997) and provided a uniform
distribution of adhesive volume at the bottoms of the pillars with one single action [Figure 3-7(e)].
Adhesive uniformity and squeeze-out were evaluated by lowering the interposer down to the
surface of a test (non-functional) ASIC and printing a grid of adhesive dots [Figure 3-7(d)] which
demonstrated acceptable adhesive volume for assembly. Adhesive was again applied, and the
ASIC was then positioned for the final alignment underneath the interposer [Figure 3-7(f)]. The
aligned interposer was lowered to the surface of the ASIC and clamp pressure applied by hand
[Figure 3-7(g)]. This action forced the gold stud bumps into the bottoms of the interposer pillars
Figure 3-8. Transmit electrical impedance for the completed acoustic stack including backing and two matching
layers
Showing phase and magnitude of the data with linear axes. Solid lines are for the measured data for a 3 ´ 5 grouping
of 2D array elements, dashed lines are for the KLM model.
74
and at the same time also caused the conductive adhesive to spread out and form a uniform bond
between the ASIC and the individual interposer terminals. The combined action of the gold stud
bumps being forced into the bottom surface of the interposer pillars, as well as the intervening E-
Solder layer is meant to ensure high yield of the assembly by taking up any gaps due to coplanarity
variation in the interposer. The clamp fixture was cured at room temperature overnight, post-cured
Figure 3-9. Maps of measured acoustic data for pulse/echo testing of the 1´3 module fabrication sample
a) Normalized sensitivity b) Center Frequency, and c) FBW.
75
at 45 ℃ for 2 hours the next day and released by increasing the temperature to 65
℃ for 15 minutes.
A dam was applied and filled with EPO-TEK 301 dispensed for hermetic seal of the wire bonds
and the acoustic stack assembly [Figure 3-7(h)]. The current version of the ASIC does not have a
dedicated pad for ground connection to the interposer; instead a ground wire was applied by hand
and connected with silver epoxy to the top electrode of the acoustic array. This wire contacted the
PCB which then connected to the ASIC ground using a bond wire.
Table 3-4 summarizes the various materials used in the acoustic stack and their relevant
properties.
Results
The fully assembled ASIC/transducer prototype module was tested electrically and acoustically
and was interfaced to the Verasonics Vantage 128 system for water tank testing and imaging
experiments using a purpose-built wire-target phantom.
3.11.1 Acoustic Stack Evaluation
Prior to assembly of the acoustic sub-array to the ASIC module as described above, the large
1×3 grouping of subarrays was tested by micro-probing to evaluate the performance of the acoustic
stack prior to assembly. The array impedance was tested using a probe needle visualized under a
bifocal microscope and applied to the backside of the interposer and an impedance analyzer (HP
4294A, Agilent Technologies, Santa Clara, CA, USA).
For test purposes, a 3´5 grouping of 2D array test elements was created by shorting backside
terminals with E-Solder. This grouping provided a lower electrical impedance than the very small
individual 2D array elements, facilitating measurement and matching of data to the KLM model.
76
Figure 3-8 shows the measured transmit electrical impedance of the 3´5 grouping along with the
KLM model results for comparison. A 3.6 pF parasitic capacitance for the interposer was
calculated based on geometry and the assumed dielectric constant of the 3D printed acrylic. This
value was added to the model to account for electrical loading in the backing.
The 1×3 macro-array was suspended above a quartz target in a water tank and the probe needle
was used to scan all of the elements in the array. X- and Y-axis micrometers were used to translate
the array relative to the needle for fine accuracy of positioning. A pulser/receiver (Panametrics
5900PR, Olympus NDT Inc., Waltham, MA, USA) connected to the probe needle was used to
acquire pulse-echo responses from the array with an oscilloscope sampling the data. Figure 3-9
provides maps of the normalized sensitivity (a), center frequency (b) and fractional bandwidth (c).
The additional tested columns shown in Figure 3-9 between the sub-arrays were later removed
during dicing to singulate the arrays for assembly. The mean and standard deviation for these
measured data can be found in Table 3-5.
Table 3-5. Measured acoustic results for fabricated arrays and ASIC modules
Parameter
1´3 Lot
AR2 AR3 AR4
3´5
Grouping
AR3/ASIC
2D
AR1/ASIC
1D
AR3/ASIC
1D
F c (MHz) 5.4
(0.07)
5.5
(0.03)
5.5
(0.10)
5.2
(0.03)
5.48 4.7 (0.1) 4.5 (0.1) 4.3 (0.07)
FBW (%) 59 (2) 63 (2) 57 (2) 55 (1) 73 64 (10) 78 (7) 76 (3)
PW (ns) 640 (12) 543 (58)
* All data: µ (s)
77
Based on the acquired acoustic data, the center sub-array in the 1×3 lot grouping had the highest
FBW among the 3 sub-arrays and was therefore selected for assembly to the ASIC as described in
the previous section. An earlier fabrication lot also yielded a single array for assembly. Two
ASIC/Acoustic assemblies were fabricated and tested using these available arrays.
3.11.2 Test Setup and Electrical Interface
Following the fabrication steps described in Section 3.7-3.10 above, the completed arrays were
interfaced to the Verasonics Vantage 128 system for detailed acoustic testing with the combined
Figure 3-10. Pulse/Echo two-way response for the KLM model and normalized measured data
Showing time domain and magnitude spectrum results. Dashed line is for the KLM model for a 3´5 grouping of 2D
elements, solid line is the measured data for the 3´5 grouping of 2D elements, dotted line is for an ASIC buffered
grouping of 1´5 2D elements.
78
ASIC and transducer array and imaging. The pulse-echo and imaging test setup included multiple
power supplies to power the ASIC and the FPGA, including logic (+3.3 V), ground (0 V) and
positive and negative high voltage supplies (+/-20 V). These supplies feed into the distal probe
board PCB which houses the ASIC module connector, a connector for a CMOD 7 Artix-7 FPGA
(Digilent, Pullman, WA, USA) acting as the ASIC control board, as well as a card edge connector
that interfaces directly to a modified L7-4 probe cable assembly (Philips, Bothell, WA, USA) that
was purchased second-hand and had the original transducer array removed. This L7-4 cable
assembly is convenient for connection to the Verasonics system since it houses both the 260P ZIF
connector on the proximal end of the cable for interface to the Verasonics system, as well as a
simplified card-edge connector interface on the distal end which accepts purpose-designed PCBs
very easily. The L7-4 product probes were not muxed, and we therefore modified our second-hand
cable to reroute signal coaxes for some system channels to make the mux control data lines
available at the distal end of the cable. The fabricated transducer/ASIC module was plugged into
the distal-end probe PCB and then the entire assembly including the distal cable housing was
attached to a positioning system which allowed them to be lowered into a water-tank for acoustic
testing.
3.11.3 Pulse-echo Testing
Initial acoustic testing was performed using a quartz target positioned in front of the array for
pulse-echo mapping of the elements. We later used a wire-target assembly fabricated in our lab,
comprising 20 µm tungsten wires (California Fine Wire Co., Grover Beach, CA, USA) spaced at
1.5 mm distance on a metal frame for resolution imaging tests.
79
Pulse-echo testing with the system was performed on multiple elements to assess the yield and
uniformity of the fabrication process. For imaging the elements were grouped in elevation which
created a 1×5 element 1D linear array. These linear array grouped elements were also evaluated
for pulse-echo response with the system. Figure 3-10 compares time and frequency domain pulse-
echo data for the previously discussed 3×5 grouping of 2D elements (solid black line), a grouped
1D element with ASIC buffering (dotted grey line) and the KLM model using measured acoustic
parameters (dashed gray line). As is evident in Figure 3-10, the acoustic response after assembly
to the ASIC is shifted relative to the original response with no ASIC buffering. The final acoustic
response is centered near 4.5 MHz which is the design frequency for the 340 µm azimuthal pitch
of the array.
Data were acquired with the Verasonics system for all 30 of the 2D array elements and all 5 of
the grouped linear array elements. The Verasonics script used for pulse-echo testing implemented
a wide-bandwidth transmit pulse at 6.25 MHz, and a transmit voltage setting of 11.7 V-peak. The
average FBW for the un-buffered acoustic elements as tested with the 50 W impedance Panametrics
pulse/echo system was 59%. The average FBW increased to 64% for buffered elements driving
the Verasonics system and probe cable and an average of 77% when these buffered elements were
grouped electronically in elevation to form 1D elements using the ASIC multiplexors. The FBW
for the elements without ASICs was low due to the first matching layer thickness being smaller
than design (55 µm vs. 70 µm) and will be corrected in future work.
The FBW for the ASIC-interfaced elements benefited from the low frequency bandpass response
of the on-chip cable buffer amplifiers which accentuate lower frequencies, shifting the center
frequency, FC, down by approximately 1 MHz as compared to the unbuffered 2D array elements.
80
The absolute bandwidth (BW) changed only slightly, and therefore this lower FC yielded a higher
FBW (BW/FC) for the buffered elements.
The observed average -20 dB pulse width (PW) for the two modules was 592 ns. These
measurements are summarized in Table 3-5.
The yield for the fabricated ASIC/transducer array modules was evaluated from the system
pulse/echo data. There was significant improvement in the interposer fabrication and the assembly
processes between the first and second ASIC/array assembly builds with this being reflected in an
increase in yield of the 2D array elements from 64% in the first array to 90% in the second array.
For a production process we would sort the fabricated assemblies according to image quality
criteria for acceptable number of missing elements and reject the individual module assemblies
which did not achieve this level. In this way we would expect to achieve high aggregate yield of
the completed large array probes.
3.11.4 Imaging
Imaging tests for the array module resolution were conducted using the wire-target assembly
described above. To evaluate the array performance relative to theoretical expected results, a
model of the acoustic beam intensity profile of the device configured as a linear array was obtained
using the Field II acoustic simulator (Jensen et al., 1992). The axial beam plot predicts the natural
focus of the array at 2.65 mm. The lateral line spread function (LSF) was used to determine the
expected lateral resolution at the natural focus, with a FWHM beam width of 0.66 mm.
To evaluate the expected image quality for this array, we used the built in Verasonics VSX
simulator (Verasonics, Inc., Kirkland, WA, USA) to generate simulated wire target images with
the small array aperture [Figure 3-11(a)]. As is evident in the simulation results, a 5-element array
81
produces still-discernable wire images, but they are not highly focused in azimuth. In the future,
we expect to see improved lateral resolution for a 30-column wide aperture which would be the
case for 6 tiled ASIC array modules.
Figure 3-11(b) presents an image of wire-targets which was obtained with the small array
module operating with the Verasonics system in real-time scanning. The image was obtained by
electronically configuring the 2D array elements to form 1D columns which were then connected
Figure 3-11. Image of 20 µm wire targets spaced at 1.5 mm intervals
(a) Simulated results using VSX simulator, (b) Measured data captured using the single array module and the
Verasonics Vantage 128 operating at 5.2 MHz center frequency. The red box shows the area used for axial and
lateral LSF calculations. All dimensions are in mm, and the images as displayed had a dynamic range of 39 dB.
82
directly to the Verasonics system for both transmit and receive. The Verasonics script implemented
full synthetic aperture with each of the 1D elements transmitting in turn and all of the 1D element
receive signals then beamformed in parallel. The transmit frequency was set to 5.2 MHz for 1
cycle, and a transmit voltage setting of 11.7 VPeak was used.
The axial and lateral LSFs for Figure 3-11(b) were obtained and used to calculate the observed
axial and lateral resolutions, which were 221 µm and 540 µm respectively.
The theoretical Full Width Half Maximum (FWHM) of the lateral beamwidth, wb, for a focused
array can be calculated by (Shung et al., 2015),
wb ≈ f#l (16)
where, for this test, l is the wavelength in water of imaging (here 344 µm), and f# = Focal Distance
/ Aperture Width (here 1.5). This gives a theoretical value of 516 µm at the focal point of the array
(2.55 mm) which is similar to the observed result of 540 µm.
The expected axial resolution for the array can be calculated by (Foster et al., 2002),
𝑤
~
=
6
.
(17)
where, for this test, c is 1480 m/s, the speed of sound in water (not tissue) and BW is the average
bandwidth of the linear array elements used for imaging (here BW=3.3 MHz). This results in an
expected axial resolution of 224 µm, which is close to the observed result of 220 µm.
83
Conclusions
In this chapter, a new process for fabrication of a tileable ASIC/transducer array module by
direct assembly of the acoustic stack to the surface of the ASIC with a 3D printed backing
interposer has been described and results presented. Multiple individual modules have been
completed and tested. A complete tiled array will be the subject of future work.
A single ASIC module was integrated with a 5 × 6 element 2D array acoustic stack by direct
assembly using an interposer backing. A novel 3D printed acrylic interposer grid was used to create
a conducting backing array of pillars which serves to link the 2D transducer elements to the surface
of the ASIC for electronic connection by direct assembly.
The fabricated prototype transducer arrays had an average center frequency of 4.5 MHz and
average FBW of 77% when interfaced to the ASIC by direct assembly. The FBW will be improved
in future work by increasing the thickness of the first matching layer. The transducer/ASIC module
was successfully integrated to the Verasonics ultrasound system and images of wire targets were
obtained. Using the line spread functions acquired from the wire target images, the measured axial
resolution was found to be 221 µm, and the lateral resolution was found to be 540 µm. This agreed
well with theory.
In the future, we plan to increase the size of the imaging aperture by increasing the number of
direct-assembly tiled 2D array modules, which will significantly improve the ability to focus at
deeper depths as well as expand the field of view of the array.
84
ADJACENT ASSEMBLY PROTOTYPE
Introduction
As was outlined in Chapter 1, tiled modular 2D and 1.75D arrays with closely integrated ASIC
electronics have the potential for implementing large array apertures in multiple new applications,
and specifically for screening and surveillance of patients at risk for developing Hepatocellular
Carcinoma (HCC). An important advantage of the modular approach is the ability to screen out
low yielding 2D array modules with integrated electronics prior to assembly in order to realize
high aggregate yield of the completed large aperture. This has the potential for reducing the cost
of the overall large aperture probe while yielding high quality arrays for excellent image quality.
In Chapter 3, a tiled, modular array architecture by direct-assembly using a novel 3D printed
backing interposer was proposed. This architecture has many advantages, however, for realizing
very large apertures at low frequency for the intended screening application, adjacent assembly is
preferred due mainly to the cost for the large silicon area required for implementation of the very
large physical apertures by direct-assembly.
85
This chapter presents the implementation of tileable large transducer element modular array
prototypes that are constructed using the adjacent assembly approach. The proposed modular array
prototype is illustrated in Figure 4-1. The left image shows the individual modules composed of a
PCB substrate which supports 4 interface ASICs, the 1.75D array acoustic module, and connectors
for analog signal interface and digital control. The right image shows how the module prototypes
can be tiled together to form a larger array. For the prototype configuration, two modules can be
tiled to implement a 2D array of 40 elements at 600 µm pitch in the azimuthal direction, and 6
elements at 1600 µm pitch in the elevational direction. The 2D array elements for this large element
array are implemented using a PIN-PMN-PT 1-3 composite with nominal center frequency of 3.5
Figure 4-1. Tiled modular array prototype for a 6 x 40 elements 1.75D array.
Left shows the individual modules with adjacent assembled large element 1.75D transducer arrays and ASIC PCB
modules. Right shows how two of the array modules are tiled next to each other to build up the larger azimuthal
aperture.
86
MHz. Each individual module is composed of an array of 6 elements in elevation and 20 elements
in azimuth and are designed to implement a 40 element wide aperture when tiled in the azimuthal
direction. The ASICs implement a switching configuration which allows each element in each
column to be independently connected to a unique signal channel for the given column. This
configuration is capable of implementing synthetic aperture in elevation, which can be used to
realize a 1.5D array that is focused electronically in the elevational plane. A 1.75D array
configuration is also possible.
This chapter will present the detailed fabrication steps for the large 2D array elements by adjacent
assembly. The process is similar to that described in Chapter 3, however, for completeness, most
steps will be described again since some critical differences do exist, and it is best to describe the
entire process flow to highlight these. The chapter will conclude with discussion of the imaging
results, which are greatly improved relative to those obtained with the small array in Chapter 3.
The reason for this is due to the much larger aperture which is inherently more sensitive and also
can be focused deeper, thereby enabling more clinically relevant phantom imaging.
Motivation for Interposer Backing with PCB
An important question to first consider, is the choice of backing for the modular array with large
elements. In the present thesis, an interposer backing is used that provides both the electrical
interconnection as well as the acoustic attenuation at the back of the array. This interposer backing
was described in Chapter 3 and will be revisited in this chapter also. There are a number of ways
to solve the problem of interconnect to a large 2D array (Figure 4-2), and here we will detail the
tradeoffs inherent to this interconnection for the large elements used in the module that is the
subject of this chapter.
87
While interposer backings have been proposed before (Greenstein et al., 1997; Woo et al., 2013),
there are other architectures which have been used to create the backing for the 2D array. Figure
4-2 illustrates 6 of the 2D array backing interconnection strategies which have been proposed (C.
Chen et al., 2017; Eames & Hossack, 2008; Fiering et al., 2000; S. W. Smith & Light, 1993; D.
Wildes et al., 2016). KLM models for the most relevant strategies were simulated for pulse/echo
response using the nominal acoustic stack discussed in this chapter (PIN-PMN-PT composite, 600
µm x 1200 µm elements, 3.5 MHz Fc), with the results displayed in Figure 4-3 and Figure 4-4. The
first simulated case (Top-Left) is for the acoustic stack with 10 mm standard acoustic backing (E-
Solder 3022) which provides the control case for comparison of results.
Figure 4-2. Survey of acoustic backing and signal routing architectures for 2D arrays
Left shows the 2D array mounted directly to the ASICs. Second from Left shows typical assembly of arrays to flex
which is common for 1D and 1.5D arrays; Middle-Left shows mounting the 2D array directly to a PCB; Middle-
Right shows the use of a quarter wave de-matching layer (WC) that is used to reflect backward radiating acoustic
energy back to the transducer array; the final two architectures are the subject of the present thesis, described in
Chapter 3 and the current chapter.
88
The next case considered is mounting the 2D array directly to an ASIC without any intervening
backing. This idea has been investigated specifically for cMUTs (Fisher et al., 2007; Gurun et al.,
2011; Wygant et al., 2009), in which case it is a viable option due to the fact that cMUTs do not
radiate significant acoustic energy in the backward direction which would otherwise contribute to
ringing. This is also the case for pMUTs (Jiang et al., 2017) which have been successfully
integrated with ASICs. For the case of bulk piezo material however, the presence of a Silicon
backing layer leads to significant ringing in the pulse/echo response (C. Chen et al., 2017; Warren
Lee & Smith, 2002). This is likely due to unmatched resonance in the Si layer (Warren Lee &
Smith, 2002), which has a speed of sound more than twice that of PIN-PMN-PT material (Vlsi =
Figure 4-3. KLM model results for different backing architectures.
Top-Left shows the standard 2D array element with a solid acoustic backing only. Top-Middle shows the results with
Si only, and Top-Right shows the benefit of thinning the Si backing; Bottom-Left shows results for PCB backing with
no acoustic absorber, and Bottom-Middle shows improvements with acoustic absorber. Bottom-Right shows the
results with a 4 layer flex circuit. Fractional Bandwidth (FBW) and -20dB pulse width (PW) are listed for each
simulation case shown.
89
8439, Vlpmnpt = 3451). The second plot in Figure 4-3 shows that a standard 600 µm thick layer of
Si integrated behind the 2D array element results in unacceptable ringing. This ringing has two
unwanted effects: First it leads to a significant reduction in the bandwidth of the transducer, and
second it leads to an extended pulse length which reduces the axial resolution of the array. It is
possible to mitigate the effects of ringing due to Si by modifying the Si layer (Shabanimotlagh et
al., 2016). In the KLM simulation, it is found that thinning the Si layer to 150 µm leads to
significant improvement at this low operating frequency. Thinning Si wafers is not uncommon in
modern semiconductor manufacturing, however this requires additional care to avoid fracturing
the die during assembly. In addition, the junction depth for low voltage CMOS is as much as 5x
shallower than for HV CMOS processes (10 vs. 50 µm), and it may not be possible to thin HV
Table 4-1. 2D Array Backing Type Tradeoff Analysis
Backing Type Ringing Examples Issues
ASIC/Si Mounted Significant
(C. Chen et al., 2017)
Unacceptable acoustic
performance
PCB Mounted Significant
(Eames & Hossack, 2008)
Unacceptable acoustic
performance
Thinned ASIC
Mounted
Minimal
¾
Potential incompatibility
to HV ASICs
De-Matching Layer Minimal
(D. Wildes et al., 2016)
Expensive
implementation;
bandwidth
Flex Mounted Acceptable
(Fiering et al., 2000)
Expensive for large
element count;
some ringing for higher
layer count
Interposer Direct
Assembly
Minimal This Work Aperture limited to
ASIC footprint
Interposer Adjacent
Assembly
Minimal This Work; (R. Wodnicki et al., 2017) Parasitic loading due to
PCB routing
90
CMOS die sufficiently to mitigate acoustic effects without compromising the performance of the
HV devices.
An important modification to the concept of mounting the 2D arrays directly to Si substrates is
the use of a quarter wave de-matching layer (US7621028B2, 2009; S. Lee et al.; S. W. Smith &
Light, 1993; D. Wildes et al., 2016), (Figure 4-2, Middle-Right) which functions as a mirror to
reflect energy back to the transducer. The significant advantage of this approach is that it eliminates
the requirement for a very thick backing which is important in applications where space is limited
such as TEE probes (D. Wildes et al., 2016). However, the main drawback with the de-matching
layer is that it requires materials such as Tungsten Carbide (WC), which have very high acoustic
impedance, and can be challenging to work with. In addition, it has been shown (US7621028B2,
2009), that the gap between the piezo layer and the de-matching layer must be maintained at less
than 4 µm in order to achieve an acceptable FBW. Specialized techniques for direct bonding of
the 2D elements to the Tungsten Carbide material have been developed (Manh et al., 2016) in
order to mitigate this effect.
Figure 4-4. KLM model results for increasing flex thickness.
Left shows the standard 2D array element with a single layer flex for routing behind the array, followed by 10 mm
thick standard E-Solder backing. Middle shows the same stack-up, only with the flex circuit having 4 layers instead
of 1 layer. Right shows the same stack up with 8 layer flex.
91
Another concept which has been explored is mounting the 2D array on a PCB directly without an
intervening backing layer (Eames & Hossack, 2008). The KLM results for this architecture are
shown in Figure 4-3, Bottom-Left. With no backing behind the PCB, the results are very poor.
Despite the wide bandwidth observed, the ringdown of the pulse/echo response is unacceptably
long. The addition of a solid acoustic backing behind the PCB is helpful (Bottom-Middle),
however, the observed ringing is still 2x longer than in the case with just a solid backing (Top-
Left). The use of a PCB for the interconnect behind a 2D array has many advantages despite the
issues with the acoustic response. In particular, PCB technology is very mature and supports
routing of up to 30 layers of signals (“Sierra Circuits PCB,”). In general each row in a 2D array
requires a layer of PCB routing in order to escape from behind the array back to the system
connections. It is possible to reduce this number by half by routing signals from both sides of the
elevation direction.
Depending on the element pitch and minimum feature size of the PCB fabrication technology
(Trace and Space widths 200 µm or greater are standard as of this writing), there may be enough
room for two or more traces behind every column in the array, however the traces must also be
routed around vias behind each element which can be quite large (200 µm or more). An important
advantage for PCBs is that they can be manufactured at low cost (depending on complexity) and
are therefore an important option for fabrication of the large number of transducer/ASIC modules
that would be required to build the large array apertures discussed in this thesis. However, to
mitigate the ringing effects an interposer backing is required for the PCB (discussed below).
Finally, a very commonly used technology for mounting 1D arrays is with a flex circuit behind
the array. For a simple 1D array, only a single layer flex circuit is required, and many
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manufacturers are capable of meeting the pitch requirements for this purpose even at high
frequency (Cabrera-Munoz et al., 2018; Chiu et al., 2017; Fiering et al., 2000; W. Lee et al., 2004;
S. W. Smith et al., 1996). For 2D arrays, as stated above, each row in the array requires one unique
Figure 4-5. Fabrication of the acoustic module.
Top-Left shows the completed interposer for the large element 2D array. Top-Middle shows the composite with first
matching layer being aligned and assembled to the interposer backing using conductive adhesive. Top-Right shows
the first pass dicing of the 2D array, and Bottom-Left shows the second pass dicing of the array. Bottom-Right shows
the completed acoustic stack including gold sputtering and the second matching layer, diced out of the frame, and
ready for assembly to the ASIC module PCB.
93
additional trace routed in every column. Multi-layer flex is less commonly available than multi-
layer PCBs and can be significantly more expensive (e.g. 10x as of this writing) depending on the
complexity. Additionally, as the number of routing layers in the flex grows, the topology begins
to look acoustically closer to a standard PCB. While a typical 8 layer PCB will be 1.6 mm thick,
an 8 layer flex circuit can be thinner due to the reduced thickness of the metal and insulator layers
used. Standard thickness for flex is on the order of 75 µm for the polyimide substrate plus the glue
layers, and 35 µm for the copper routing layers (“Standard-Flex-and-Rigid-Flex-Materials-Stack-
Up-v2.pdf,”). In this case, an 8 layer flex could be as thick as 880 µm which begins to approach
the thickness of the PCB. At higher frequencies all constraints are made worse: more elements are
needed in elevation for the same size aperture, resulting in more wires in each column, and/or more
layers in the PCB. Also, the acoustic wavelength of the elements is shorter, and therefore more
affected by the influence of the PCB or flex thickness. Figure 4-3 (Bottom-Right) shows the KLM
results for the single layer flex circuit simulation (assuming standard flex parameters, Pioneer
Circuits, Santa Anna, CA), and displays acceptable FBW and pulse length for low center frequency
imaging. Figure 4-4 shows KLM simulations for increasing number of flex layers (1, 4, and 8) and
indicates that for a high number of layers, the pulse length becomes unacceptably long as compared
to the solid backing case (1.73 vs. 0.82).
Table 4-1 summarizes the simulations which were performed, and the advantages and
disadvantages of the various 2D array backing architectures which have been proposed to date.
The 308 µm pitch of the direct-assembly array described in Chapter 3 is not supported by standard
flex and PCB circuit technologies. However, at the coarse pitch of the large elements array
described in the current chapter, standard PCB technology is highly accessible when an interposer
backing is used, which is advantageous for prototyping as well as for future low cost large array
94
assemblies. Therefore, for the present thesis, an interposer backing is used for both direct assembly
and adjacent assembly as has been described.
Acoustic Module Fabrication
As discussed in the previous section, it is advantageous to use a standard PCB substrate for
routing for very large aperture arrays with large 2D elements. In this section, construction of a
large element 2D array with a pitch matched interposer backing for adjacent assembly to a PCB
will be presented and the detailed process flow explained.
The fabrication process for the 2D array acoustic module is illustrated in Figure 4-5. An
interposer backing (Top-Left) was first fabricated. Previous implementations of interposer backing
blocks for low frequency arrays with large elements consist of non-conducting absorber material
Figure 4-6. Comparison of transmit electrical impedance (KLM model vs. Measured).
Left shows the KLM model for the acoustic stack including 2 matching layers. Right shows the measured results for
a single 2D array element by micro-probing. With this array, we were able to calibrate out a significant portion of
the interposer parasitic capacitance using a pillar that was not connected to an active transducer. The model includes
a small parasitic shunt capacitance (5 pF) to model residual stray capacitance in the measurement. The model
predicts the main peaks in the measured data near the center frequency, however it misses a peak near 1.5 MHz. It
is unclear what the source of this lower resonance is. The model also obtains reasonable agreement for the magnitude
of the impedance.
95
along with embedded wires (Greenstein et al., 1997; Woo et al., 2013). With this work, a novel
methodology is presented using a filled, 3D printed interposer frame that serves the purpose of
both electrical conduction and acoustic absorption (R. Wodnicki et al., 2017). Fabrication of the
interposer itself for the large element array, is very similar to the detailed discussion in Chapter 3
for the small direct assembly module. The main difference is in the pitch between elements. The
frame is processed using a commercial high resolution 3D printer which prints acrylic by stereo-
lithography (SLA) and creates tubes which are later filled with a conducting backing material. The
advantage of this method of fabricating the interposer is the possibility of volume production of
the frame through low cost additive manufacturing. This is an important consideration for a tileable
array module that is intended to be used to create a very large 2D array probe.
A 10 mm tall support grid was 3D printed using a 3D Systems HD 3500 plus printer using
VisiJet M3 Crystal material (3D Systems, Rock Hill, SC). This material is an acrylic that is
deposited layer by layer in the printer, with each layer being patterned using a laser through the
Stereo-lithography (SLA) process. The system has a resolution of 1600 dots per inch (DPI) in the
Z dimension, producing a minimum layer thickness of 16 µm. In the X and Y dimensions, the
minimum resolution is 34 µm. Initially printed parts were found to have a large number of pinholes
(Chapter 3) in lateral walls, and so the wall thickness was increased to 100 µm which increased
the yield. The method of printing the part where the minimum dimension is oriented parallel to the
printing platten is not beneficial for the large array elements. This is due to the fact that the walls
of the interposer grid are so long between elements that they tend to sag during wax removal and
this leads to deformation of the interposer grid. The solution to this problem is to orient the grid
itself parallel to the platten, with the printer Z dimensions being the Z dimension of the interposer
grid also. Since the element pitch is large with these arrays, the volume fraction of the interposer
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cavities is still acceptable, even if the grid walls are made thicker, as is required to reduce the
number of pinholes.
An important feature of the printer is the support material which is a proprietary wax used by the
manufacturer. During printing, the holes of the tubes shown in Figure 4-5 are filled with this wax
material in order to prevent the fine acrylic walls from collapsing. After the print is complete, the
wax material must be removed without damaging the fine structure of the walls. Initially, removal
of the wax without damage to the structure proved to be extremely challenging using standard
methods. We developed a procedure to remove the wax in our lab as follows: the printed parts
were obtained from the vendor without the wax removed; these parts were placed on a hotplate at
75
0
C with a fine mesh paper (Kimwipe) between the surface of the hotplate and the part; the holes
of the grid directly contacted the mesh paper which very effectively draws out the wax from inside
the holes by capillary action. We later modified the method, and moved the parts to a convection
oven with the Kimwipes and a weight to insure that the grid holes remain contacting the Kimwipes
at all times. Using this method, we achieve near 100% yield on the fine walls of the grid frame.
Table 4-2. 2D Array Module Acoustic Materials
Parameter Material Thickness Comments
Substrate FR4
500 µm
PCB, Sunstone Circuits, OR
Backing Pillars Conductive Epoxy 10 mm E-Solder 3022, Von Roll, NY
Interposer Grid Acrylic 10 mm VisiJet M3 Crystal, 3D Systems
Piezo Layer 1-3 Composite
400 µm
PIN24%-PMN-PT/EPOTEK 301, CTS, Il
Matching Layer 1 Silver Epoxy
75 µm 2-3 µm Silver particles in Insulcast 501
Matching Layer 2 Plastic
125 µm
Acrylonitrile butadiene styrene (ABS)
97
After clearing the wax, the inside walls are inspected for holes and tears. Any tears in the walls
can lead to shorts between the conducting backing pillars which must be avoided. At the very fine
thickness, the acrylic becomes soft and loses dimensional stability. We therefore inspect the parts
for deformation of the rectilinear pattern and reject parts that would not line up exactly with the
transducer element pitch.
After printing, the grid was filled with a conducting adhesive (E-Solder 3022, Von Roll,
Schenectady, NY) which has acoustic attenuation of 13 dB/cm/MHz. The cured material serves as
an acoustic backing as well as an electrical interposer which connects the piezo material to the
printed circuit board. The interposer backing was designed to provide sufficient attenuation of the
Figure 4-7. Cross section of the acoustic stack for the 600 µm pitch 2D array.
The fabricated stack includes the PIN-PMN-PT composite with a two matching layer system as well as the interposer
backing. This figure demonstrates the fine alignment of the composite pillars to the interposer pillars.
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signal down to -30 dB at the design center frequency. The acrylic support material is left in place
and provides electrical isolation between the individual interposer channels as well as mechanical
support for the pillar array. After the interposer was completed and verified to be 100% good (no
shorts or opens) the piezo composite array was assembled to it using the same conductive adhesive
Figure 4-5, Top-Middle. The composite is carefully aligned to the interposer grid to ensure that
after 2D array dicing, each 2D element has the same number of composite pillars (and half pillars)
in it, so as to improve the element uniformity for sensitivity and FBW. The 1-3 piezo composite
was fabricated by CTS (Bolingbrook, IL) using PIN-PMN-PT material and EPOTEK 301 (Epoxy
Technology, Billerica, MA) kerf filler. It had a designed thickness of 400 µm and composite pillar
pitch of 200 µm in both the azimuthal and elevational directions, which provides adequate isolation
of lateral modes for the 3.5MHz array center frequency (measured kt = 0.8). This material exhibits
very high k33 (0.89) which is advantageous to achieve wide bandwidth. In addition, as compared
to standard single crystal material, PIN-PMN-PT has a relatively high Curie temperature (> 150
Figure 4-8. Micro-probing test results for the fabricated large array acoustic module.
The fabricated stack was tested by pulse/echo off of a 50 mm thick quartz target block located 20 mm from the front
face of the array. A thick block was used to insure that the back echo of the block did not mask any potential echoes
from the back surface of the interposer backing. The mean measured FBW was 63%, the mean Fc was 3.9 MHz, and
the sensitivity variation was between +/- 1.5 dB.
99
0
C) (Ruimin Chen et al., 2012; Zhang et al., 2011) which makes it less likely to de-pole during
processing and subsequent use. The composite had a 55 µm kerf that was filled using EPOTEK
301 (Epoxy Technology, Billerica, MA), yielding a volume fraction of 0.55. This VF is lower than
the array that was presented in Chapter 3 and therefore will have slightly reduced sensitivity in
comparison. The reason for the lower VF is mainly due to the fabrication vendor (CTS) not being
setup to dice narrower kerfs at the required depth (400 µm). In the future, we plan to investigate
reducing the kerf width to achieve a higher VF and greater sensitivity.
KLM modeling (www.Biosono.com) was used to design a two matching layer system for the array
to optimize bandwidth (Figure 4-6). A first matching layer composed of 2-3 µm silver particles
and Insulcast 501 was cast on the surface of the composite and lapped to the design thickness of
70 µm prior to assembly to the interposer. After the assembly had cured, it was diced along the
azimuthal direction as a first step to create the 2D array (Figure 4-5, Top-Right).
An important step prior to dicing of the acoustic stack is to create an alignment grid of shallow
dicing marks on the surface of the interposer using the dicing saw. The grid is used to align the
composite to the interposer and then later it is again used to align the dicing saw for the 2D array
dicing. There are two reasons for fine alignment of the 2D array element kerf grid to the interposer
grid: First, this secondary dicing of the composite will cut into the individual PIN-PMN-PT pillars
and if the 2D dicing grid is not properly aligned, the number of half-pillars that remain after dicing
will vary from element to element which can potentially lead to greater variation in sensitivity and
FBW of the elements across the array. The second reason for fine alignment is that it is extremely
important to hit accurately the non-conducting acrylic grid in the interposer and not miss dicing
some of the cured adhesive layer which would result in shorts between the elements. A further
important consideration is choice of the thickness of the dicing saw, which must match the
100
thickness of the interposer acrylic grid walls. In the case that the 2D array kerf is smaller than the
interposer grid, there will be some area of the composite pillars that are overlapping acrylic instead
of directly contacting E-Solder. This will lead to unwanted acoustic reflections which can cause
ringing in the pulse/echo response. In the case where the kerf is wider than the acrylic grid, more
of the acoustic aperture will be inactive (not covered with piezo material). Due to the fact that the
piezo layer is composited, there is the potential to end up with only a few whole pillars in each
element if the 2D dicing kerf is large enough that it straddles across to the composite filled kerfs.
Table 4-3. Array Design Details
Parameter Value Comments
Module Tiling 1 x 2 Elevation x Azimuth
Module elements 6 x 20 Elevation x Azimuth
Tiled 2D Array Elements 6 x 40 Elevation x Azimuth (2 modules)
Module Aperture Size 9.5 mm x 12 mm Elevation x Azimuth
Eventual Full Aperture 9.5 mm x 24 mm Elevation x Azimuth (2 modules)
Pitch in Azimuth
600 µm l pitch at 2.5 MHz
Pitch in Elevation
1200 µm 2l pitch
Frequency Range 2 MHz – 5 MHz
Composite Pitch
200 µm
Both elevation and azimuth
Composite Kerf
55 µm
Both elevation and azimuth
ASICs Used 4 Each module (8 total for full array)
System Channels for full array 40 1.75D Array
101
Therefore, it is important to choose the dicing blade width carefully. For this array, a 100 µm blade
provides an adequate tradeoff among the issue described above.
The first dicing kerfs were filled with EPOTEK 301 and allowed to cure, providing support to
prevent pull out of the 2D array elements when dicing in the orthogonal direction (Figure 4-5
Bottom-Left). Following dicing along the elevational direction, the kerfs were again filled and
cured. This was followed by sputtering 500 Å Chrome and 1000 Å Gold to create the top electrode
linking all of the 2D element grounds together, and then the second matching layer, composed of
125 µm thick Acrylonitrile-Butadiene-Styrene (ABS) plastic that is purchased to match the
designed thickness (CS Hyde, Lake Villa, IL), was laminated to the surface using DER-332 (Dow
Chemical, Midland, MI) as the adhesive. We applied pressure with overnight room temperature
Figure 4-9. ASIC module PCB and closeup of the ASICs and wire-bonding.
Left shows the completed module PCB with 4 ASICs and assembly pad array to accept the acoustic stack by adjacent
assembly. The ASIC module also houses analog and digital connectors for interface to the Verasonics system. Right
shows a photomicrograph view of 3 of the ASICs wire-bonded on the module PCB. The busbar signal routing is visible
above the array of ASICs, and the transducer signal connections for wire-bonding are visible to the left and right of
each ASIC.
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cure, and post-cured for 2 hours at 45
0
C and 2 hours at 50
0
C the next day. The top electrode also
links to a group of interposer pillars on one side of the acoustic module providing the ground
connection for the array to the PCB.
Figure 4-10. Assembly of the acoustic module to the ASIC PCB module.
Top-Left shows the bottom side of the fabricated acoustic stack and interposer with the diced interposer terminals
prepared for assembly. Top-Middle shows the acoustic stack mounted to a clamp fixture suspended above a 50 µm
layer of conductive adhesive just prior to “stamping”. Top-Right shows the results of stamping, with an even
distribution of conductive adhesive on the bottom terminals of the interposer in preparation for assembly to the PCB.
Bottom-Left shows the clamping assembly alignment fixture with the interposer and acoustic stack along with the
ASIC module PCB. The USB microscope is visible in the left of the photo. Bottom-Middle shows a micrograph taken
with the USB microscope indicating fine alignment of the interposer terminal grid to the PCB transducer pad array,
just prior to clamping for assembly. Bottom-Right shows the final assembled results with very minimal squeeze out of
the conductive epoxy indicating excellent adhesive volume distribution by the “stamping” method.
103
The completed module was perimeter diced in order to expose the central 6 x 20 array of elements
(Figure 4-5 Bottom-Right) in preparation for assembly to the ASIC module PCB. Figure 4-7
illustrates a cross-section of the completed acoustic stack-up. Details of the acoustic stack are
summarized in Table 4-2, and module parameters are summarized in Table 4-3.
An important step in the modular fabrication concept, is validation of subcomponents of the final
assemblies prior to their use. Following this methodology, we validate all elements in every
acoustic stack that is fabricated prior to assembly to the ASIC modules. The completed large
element fabricated array module was tested using a purpose-built micro-probing setup. The array
was placed front face down into a bath of water, with a 50 mm thick quartz block reflector placed
at 2 cm depth. A coaxial shielded needle probe was applied on the backside of the interposer to
interrogate in turn each of the array elements using a three-axis micromanipulator. Pulse-echo data
was acquired for every element in the array by stimulating using a high voltage pulser/receiver
(Panametrics/Olympus 5900PR). The data was processed using Matlab to produce plots of the
distribution in sensitivity and fractional bandwidth. The results (Figure 4-8) indicated 100% of
the elements being acoustically functional, with the sensitivity falling between +/- 1.5dB, a mean
FBW of 63%, and Fc of 3.9 MHz. These results are summarized in Table 4-4 at the end of this
chapter.
ASIC Module PCB
The ASIC module (Figure 4-9) implements multiplexing and buffering functionality for the array.
Each module is composed of a 6 layer PCB (Figure 4-9) fabricated with 4 mil (100 µm) trace and
space design rules (Sunstone Circuits, Mulino, OR) using a standard FR4 material, 1.6 mm thick.
The module board has an array of transducer pads which match exactly the pitch in elevation and
azimuth of the pads on the backside of the interposer backing. In addition, a ground pad on the
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PCB contacts a group of pillars at one end of the interposer which provide grounding through the
interposer up to the surface of the 2D array.
The PCB modules were post-processed for ENEPIG pad surface finish (Superior-Processing,
Placentia, CA) in order to facilitate wire-bonding of the ASICs and assembly of the acoustic
modules. There are 4 ASICs in each PCB module and these were described in detail in Chapter 2.
For the current prototype, only 6 of the 8 ASIC rows are connected to the elements. The ASICs
were assembled to the PCB and wire-bonded by a vendor (Advotech, Tempe, AZ). A total of 34
wires for power and digital control connect each ASIC to a parallel array of lines on the PCB that
run in a busbar configuration. The transducer connection pads in each unit cell are bonded out to
gold pads on the PCB which in turn run to the grid of transducer connection pads. The ASICs sit
on a digital bus for configuration and are selected for data writes using individual clock lines. Data
is written to the individual modules during imaging using a local FPGA which is controlled by the
ultrasound imaging system (Verasonics Vantage 128). Prior to assembly to the acoustic modules,
the ASIC PCB modules were validated electronically to insure high yield of the 120 signal
channels on each device in both transmit and receive configurations.
Assembly of Acoustic Module to the ASIC Module
Once the acoustic module and ASIC module were completed and both validated, the acoustic
module was assembled to the ASIC module using the process illustrated in Figure 4-10. The use
of a low temperature assembly process is critical for the acoustic stack since it is composed of
multiple materials which would not tolerate the standard temperature profile for electronic reflow
assembly (220
0
C for 10 minutes). The acrylic frame, the E-Solder in the backing and connecting
the piezo elements, and the kerf filler all have a maximum working temperature at or near 150
0
C.
In addition the ASIC wire-bonds are potted using EPOTEK-301, and may move due to expansion
105
of the heated epoxy which can lead to shorts or opens. Finally, the piezo material itself de-poles
above 150
0
C. Therefore, we used a room temperature cure conductive adhesive (E-Solder 3022)
for assembly. The first step in the assembly process was to create assembly terminals on the
backside of the acoustic module [Figure 4-10 (a)]. The assembly terminals were created by dicing
a grid of lines 400 µm deep and 150 µm wide along the walls of the interposer acrylic support grid.
This process exposed the individual cured e-solder pillars, effectively creating posts which can be
assembled to the gold pads on the PCB. Due to the use of a conductive adhesive “stamping”
process (described below) for the assembly, it is important that the bottom surface of the interposer
has gaps between these terminals. To facilitate alignment, the acoustic stack was waxed to a
Figure 4-11: Oblique side view of the completed module assembly.
In this oblique view, the composite pillar grids in the azimuthal and elevational directions are both visible at the top
of the acoustic stack. The ASICs are also visible embedded in EPOTEK 301 for hermetic sealing. Hermetic sealing
of the interposer connections can also be seen as an uneven ring of quick cure clear epoxy around the perimeter of
the interposer where it meets the PCB. These are provided to insure no electrical crosstalk in the water when the
array is submerged for testing.
106
supporting glass plate [Figure 4-10 (a)] with the acoustic array face down which was then mounted
to a clamping fixture (Top-Middle) that is part of a 4 axis (XYZ and rotation) purpose-built
alignment system. The next step in the process is the application of conductive adhesive to the
surface of the interposer terminals (Top-Middle). A thin layer of the adhesive was applied to a
glass slide and planarized by sliding a blade across rails which had been lapped to the required 50
µm thickness. The acoustic stack was then lowered into the adhesive using the Z-axis micrometer
of the alignment system, and then slowly pulled back up. This “stamping” action yielded a uniform
distribution of the adhesive on the bottom pads of the interposer terminals (Top-Right). The action
of pulling back in the Z direction effectively creates adhesive bumps with adequate volume for
high yield assembly. After stamping, the adhesive slide was removed and the ASIC module PCB
was added to the fixture (Bottom-Left). The acoustic module was aligned to the grid of the ASIC
PCB using the micrometers of the alignment fixture and monitored using a USB microscope
camera (Dino-Lite, Taiwan) to insure fine alignment of the acoustic module terminals to the PCB
pads (Bottom-Middle). Once the alignment was verified, the acoustic module was lowered to make
contact with the PCB pads using the Z-axis micrometer (Bottom-Right). The fixture clamp was
then locked in place, and the entire assembly including the 4 axis alignment fixture was placed in
a dry box for overnight cure. Following the overnight cure, the entire alignment fixture was placed
in a convection oven at 45
0
C for 2 hours post-cure. The clamp was released by raising the
temperature to 65
0
C which breaks the wax seal holding the acoustic module to the glass mounting
plate.
Improving yield and reliability of assembly
Assembly processing yield and reliability are critical issues in electronic packaging (Greig, 2007).
Realizing high yield of interconnections (no shorts or opens) is a consistent issue for any large
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sensor array that is closely interfaced to front-end ASICs, including large area infrared and CZT-
based high energy particle detectors, among other technologies (Castelein et al., 2003; Clajus,
Cajipe, Tumer, & Volkovskii, 2008). Ultrasound arrays are no exception, and in fact yield of
element connections is a well-known cause of degradation in image quality (Lin et al., 2013;
Weigang et al., 2003). While it is possible to obtain useful images with an ultrasound probe even
with a percentage of the elements being non-functional, the obvious goal of any development
should be to reach as close to 100% working elements from the outset. With this in mind, we will
now discuss the assembly processing development yield for the large area 2D array.
4.6.1 Sensor assembly for 2D arrays
The basic goal of the assembly process is successfully mating as many functional 2D array
elements to respective ASIC connections in order to achieve a high yield of working
transmit/receive channels. There are a number of methods for assembling large matrix sensor
arrays to interconnections that have been proposed and are in use. These include flex attach
(US7791252B2, 2010; H. H. Kim, Cannata, Williams, Chang, & Shung, 2009; Ratsimandresy,
Mauchamp, Dinet, Felix, & Dufait, 2002), flip-chip bonding with eutectic solder (Castelein et al.,
2003; Clajus et al., 2008; Robert Wodnicki et al., 2011; Wygant et al., 2009), flip-chip bonding
with low temperature (90
0
C) solder (Biktashov, Kuzmin, & Paulish, 2006; Merken, John,
Zimmermann, & Hoof, 2003) , physical metallic bonding (Manh et al., 2016), anisotropic
conductive film (H. Nguyen, Eggen, & Aasmundtveit, 2015), thermosonic bonding (Aasmundtveit
et al., 2012) conductive epoxy (Clayton, Chen, Cook, & Harrison, 2003), nonconducting epoxy
(Cabrera-Munoz et al., 2018; Ng et al., 2012) and building the sensors directly on the ASIC wafers
themselves (Lemmerhirt et al., 2012).
108
The standard for high volume assembly in the electronics industry is of course solder
reflow at a temperature range between 180
0
C (eutectic) to 220
0
C (SAC) depending on the solder
formulation used eutectic (Tong, Lai, & Wong, 2013). These temperatures are not within reach for
this current 2D array acoustic stack-up; many of the materials in the acoustic stack (e.g. ABS
plastic, EPOTEK-301, E-Solder, PIN-PMN-PT), do not operate above 150
0
C and become
compromised above this temperature. For low temperature assembly, Indium bumping is a
potential option, however it can be difficult to achieve high yield (Biktashov et al., 2006), and the
process for implementation is somewhat complex, requiring specific under bump metallization on
both assembly surfaces (Tian, Liu, Hutt, & Stevens, 2008).
With the goal of creating a low cost modular device, for the present development we have
chosen to use assembly methods that do not require specialized equipment, excessive heat or
pressure, and can potentially be amenable to standard pick and place for surface mount assembly
which is the main technique used in the electronics industry for low cost high volume
manufacturing (Greig, 2007). In this case, barring solder reflow, the use of conducting epoxy is
attractive because, with proper choice of materials, curing can be done at room temperature and at
a relatively low material cost (Lu & Wong, 2013). In addition, there are well-known techniques
for automated dispensing of assembly material either by printing (Clayton et al., 2003) or stamping
(Dutt et al., 2016). While not as commonly used in the electronics industry as solder attach,
conducting epoxy is becoming more common as lead based materials are being phased out (Dutt
et al., 2016). The main challenge however, is achieving high yield of assembly connections for the
2D array, and this will be discussed next.
109
4.6.2 Increasing yield of assembly connections
Initial results for assembly for our 2D arrays to PCBs were poor, with only 30% of the elements
being functional. We therefore undertook a systematic analysis to determine the source of the
issue, and over time have learned that there are a number of key features which must be addressed
in order to have high yield of assembly of the interposers to the PCB.
4.6.2.1 Surface planarity
The first, and most critical issue which must be treated carefully for high yield is surface planarity.
The initial low yield assemblies were able to be removed from the PCB with application of heat,
and some shear force. These were then examined under the microscope and found to be
nonuniform in cross section. To further understand the extent of the deviation in planarity, we
fitted our lab Heidenhain thickness gauge (Heidenhain Crop., Schaumburg IL), with a fine tip
Figure 4-12. Backing surface planarity mapping.
Left shows a large element acoustic stack with the interposer pillar assembly terminals facing up; Middle shows a
closeup of a similar array of assembly terminals with the central pillar being measured by the height probe which is
fitted to the Heidenhain depth gauge; Right shows the mapping of surface planarity for an interposer which was outside
acceptable bounds and therefore was re-lapped to improve the surface planarity.
110
probe and placed the part on an X-Y micrometer translation stage. The thickness gauge has typical
height resolution of less than 1 µm. Using the USB microscope for monitoring, we were able to
map out the surface planarity of the array by translating the fine tip probe over the array of
terminals one by one. In doing so, we learned that there was a difference of as much as 40 µm in
height of the individual surface pillars from one part of the array to the other. There are gold bumps
on the PCB which can take up 20-30 µm of disparity, and the conductive adhesive also helps to
fill in for the effect of planarity distribution however it was clear that 40 µm, was an excessive
amount which had to be mitigated. Since then, we typically use the depth gauge to map out the
surface planarity for every array that we fabricate just prior to assembly. We’ve found that a
surface planarity distribution of +/-10 µm yields satisfactory results. The interposers themselves
are lapped to create the final surface finish and, with some care, they can reach a planarity
Figure 4-13. Backing polymer separation.
Left show backside view of the interposer assembly terminals with regions of nonconducting, cured, separated
polymer (clear region near the arrow) interspersed with regions of cured conducting silver epoxy (bright areas).
Right shows a sideview of a similar area with nonconducting polymer (arrow) intermixed with cured conducting
epoxy. These regions are mitigated by lapping or starting with more backing material before centrifugation.
111
distribution that is less than +/-5 µm, although this does not appear to be necessary for high yield
assembly. Figure 4-12 shows the fine tip probe for mapping of the backside terminals, as well as
a planarity map that was found to be out of spec and was later re-lapped in order to obtain a more
uniform distribution for assembly.
4.6.2.2 Backing polymer separation
To increase the acoustic absorption of the backing material in the interposers, we centrifuge it prior
to curing (H. Wang et al., 2001). This action leads to some separation of the non-conducting
polymer from the silver flakes which form the conducting paths in the material, which leads to
areas of the interposer at the topside (away from the centroid of the centrifugal force) which are
nonconducting. The nonconducting terminals in turn lead to opens in the array assembly. This
issue is mitigated by lapping the interposer until all of the pillars are completely conducting by
removing the nonconducting cured polymer. It is also possible to improve the yield on this process
without lapping by starting with more backing material than is needed for the height of the acrylic
grid frame being used to form the interposer. Figure 4-13 shows examples of the separation of the
conducting material from the non-conducting polymer which we have observed during fabrication.
4.6.2.3 Wax migration
As explained previously, the SLA 3D printing process uses a sacrificial wax which must be
removed from the interposer channels prior to filling. The most common method to remove this
wax is by using a solvent and/or surfactant which separates and cleans the wax away from the
acrylic. These chemicals also attack the acrylic to a certain extent, and unfortunately, for the very
fine walls that are needed for the interposer, they can eat holes in the sidewalls which lead to shorts
in the backing. As explained previously, we therefore use heat and capillary action to draw out a
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majority of the wax from the channels allowing them to be filled by the conducting backing
material. However, we have found that there is some residual wax which is left inside the channels,
and it is possible for it to be leached out if the assembly process includes a high temperature step
(the wax melts above 60
0
C) which is in fact required to release the clamp from the assembly.
Since the wax is nonconducting and spreads very effectively by capillary action, it is potentially
possible for it to migrate to the surface of the PCB where it is believed to interfere with the ohmic
contacts of the conductive epoxy to gold PCB pad joints. We have successfully mitigated this issue
by cleaning the cured pillar terminals with trichlorethylene soak, and also, by applying local heat
with an SMD rework tool only to the top of the stack for clamp release. Using this method we
achieve high yield of the assembly for the recent parts which have been built. In the future, we
also plan to augment our assembly process by using an adhesion promoter (AP131, Lord Corp,
Cary, NC) on the gold as a primer to improve the adhesion of the conducting epoxy to the pads.
We also plan to investigate the use of other cleaning agents and methods to remove the wax from
the channels prior to fill with the backing material.
A related issue which we have observed is that underfill after assembly for electrical hermetic seal
has the potential to lift up the edges of the assembled parts. This issue is currently under
investigation, and may be mitigated by performing underfill while the part is clamped just after
the completion of the assembly cure step.
4.6.2.4 Reliability testing
Related to the issues described above, it is important going forward to address the reliability of the
assembly. Reliability testing is a very standard and critical aspect of process development and
process control for electronic assembly. Specific tests which we plan to undertake in the future to
validate and improve the assembly process include shear testing which determines the shear
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strength and failure modes of the conductive epoxy joints between the interposer pillars (Lin et al.,
2013), and Highly Accelerated Stress Tests (HAST) (Wei, Wang, Luo, Xiao, & Chan, 2003) which
use temperature cycling to induce early failures in the assembly joints in order to identify systemic
weaknesses in the assembly process. These tests are especially important for probe applications in
which long transmit burst will be used (e.g. HiFU, ARFI, or coding) since these have the potential
to heat up the backing in a cyclical fashion which could weaken the joints over time. We also plan
to implement continuous monitoring of the array connections using the transducer ground test
which has been described earlier. This test could be conducted prior to the start of imaging, or even
periodically during imaging to quickly map out the connections and track any new failures over
time.
Figure 4-14. Comparison of KLM modeling and measured pulse/echo results for the 2D array.
Left shows the KLM model prediction for the time domain pulse response (pink) as well as the frequency spectrum
(blue). Right shows the measured results as capture by the Verasonics system for a respective 2D array element
channel passing through the ASIC high voltage switches and on-chip buffer driving the modified L7-4 probe cable.
We obtain reasonable agreement for the model and the measured data. The predicted FBW was 85% while the
measured FBW for this element was 75%, and the pulse duration and ringdown for both the model and the measured
data are excellent.
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Acoustic Results for the assembled module
Following assembly, the fabricated modular array was verified electrically by benchtop testing
to ensure that the processing did not damage the ASICs. The array was then connected to a test
PCB which connected a 128 channel ultrasound cable to the ultrasound imaging system (Vantage
128, Verasonics Inc, Kirkland, WA).
The test PCB houses a CMOD A7 FPGA board (Digilent Inc., Pullman, WA) which implements
communication between the Verasonics system and the ASICs in the modular array, for real-time
configuration of the ASIC switching matrix during imaging. Acoustic performance and yield of
the assembled 2D array elements was evaluated by pulse/echo imaging off of a 75 mm thick flat
Figure 4-15. Mapped acoustic test results for two fabricated modular arrays.
These results were mapped using the Verasonics system by pulse/echo at every element with selection of the element
in the elevation direction accomplished by controlling the HV switches on the ASICs using the FPGA accepting
commands over the cable from the Verasonics system. Some of the elements in the corners of the arrays have poor
sensitivity due to delamination of the second matching layer and also due to high ohmic connections from the PCB
to the interposer after application of the quick-curing adhesive for hermetic sealing. These issues will be addressed
in subsequent builds.
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quartz block target located 35 mm from the front face of the array in water. A very thick block is
necessary to avoid back echoes from the target being misinterpreted as echoes from the acoustic
stack backing.
Pulse/echo data for all elements in the array was captured and processed in Matlab to create
maps of the overall sensitivity and fractional bandwidth of the fabricated array module. Figure 4-
14 shows the acoustic response of a representative individual 2D array element, demonstrating
operation at a 3.5 MHz center frequency, a large fractional bandwidth (FBW) of 84%, as well as
adequate -20dB pulse duration of 810ns. Figure 4-15 shows maps of the 2D array element
performance for sensitivity, FBW and center frequency for two fabricated modular arrays. The
overall array response for the first module (AR1) is relatively uniform, with a mean FBW of 81%
for functional elements, a high element interconnect yield of 93%, and mean center frequency of
3.5MHz. We noted that the mean FBW increased with buffering from 63% with the unbuffered
array elements. Some of the elements sustained delamination of the second matching layer during
the assembly process and therefore showed reduced acoustic response. In addition, the
interconnect resistance on some elements on the right side increased after perimeter underfill for
hermetic seal of the array. This is an important issue (discussed above in 4.6.2.3) which will be
mitigated in future builds. Finally, there was one channel out of 120, on the ASIC module which
was found to be inactive. The second fabricated array (AR2) displayed similar center frequency of
3.33 MHz, however the mean bandwidth was reduced. This was mostly due to uneven lapping of
the second matching layer for the outer elements.
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Single Module Imaging Results
The 1.75D array module was configured to behave as a 1D array for initial imaging tests with
the Verasonics system. To evaluate the expected beamforming performance of this array
configuration, Field II simulations were performed (Figure 4-16).
For the imaging configuration in the lab, all 6 elements in each column had their switches turned
on, and the Verasonics system operated the array in “flash” transmit mode with simultaneous
beamforming of all 20 element channels on receive. The array was unfocussed in elevation.
Imaging persistence was used to improve the SNR for the small aperture which was not electrically
shielded. The nominal dynamic range displayed in the images which were acquired and are
presented in this section is 45 dB. For these images, Verasonics VSX CompressFactor = 40 was
used, which implies standard square-law compression.
Figure 4-16. Field II simulations for the 600 µm array at 35 mm electronic focus.
The overall point spread function (Left) shows a well-focused beam with low level side-lobes, while the axial beam-
plot shows that the array is focused at 35 mm, as expected. The lateral beam-plot (Right) was used to determine the
lateral resolution of the array which was consistent with theory for the given F#.
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Images were acquired using the prototype large element array module imaging an industry
standard CIRS 054GS general purpose quality assurance phantom (CIRS, Norfolk, VA). This
phantom contains a proprietary tissue mimicking material (Zerdine) which has constant acoustic
impedance and is meant to produce uniform ultrasound speckle (grain in the image) that is similar
to the response of human tissue. In addition, the phantom has inclusions which are meant to mimic
cysts in human test subjects and therefore demonstrate the ability of the ultrasound array to image
with high contract to noise resolution (CNR). The phantom also has embedded wire target
formations which are intended to provide a simple way to estimate the axial and lateral resolution
of the imaging array and system. Images were obtained for each of these features and, these will
be discussed in this section in turn.
Figure 4-17. Imaging results for the fabricated modular array with CIRS 054GS phantom and highly echogenic cysts
and wires.
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Figure 4-17 shows the results for imaging a highly echogenic spherical target as well as a wire
column in the phantom. We note that the sensitivity is adequate for speckle to be visible down to
65 mm in the target. Lateral resolution (discussed below) is worse than production probes at this
frequency, however this is expected given the small size of this single module aperture. The
reduced lateral resolution is visible in the speckle, and also in the increasing lateral width of the
wire targets in the column. Both the wires and the speckle maintain axial resolution but grow
laterally. This is due to the fact that axial resolution is set by l, whereas lateral resolution varies
with F# which is increasing with depth for a fixed aperture (the case for these images). Lateral
resolution will improve when multiple modules are tiled to build a large array aperture.
The next structure in the phantom that was imaged was a series of anechoic cysts which are
meant to model fluid filled cysts in the body. Figure 4-18 shows the results for imaging these
Figure 4-18. Imaging results for the fabricated modular array with CIRS 054GS phantom and anechoic cysts.
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structures. Here again, we note that there is reasonable signal sensitivity due to the fact that we are
able to detect speckle with this array module down to 60 mm depth in the phantom. In addition,
we obtain good contrast in the anechoic cyst regions, which again is indicative of adequate
sensitivity for imaging at this depth and good CNR. A red dashed circle applied to the left-most
image shows the outline of the location of the anechoic cyst for reference. Images were acquired
over a range of frequencies, demonstrating wide bandwidth operation of the array, and increasing
resolution as evident in the grain size of the speckle especially visible at the borders of the cysts.
At low frequency, we observe some shadowing at the top and bottom surfaces of the cysts which
is likely due to residual ringing of the transducers. This effect could be mitigated by increasing the
height of the interposer backing.
The last structures in the phantom that we imaged were the axial/lateral wire target formations.
The results are shown in Figure 4-19. The wire targets are embedded in the phantom at specific
Figure 4-19. Imaging results for the fabricated modular array with CIRS 054GS phantom and axial/lateral
resolution wire targets.
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spacing as indicated in the image at Left (2 MHz). As per the 054GS instruction manual, the ability
to visualize a dark line between two dots indicates that the probe is capable of imaging at the
resolution dictated by that pair of wires. In particular, we note that for the 5.7 MHz case the 250
µm axially spaced wire targets (far right) are visibly distinct which indicates axial resolution
Figure 4-20. Line-spread functions for the large element 2D array and ASIC.
Top-Right, shows compressed data for wire-targets in the CIRS 054GS phantom. Top-Left shows the same data
uncompressed. Bottom shows Axial and Lateral line spread functions. The axial and lateral resolutions are calculated
by the beamwidth at FWHM, and are summarized in Table 4-4.
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between 250 to 500 µm at that frequency. Also the 500 µm laterally spaced wires are
distinguishable at 5.7 MHz indicating that the array has between 500 – 1 mm lateral resolution.
Finally, as a secondary means for evaluation of the resolution of the array, we obtained the post-
processed image data from the system and evaluated the axial and lateral resolution directly, by
determining the Full Width Half Maximum (FWHM) distances (Figure 4-20). An important
consideration in this regard is that the line spread functions are to be measured on the
uncompressed data. The images which were obtained from the Verasonics system were pre-
compressed using square-law compression (Figure 4-20 Top-Left). We therefore uncompressed
the images (Figure 4-20 Top-Right) so that we could obtain the required line spread function data.
Using this data (Figure 4-20, Bottom-Right and Bottom-Left), we obtained measurements for the
axial and lateral beam-widths based on one of the wires in the image (red box in Figure 4-20 Top-
Right). The results were determined to be very close to the estimates obtained according to the
Table 4-4. Summary of Performance Data for the Large Array Module
Parameter Nominal
Measured
CIRS Method Line Spread
Function Calculation
Axial Resolution
250 µm – 500 µm 247 µm
Lateral Resolution
500 µm – 1 mm
1.14 mm
Mean FBW 81%
Sensitivity Variation +/- 2 dB
Mean Center
Frequency
3.5 MHz
F# at 35 mm focal depth 2.9
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CIRS instruction manual (discussed above). Table 4-4 summarize all of the measured and
calculated results for tests discussed in this chapter.
Multiple Module Image Results
The completed ASICs, and acoustic/ASIC modules fabricated as described above were
integrated with a Verasonics Vantage 128 system for imaging. Multiple generations of imaging
arrays using the tiled modules were implemented including two module and three module arrays.
Figure 4-21(a) shows a mockup of a three-module array constructed using bare PCBs and two
FPGAs needed to control 3 and 4 module arrays. These are also interfaced to an L7-4 cable for
Figure 4-21. Integrated three module array.
(a) Shows a mockup for clarity of illustration with three PCBs, two control FPGAs and the production L7-4 Cable.
Orange flex cables carry digital control signals from the FPGAs to the ASICs to program their mux configurations;
white LVDS flex cables are shielded and carry the signal channel connections from the L7-4 probe connector to the
analog inputs of the ASICs on the module boards. (b) Shows a closeup of the completed three-module assembly
where the acoustic stacks are now visible as well as the ASICs mounted to the boards.
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connection to the Verasonics system. Figure 4-21 (b) shows a close-up view of an actual 3 module
assembly with the acoustic stacks and ASICs visible. The tiled arrays were used to image the CIRS
054GS acoustic phantom (Computerized Imaging Reference Systems, Inc., Norfolk, VA, USA).
Results of imaging with a single module, two modules and three modules are compared in Figure
4-22. As can be clearly seen in comparing the single module to multiple module images the most
obvious benefit is an increase in lateral range for this linear array. Additionally, by comparing the
Figure 4-22. Imaging the CIRS 054GS phantom with three different array constructions.
(a) Single module, (b) Two modules, (c) Three modules.
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speckle granularity of the background resolution in the medium can be seen to be improving when
additional modules are added. This is directly due to the relationship between lateral resolution
and F# as was described in Chapter 1. Finally, the width of the individual wires in the wire column
can also be seen to be decreasing with the addition of more modules. This effect is not as
pronounced as expected for the three-module group due to the fact that the array modules have not
been properly aligned physically relative to each other. All of the array configurations used for
Figure 4-22 display excellent axial resolution due to the wide bandwidth of the fabricated acoustic
arrays as explained previously.
Figure 4-23 shows a closeup of the nearfield resolution test wire-target grouping in the phantom.
These targets clearly show the improvement in resolution as the number of modules is increased
from a single module (a) to two modules (b), and then three modules (c). As explained above, with
multiple modules there is physical misalignment of the arrays which leads to defocusing in the
combined beamformed results. This effect is clearly illustrated in Figure 4-23 (d), where it appears
Figure 4-23. Imaging the resolution wire-target grouping in the CIRS 054GS phantom
(a) Single module, (b) Two modules, (c) Three modules, (d) shows the two module results prior to calibration.
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that there are multiple wires in the lateral direction, but these are in fact the non-co-registered
image data from the two modules. A calibration procedure was implemented in the Verasonics
GUI to determine the exact amount of mis-registration and calibrate it out. This process yielded
the wire target results shown in Figure 4-23 (b). Image calibration was attempted for the three-
module array, however, as can be seen in Figure 4-23 (c) the results are not yet optimized. More
detailed calibration taking into account rotation will need to be implemented to achieve a
satisfactory result for more than two modules.
Figure 4-24. Verasonics VSX numerical simulation of theoretical wire-target phantom.
(a) Single module, (b) Two modules, (c) Three modules, (d) Four modules, (e) 6 modules. Each module has 20 elements
in the azimuthal dimension, with the 6 module array (e) having 120 elements laterally. Imaging was performed with
600 µm element pitch, 3.9 MHz center frequency and 27 angles planewave imaging with the entire array active both
on transmit and receive.
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The Verasonics system incorporates a software beamforming simulator (VSX) which produces
virtually identical results using numerical simulation as would be seen when the same
beamforming script is executed in the lab using a real probe and real phantom. To analyze the
expected performance of the large area array, we implemented planewave imaging with 27 angles
for an increasing number of aperture elements as shown in Figure 4-24. The simulation reproduces
the exact same wire target formations as are found in the CIRS 054GS phantom however without
the observed speckle we would see in the lab. This is the equivalent of having the background
medium being water. The number of modules used in this simulation increases from left to right,
as follows: (a) has a single module (20 elements), (b) two modules (40 elements), (c) three modules
(60 elements), (d) four modules (80 elements), and (e) six modules (120 elements). These numbers
were chosen for comparison to the three cases which we have already demonstrated in Figure 4-
24 (one, two, and three modules), as well a fourth case which our current PCB architecture will
support (four modules). Ultimately, we would expect to build an array with 6 modules in the lateral
Figure 4-25. Simulated line spread functions for a 120 lateral dimension element probe.
(a) Wire target resolution group image, uncompressed, (b) Lateral line spread function, (c) Axial line spread function.
The wire-target grouping is located at 110 mm depth in front of the array. With 120 lateral elements, this aperture
obtains excellent lateral and axial resolution, with an F# of 1.5 at this depth.
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direction, equivalent to 120 azimuthal elements which should demonstrate excellent lateral range,
and resolution, as well as improved penetration depth.
Figure 4-26. Comparison of the fabricated 1.75D modular array to production probes
Acoustic plane wave imaging tests were conducted in the lab using a standard CIRS 054GS ultrasound phantom which
contains highly echoic (left column) and anechoic (middle column) inclusions, as well as a formation of wire targets
(right column). (a)-(c) Two completed modules implementing a 6 × 40 array of 1.75D elements, (d)-(f) Production
array commonly used for abdominal imaging and liver cancer screening (C5-2, ATL/Philips), (g)-(i) Production array
commonly used for liver cancer screening (P4-2), (j)-(l) Production array commonly used for detailed examination of
potential HCC (L12-5). All of the arrays were operated in the planewave imaging mode.
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An important feature of the large array is the ability to image very deep, and in this case for
imaging the liver in large patients with an intervening fat layer, the target for nominal imaging
depth is 14 cm. As can be seen in the Figure 4-24 simulations, the CIRS phantom has an embedded
resolution wire group at around 110 mm depth, and we can use this to assess the imaging
Figure 4-27. Comparison of imaging at depth for the 1.75D fabricated array and production probes.
Acoustic plane wave imaging tests were conducted in the lab using a standard CIRS 054GS ultrasound phantom
illustrating performance of the fabricated two-module array as compared to three different production probes
commonly used for screening and surveillance of hepatocellular carcinoma (HCC) (a)-(e) illustrate performance
of the arrays when imaging deep wire targets located between 110-120 mm which is close to the 14 cm target depth
for the large aperture. (f)-(i) illustrate performance of the same arrays when imaging anechoic cyst type inclusions
which are representative of fluid filled cysts to be located in HCC screening, (a) is the Verasonics VSX simulator
numerical result for reference, (b) and (f) are the two-module fabricated array results, (c) and (g) Production array
commonly used for abdominal imaging and liver cancer screening (C5-2, ATL/Philips), (d) and (h) Production array
commonly used for liver cancer screening (P4-2), (e)-(i) Production array commonly used for detailed examination
of potential HCC (L12-5). All of the arrays were operated in the planewave imaging mode. The white streaks visible
near the bottom for (b) and (f) are caused by electrical pickup noise on the FPGA/Probe PCB which will be mitigated
in future revisions. The bright field at the top of (b) and (f) is due to transmit feedthrough to the preamplifiers.
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performance of increasing lateral aperture width. As can be seen by comparison of Figures 4-24
(a)-(e), the lateral resolution improves significantly with an increasing number of modules tiled
next to each other. In fact, with 6 modules, and 120 elements, the lateral resolution at 110 mm is
approximately 1 mm, which is equivalent to the desired resolution for this application. This result
is confirmed in Figure 4-25 where the lateral and axial line spread functions for the simulation are
plotted, demonstrating 880 µm lateral FWHM and 550 µm for the FWHM in the axial direction.
To further analyze the image performance of the constructed array modules, we imaged the CIRS
phantom using multiple standard production probes which were obtained second-hand. The probes
used were a P4-2 phased array with center frequency of 3 MHz and 64 elements, a C5-2 curvilinear
array with a 3.5MHz center frequency and 128 elements, and finally, an L12-5 array, which had a
center frequency of 8.5 MHz and 192 elements in the azimuthal dimension. Each of these probes
are known to be used for screening and surveillance of HCC and therefore represent a baseline for
comparison.
Figure 4-26 shows image data that was obtained using planewave imaging with 27 angles for
comparison of an array aperture composed of two of the fabricated modules, along with the three
production probes listed above. Figure 4-26 (a)-(c) are the results for the two-module fabricated
array. Figure 4-26 (d)-(f) are the results for the C5-2 production probe. Figure 4-26 (g)-(i) are the
results for the P4-2 production probe. And finally, Figure 4-26 (j)-(l) are the results for the L12-5
production probe. As can be seen in these images, the modular array obtains equivalent or superior
imaging performance as compared to the two low frequency probes. All of the low frequency
probes were operated at 3 MHz center frequency. Clearly the high frequency probe has superior
lateral and axial resolution, however as will be shown next, the depth of penetration for this high
frequency probe is severely limited due to the exponential attenuation of sound in tissue. In
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practice, for screening and surveillance, the low frequency probes are used for locating and
assessing lesions deep in the liver, whereas, the high frequency probe is typically used to assess
surface roughness on the near side of the liver which is a measure of tissue nodularity and is an
indication of advanced liver cirrhosis.
Finally, we assessed the ability of the modular array to image deep targets as compared to the
performance of the production arrays. Figure 4-27 shows the results of multiple imaging tests
which were performed to compare the performance of a two-module fabricated array to the
production probes detailed above. Figure 4-27 (a) is a VSX simulation result used as a benchmark
for comparison to the actual lab measured data. As can be clearly seen in Figures 4-27 (b)-(d), The
fabricated module array obtains very similar image performance to the two low frequency
production probes. However, it is very important to understand that this comparison is for a two-
module array aperture. Using Figure 4-27 (a) as a reference, we can compare Figures 4-27 (a)-(e)
presented previously as representing the ideal best-case theoretical results for our eventual large
aperture modular array. At present, we have only integrated a maximum of 3 modules in the
azimuthal dimension. However, given that our tow module array displays equivalent performance
at depth as full aperture production probes used for HCC screening and surveillance, we believe
that our final 6 module array should demonstrate superior performance when imaging at depth.
Figure 4-27 (e) shows the results for the high frequency array and is presented to illustrate the
inability of the high frequency array to penetrate into the medium deep enough for the required
imaging depth. Figures 4-27 (f)-(i) illustrate the image results for the two-module fabricated array
as compared to the two low frequency production probes for the anechoic cyst inclusions. These
are important because they model the ability of the probes to locate and differentiate potential
carcinoma vs. fluid filled cysts embedded in the liver. Again, the two-module array performs
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similarly to the low frequency arrays at depth for these inclusions, while the high frequency array
cannot penetrate nearly as deep as required for the application.
Figure 4-28. Comparison of acoustic glitch for ASIC-1 and ASIC-2 devices.
(a) Shows B-Mode imaging with the ASIC-1 based module illustrating echoes off of a quartz block target at 45 mm with
a significant ghost echo at 55 mm (arrow) due to the charge-injection based glitch, (b) shows the time domain plots of
the received echo data for one channel with a strong acoustic glitch (arrow), (c) the same test conditions with the ASIC-
2 based module with greatly reduced ghost echo (arrow), and (d) the time domain data showing the glitch being below
detectable levels. The near-field ghost lines at 10 mm to 20 mm in (a) and (c) are due to cross-talk of the digital
programming circuits and will be mitigated with a future PCB revision. Curved artifact at 45 mm in (a) is due to cross-
talk in ASIC-1 and was resolved in ASIC-2 (c).
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Improvement in Charge-Injection Induced Image Artifact
Imaging performance of the ASIC-1 and ASIC-2 modules was very similar, however, as noted
previously, when imaging bright targets, the ASIC-1 devices displayed ghost images which are
due to the charge-injection glitches which have been mitigated in the ASIC-2 devices.
To take full advantage of large array apertures, the array is operated in full synthetic aperture
mode. In this case the switches are configured in a first mux setting prior to transmit, then
immediately after transmission on all elements is completed, a second array switch configuration
is implemented for the receive cycle. This switching scheme allows for a subset of the entire array
to be actuated on transmission, followed by a different subset on receive. This process is repeated
for acquisition of all transmit-receive beamforming products required for improved spatial and
contrast resolution (Fernandez et al., 2003; Hazard et al., 1999; Jensen et al., 2013; Wan et al.,
2008). When the switches are actuated to change from the transmit to the receive array switch
configuration, every element is stimulated by a switching transient. These transients all occur at
the identical point in time which corresponds to a plane wave being transmitted by the array into
the medium. Depending on the ratio of the number of elements and transmit voltage used for each
synthetic aperture transmit vs. the number of switch transient elements, the resulting plane wave
acoustic power can be large enough to generate significant image artifacts for highly echogenic
targets.
Figure 4-28 demonstrates the effect of the switching transients for ASIC-1 and ASIC-2 modules
interfaced to 6´20 arrays of 1.75D elements. The results were obtained by imaging a 75 mm thick
quartz block located at a depth of 45 mm below the arrays. As can be seen in Figure 3- 12(a), for
the ASIC-1 device modules there are three horizontal lines in the image. The brightest of these (at
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45 mm depth) corresponds to the front face of the quartz block, and the third line (62 mm) is the
rear face of the block. In between these two lines, there is a second line (55 mm) which is similar
in intensity to the echo from the rear face of the block. This line was confirmed to be generated by
the switching transients; when the transmit signal is reduced to a low voltage front and rear echos
disappear however, the switching transient induced echo line remains. Figure 3- 7(b) illustrates the
RF signal for a single channel demonstrating the significant magnitude of this artifact in the ASIC-
1 based imaging device module tests.
Figure 4-28 (c)-(d) illustrate mitigation of the switching transients using the low charge-injection
architecture switch of the ASIC-2 devices. Upon comparing Figure 4-28 (a)-(b) and Figure 4-28
(c)-(d), significant reduction of the switching artifact was achieved with the low-switching noise
architecture. The magnitude of the switching artifact varied depending on the number of elements
operating on transmit as compared to the number of elements experiencing the switching transient.
For the tested arrays we observed a reduction in switching transients from the ASIC-1 to the ASIC-
2 devices of -30 dB. These results also agreed with ASIC simulations.
Conclusions
In this chapter we presented the fabrication of a large 2D ASIC/Transducer array module by
adjacent assembly of the transducer acoustic stack to the surface of the ASIC module PCB. This
technique is beneficial when the footprint of the individual ASIC cells is much smaller than the
footprint of the 2D array transducer elements. In this way, much larger acoustic apertures can be
realized while saving silicon area which reduces cost of the ASICs and also helps to improve yield.
Using this technique, we were able to demonstrate significantly improved images as compared to
the direct assembly array which was presented in Chapter 3. This was mainly due to the much
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larger 2D array aperture for the adjacent assembled array. The large azimuthal aperture (12 mm
vs. 1.7 mm) moved the natural focus of the array much further out from the front face which
allowed us to focus much deeper into the phantom than was previously possible. This allowed us
to use electronic focussing much farther away from the array surface which significantly improves
the image results. In addition, the much taller grouped array elements in elevation (9.6 mm vs.
1.375 mm) yielded higher sensitivity of the arrays which helped to improve the contrast to noise
in the images which also improved the overall image quality results.
In future work, we plan to expand the array aperture to 40 or 80 channels in azimuth which should
improve the image quality significantly. We will also implement Synthetic Aperture in elevation
which will further improve the depth of focus in the axial direction and should increase CNR of
in-plane structures such as anechoic cysts.
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SUMMARY
This chapter summarizes the results which were presented in this thesis, including a discussion
of existing challenges and limitations, and concluding with a perspective on future work for the
project as a whole.
Summary of Results to Date
This thesis presented the work which has been accomplished to date towards realization of a
large aperture 2D array probe for patient imaging with closely integrated transducer and ASIC
electronics, specifically for screening and surveillance for hepatocellular carcinoma (HCC).
In Chapter 1, motivations for the large aperture 2D array were presented, which include the
ability to electronically create a large swept aperture which is capable of imaging deep in the body
due to the use of lower frequency. A large aperture has a low F# and since the lateral resolution
varies directly with F#, finer resolution can be obtained at lower frequency providing greater
penetration depths into the body. This is important for screening and surveillance for HCC due to
the fact that a significant proportion of patients are currently not imaged successfully with existing
ultrasound probes due to inadequate penetration into the body. The use of a lower frequency for
imaging can improve penetration depth, while a large aperture can mitigate the reduction in
resolution at the lower frequency. In addition, a large electronically focused elevational aperture
is critical for achieving excellent Contrast to Noise Ratio (CNR) inside of fluid filled cysts which
is important for differential diagnosis of potential cancerous lesions with low false positives. A
finely focused beam in elevation would also be extremely beneficial for novel microbubble-based
136
imaging methods which have the potential to greatly improve the image resolution of fine
features, in particular microvasculature.
The basis for the large aperture array is a modular approach for construction of the array in
order to guarantee high yield and low cost. These array modules utilize local ASIC switching and
buffering electronics integrated directly or in adjacent placement relative to a 2D transducer array
with a wide-bandwidth characteristic based on composites of PIN-PMN-PT piezo crystal
material.
Chapter 2 presented the design and validation testing of ASIC electronics for high voltage
muxing and local buffering of the transducer receive signals. A first prototype device, ASIC-1,
was implemented in a 0.35 µm high voltage (50 V) CMOS process, and operates for muxing
transmit signals up to 45 Vpp, while also buffering the return signals so that the high impedance
transducers maintain their sensitivity when connected to the cable capacitance and system receive
impedance. A prototype single ASIC module was developed, and benchtop tested showing
functional results for transmit switching and receive buffering was presented. A description of the
interface of the ASIC to the Verasonics Vantage 128 imaging system using an FPGA controller
was also presented. During testing of the ASIC-1 devices it was found that significant charge
injection was present which resulted in a plane wave being transmitted on the simultaneous
transmit-receive transition, and this created an image artifact when imaging highly echoic
structures such as flat glass plates. A second ASIC device was designed, ASIC-2, and the
fabricated chips were successfully validated as well.
Chapter 3 presented the design and validation of a single ASIC module integrated with a 5 x 5
2D array acoustic stack by direct assembly. A novel 3D printed acrylic interposer grid was used
137
to create a conducting backing array of pillars which serves to link the 2D transducer elements to
the surface of the ASIC for electronic connection by direct assembly. The detailed design and
trade-off analysis for the 1-3 composite of PIN-PMN-PT material was presented, including a
comparison of the measured transmit electrical impedance to the KLM model which were
topologically similar in terms of frequency response indicating good agreement of the model. The
fabrication process for the transducer stack was described in detail, and measured data for testing
of the completed prototype array was presented. The fabricated prototype transducer had a center
frequency of 4.5 MHz and Fractional Bandwidth of 80% when interfaced to the ASIC by direct
assembly. The transducer/ASIC module was successfully integrated to the Verasonics ultrasound
system and images of wire targets were obtained. The very small aperture (1.7 mm x 1.375 mm)
meant that the natural focus of the array was very close to the front surface (2 mm) and this made
it difficult to image clinically interesting subjects. Using the line spread functions acquired from
the wire target images, the axial resolution was calculated to be 200 µm, and the lateral resolution
was found to be 500 µm. This agreed well with the theoretical expected results.
Chapter 4 presented the design and analysis of a large element 2D array with a much larger
aperture than the array presented in Chapter 3. This much larger aperture was made possible by
using an adjacent assembly topology in which the transducer stack was integrated close to the
interface ASICs on a shared PCB substrate. The completed transducer array utilized the same
fabrication methodology which was presented in Chapter 3, however the pitch of the elements
was much larger (600 µm x 1600 µm) which made it possible to create a much wider azimuthal
aperture. The fabricated acoustic stacks obtained excellent uniformity of sensitivity (nominally
+/-2 dB), along with mean FBW of 80% and a center frequency of 3.5 MHz. The wide azimuthal
aperture resulted in a much deeper natural focus for the array which in turn made it possible to
138
image clinically useful targets in the form of an industry standard quality assurance ultrasound
phantom (CIRS 054GS). The phantom was used to image highly echoic cysts, a wire target
column, anechoic cysts and axial/lateral resolution wire-target formations. Results for these
imaging tests indicated that the prototype large element single module array has sufficient
sensitivity and CNR for imaging speckle down to 65 mm into the phantom, and also has the ability
to visualize the anechoic structures. Imaging of the axial/lateral resolution targets showed that the
array has an axial resolution between 250 µm and 500 µm by the CIRS image quality test
methodology, and similarly a lateral resolution of 500 µm – 1 mm. These numbers agreed well
with the theoretical expected results. In addition, the compressed image data for the axial/lateral
test formation was uncompressed in Matlab and used to obtain the axial and lateral line spread
functions for one of the wire targets. Measurements on the resulting data yielded axial and lateral
resolution estimates which were very similar to those obtained by the CIRS image quality method,
thereby confirming the results.
Upon validation of the single module for imaging with the Verasonics system, multiple
additional modules were next fabricated. Each of these was validated in turn and produced good
images for a single module with 20 elements in azimuth. With all of these individual modules
validated, a large array consisting of 3 tiled modules was then built. The large array had an
aperture of 36 mm in azimuth by 9.6 mm in elevation. This array was used to image the
CIRS054GS phantom and demonstrated superior image resolution of wire targets relative to a
single module alone. The combined assembly further demonstrated improved azimuthal range
with the linear array image width being increased to match the footprint of the array in azimuth.
Tests of the large two module and three module arrays demonstrated their ability to image much
139
deeper in to the CIRS054GS phantom than the single module alone which is consistent with the
expected capability from theory and simulations.
The imaging results for a two-array tiling of modules was compared to data obtained using
standard clinical probes which are known to be used for HCC, including an ATL C5-2 and ATL
L12-5, as well as an ATL P4-2 for comparison. The tiled modular array and the production probes
were operated using plane wave imaging with multiple angles and also had similar operating
frequencies. Images from the two-module array with 24 mm wide azimuthal aperture were
compared to images using the production probes and also to a Verasonics VSX simulation. The
two-module array demonstrated equivalent or superior image resolution at a depth of 110 mm
which is close to the desired operating depth of 140 mm. Simulations showed that for properly
aligned four-module and 6-module arrays, image resolution at depth should be significantly
improved relative to available production probes. These results are promising for the utility of the
modular tiled array for improving the sensitivity of screening and surveillance of HCC using
ultrasound.
Limitations and Future Work
The goal of this development is to create a large aperture array which can be manufactured at
relatively low cost and produce high quality results when imaging deep inside the body for
screening and surveillance for HCC. This goal requires a high performance and reliable array that
is constructed by tiling multiple modules together. Currently a maximum of three modules have
been tiled realizing promising image quality improvements. Ultimately a full six modules in
azimuth would be beneficial for imaging deep within the body. Building this large aperture will
require additional modules to be fabricated, and also will entail more sophisticated physical
140
alignment to mitigate the effects of defocusing as discussed in Chapter 4. In addition, while we
have to date demonstrated electronic focus in elevation in off-line Matlab processing, this
functionality is not yet implemented on the Verasonics system in real-time and is the subject of
ongoing and future work.
One potentially important limitation of the current ASICs (both ASIC-1 and ASIC-2) is that the
switches only operate up to 45 Vpp transmit voltage whereas typical ultrasound systems can
transmit at up to 100 Vpp or even 200 Vpp on every channel. This limitation reduces the overall
system sensitivity in B-mode imaging by 7-13 dB with a resulting reduction in the depth of
penetration. For harmonic imaging, sensitivity varies as V(TX)
2
and in this case the reduction is
greater (14-26 dB). This limitation could be mitigated in future work by choosing an ASIC
process that supports higher voltages of operation and by a redesign of the ASIC switch
architecture.
A limitation of the current modules is that we have not yet implemented long term reliability
testing of the interconnect structures or the ASICs. In future work, it would be important to
undertake a structured process of reliability testing such as HALT/HAST for the conductive
adhesive joints to determine how temperature cycling affects the continued reliability of the array.
This is especially important given applications where excessive power and long transmit cycles
would be used (e.g. harmonic image, ARFI, or coded excitation). Similarly, the ASICs should be
“burn-in” tested to determine the extent of infant mortality of the circuit design and improve the
architecture as needed for long term reliability.
Ultimately, a fully integrated large array can be constructed of multiple tiled modules which
are hermetically sealed into a probe enclosure for convenient use in a clinical setting.
141
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Abstract (if available)
Abstract
Tiled modular 2D ultrasound arrays have the potential for realizing large apertures for novel diagnostic applications. One important potential application for a large aperture array is screening and surveillance of hepatocellular carcinoma (HCC) lesions which represent an increasing disease burden in Asia, Europe and North America. HCC due to advanced liver cirrhosis caused by hepatitis B (HBV) and C (HBC), as well as Non-Alcoholic Steatohepatitis (NASH) in overweight and obese populations, is especially challenging for screening with standard ultrasound due to the requirements to traverse the subcutaneous fat layer which leads to a significant reduction in signal and therefore reduced penetration depth. A high yield large aperture modular 2D or 1.75D array has the potential for realizing a significant improvement over standard ultrasound equipment used for screening for HCC. The large aperture in the azimuthal dimension can result in improved lateral resolution using a lower frequency which allows for high resolution imaging at greater depths. In addition, the 1.75D array aperture provides electronic focusing in elevation for superior slice thickness uniformity along the entire axial range which in turn can improve contrast. These features have the potential for improved sensitivity of detection and surveillance of HCC lesions in difficult to scan patient populations and are the final intended outcome of the presented research. ❧ The thesis presents the results of work for fabrication of tileable 2D array modules implemented using 1-3 composites of high bandwidth PIN-PMN-PT material closely coupled with high voltage CMOS Application Specific Integrated Circuit (ASIC) electronics for buffering and multiplexing functions. Two types of integrated arrays are described: “Direct Assembly”, where the 2D acoustic array module is assembled directly on top of the ASIC silicon substrate, and “Adjacent Assembly”, where the 2D acoustic array module is assembled adjacent to a group of ASICs and both share a common Printed Circuit Board (PCB) substrate. ❧ The 2D acoustic array module is based on a 1-3 composite of single crystal PIN-PMN-PT transducer material which benefits from improved electromechanical coupling coefficient, k₃₃’, and increased Curie temperature. The backing for the 2D acoustic array module consists of a novel 3D printed acrylic frame that is filled with conducting and acoustically absorbing silver epoxy material. This interposer backing effectively connects each of the 2D array elements to respective signal channel connections on a supporting PCB or on a silicon ASIC substrate. ❧ The thesis first presents the design, analysis and testing of a prototype high voltage switching and buffering interface ASIC which is intended to be used to implement a large tiled modular ultrasound array either by direct or by adjacent assembly. The ASIC is implemented in a special-purpose, 0.35 μm high voltage (50 V) CMOS process, and comprises 40 unit cells with each cell being composed of 4 high voltage switches and a respective buffering preamplifier. Interfacing of the ASICs to a commercially available highly versatile open-architecture ultrasound imaging system, the Verasonics Vantage 128, is implemented using a local FPGA controller and is also described in the context of the ASIC design. The ASIC operates up to 45 Vpp transmit voltage and has a designed -3dB receive frequency of 7.5 MHz when interfaced to a nominal 6 pF transducer source capacitance. The results of electrical validation tests of the ASIC are presented in detail. A second ASIC was designed to alleviate charge-injection which was observed in the first generation of tested ASICs. The architecture of this second generation of ASICs is presented with test results. ❧ The acoustic design and fabrication process for a 2D PIN-PMN-PT based transducer array module having 4.5 MHz center frequency and nominal 308 μm pitch elements is discussed in detail. The process for integration of the 2D acoustic array module by direct assembly to the designed and validated ASIC is explained. The results of acoustic measurements and imaging tests with a prototype 5×5 element direct assembly module interfaced to the Verasonics system are presented. The prototype array demonstrates 80% mean fractional bandwidth of the functional 2D array elements, and acceptable images for the very small aperture. ❧ The design, fabrication and testing of a large aperture modular 1.75D array by adjacent assembly to a PCB with 4 interface ASICs is presented next. The 1.75D transducer array is supported by a 3D printed conducting and acoustically attenuating interposer backing which links the array to a PCB housing the interface ASICs. A novel low temperature approach for assembly of the acoustic modules to the printed circuit board utilizing “stamping” simultaneous printing of conductive adhesive on all interposer terminals is presented. The fabricated large 1.75D array module for direct assembly consists of an array of 6 x 20 elements at 600 μm pitch in azimuth, and 1600 μm pitch in elevation. The combined acoustic electric assembly displayed excellent overall mean fractional bandwidth of 81% for functional elements, high element interconnect yield of 93%, and had a center frequency of 3.5 MHz, and -20dB pulse length of 850 ns. The device was interfaced to the Verasonics system for testing, and images were acquired using an industry standard tissue mimicking phantom. The device displays promising image quality given the relatively small number of azimuthal elements. Axial resolution was found to be between 250 μm and 500 μm, while lateral resolution was found to be between 500 μm and 1 mm. Multiple of the tileable modules have been fabricated, and 2 module and 3 module array apertures have been built and tested. Results of imaging and pulse-echo evaluation with these arrays are presented. ❧ The image quality of the novel 1.75D multi-module arrays is compared to industry standard probes that are known to be used for screening and surveillance of HCC, highlighting increased penetration depth and improvements in lateral resolution.
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Creator
Wodnicki, Robert
(author)
Core Title
Highly integrated 2D ultrasonic arrays and electronics for modular large apertures
School
Viterbi School of Engineering
Degree
Doctor of Philosophy
Degree Program
Biomedical Engineering
Publication Date
07/21/2020
Defense Date
06/05/2020
Publisher
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1.75D array,2D array,3D printed,ASIC,hepatocellular carcinoma,interposer,large aperture,liver cancer,medical imaging,modular,OAI-PMH Harvest,ultrasonic,ultrasound
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1.75D array
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hepatocellular carcinoma
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