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Experimental demonstration of optical router and signal processing functions in dynamically reconfigurable wavelength-division-multiplexed fiber -optic networks

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Experimental demonstration of optical router and signal processing functions in dynamically reconfigurable wavelength-division-multiplexed fiber -optic networks

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Content EXPERIMENTAL DEMONSTRATION OF OPTICAL ROUTER AND SIGNAL
PROCESSING FUNCTIONS IN DYNAMICALLY RECONFIGURABLE
WAVELENGTH-DIVISION-MULTIPLEXED FIBER-OPTIC NETWORKS
by
John Edward McGeehan
A Dissertation Presented to the
FACULTY OF THE GRADUATE SCHOOL
UNIVERSITY OF SOUTHERN CALIFORNIA
In Partial Fulfillment of the
Requirements for the Degree
DOCTOR OF PHILOSOPHY
(ELECTRICAL ENGINEERING)
August 2005
Copyright 2005 John Edward McGeehan
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UMI Number: 3196854
Copyright 2005 by
McGeehan, John Edward
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Dedication
To my parents, without whose unending love, support, and encouragement, not a
word of this would have been possible.
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Acknowledgements
I would like to express my thanks to those that have made this journey possible. No
such list can begin without my dissertation and research advisor, Prof. Alan Willner,
who has guided my work throughout the years, but who is also a great listener,
counselor, and friend. I would also acknowledge my dissertation defense committee,
Prof. John Choma (the reason I am an electrical engineer and a graduate student),
Prof. Eugene Bickers, Jr. (who encouraged me from the moment I started
undergraduate work, and who plays a mean game o f miniature golf), and Prof. Hans
Kuehl (whose well-earned retirement was a loss for students everywhere).
Research is not performed in a vacuum, and I must also acknowledge my colleagues
within the USC Optical Communications Laboratory. OCLab members are not
merely intelligent, but they are truly nice people, and no projects could be completed
without everyone’s support. It would be improper to single out individuals, for the
lab is a collective - to OCLab past, present and future - my thanks, and best of luck.
And finally, friends who have supported and kept me sane along the way - far too
numerous to mention, yet some I must - to Cory Hill, Craig Browner, Chris and
LaShonda Hass, Michelle Hauer, Renard Dubois, Nye and Suzanne Liu, and Kuang
Bennett, among many others, my sincere thanks.
iii
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Table of Contents
Dedication ii
Acknowledgements iii
List of Figures and Tables v
Abbreviations xiv
Abstract xvi
Chapter I - Introduction 1
Chapter II - Optical Header Recognition 12
Chapter III - Optical 3-Input AND Gate 57
Chapter IV - Optical Time-to-Live (TTL) Decrementing 69
Chapter V - Optical Half-Subtracter/Adder Module 85
Chapter VI - Polarization-based Data Coding in Optical Code Division 104
Multiple Access (OCDMA) Systems
Chapter VII - Conclusion 131
Bibliography 138
iv
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List of Figures and Tables
Figure/Table Heading Page
Figure 2-1. Conceptual diagram of a modem routing node. Optical 13
packets are converted to electrical signals (O/E/O conversion), the
packet header is read, and the packet is forwarded to an appropriate
output port, where it is converted back to an optical signal for
transmission.
Figure 2-2. (a) Diagram of packet forwarding by a router at a 14
network node, (b) The concept of the “longest prefix match” method
of interrogating packet destination addresses.
Figure 2-3. Conceptual diagram of the optical bypass for an internet 18
router. Some of the optical signal is tapped-off and fed into a bank of
optical correlators that are configured to recognize certain subsets of
the header. Should any o f the correlators result in a “match”, the
packet is routed optically. If there are no “hits”, the packet is routed
to an auxiliary port for optical-electronic-optical (O-E-O) conversion
and conventional packet processing.
Figure 2-4. Concept of finding the “header subsets” to configure the 20
optical correlators. A simple algorithm finds the 100 most popular
destinations for packet traffic, then a more advanced algorithm
groups these by output port and determines what bit subsets can be
used to route most of the traffic via optical correlation.
Figure 2-5. (a) A simple digital tapped-delay-line correlator 23
(electronic or optical). To configure the correlator to match “1101”,
switches are used, with “ 1” represented by a closed switch, and “0”
by an open switch, (b) The result when the input in (a) is applied to
the correlator. The output would be sampled at time Ts to determine
a “match”, (c) The output from the correlator. Note that only a
matching pattern (1101) results in an output above threshold at the
sample time.
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Figure 2-6. Diagram of how a dual-correlator architecture (“ones” 27
and “zeros” correlators) can prevent false positive results. The
“zeros” correlator (the bottom box in each figure) has a closed switch
wherever there should be a zero, and checks for ZERO power at the
sample time, (a) A matching bit pattern is above the threshold at the
sample time in the “ones” correlator, and has zero power at the
sample time in the “zeros” correlator, and thus there is a match, (b)
A non-matching bit pattern may generate a “false match” in the
“ones” correlator, but is rejected by the “zeros” correlator.
Figure 2-7. Fiber Bragg grating (FBG)-based optical correlator. The 30
switches in Fig. 2-5 are replaced with FBG mirrors of varying
reflectivity, while a “0” bit is represented by a mirror that is tuned
away and transparent.
Figure 2-8. Diagram of the correlator used in this experiment - 8 32
metal heaters, deposited on a long FBG, allow the creation of a
dynamic thermally-tuned correlator. The FBG is manufactured to not
reflect a signal by default, and the heaters are set to tune the FBG to
reflect the desired bit positions.
Figure 2-9. Diagram of the reflection spectrum of the thermally- 33
tuned FBG. The experiment is run at 1561.4 nm, while the FBG
reflects between 1560.3 and 1560.9 nm. When a single heater is
tuned, the reflection spectrum of that heater shifts to the signal
wavelength.
Figure 2-10. Diagram showing tunable reflectivity for the thermally- 35
tuned optical correlator. By changing the control voltage, the
reflectivity at the signal wavelength can be tuned (which is required
in order to ensure a proper autocorrelation output).
Figure 2-11. (a) Diagram of a sample setting o f the thermally-tuned 37
correlator, tuned to the sequence “10010010”. (b) Output of the
correlator after the reflecitivities of each of the tuned-in portions of
the grating were tuned such that each of the reflection peaks has
approximately the same intensity, (c) Autocorrelation output for an
input bit sequence of “ 10010010”.
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Figure 2-12. Experimental setup for the 8-bit header recognition 38
system using “ones” and “zeros” correlators. The correlator is tuned
for a header pattern o f “xx 1x01x0”. The match/no match signal
controls an optical switch to route the packets appropriately.
Figure 2-13. Output of the optical switch for 4 sample input packets. 39
The packet that matches the correlator configured sequence
“xx 1x01x0” is routed to port “C” of the switch. All other packets are
routed to output port “D”.
Figure 2-14. Conceptual diagram of a multi-wavelength header 41
recognition system. A single module correlates the headers o f all
channels, and they are then demultiplexed and sent to individual
threshold detectors.
Figure 2-15. Reflection spectrum of the sampled fiber Bragg gratings 42
used in the multi-wavelength correlator. As the grating is tuned via
stretching, the reflectivity changes. In this manner the correlation
sequence (header to be recognized) can be changed.
Figure 2-16. Simple example of multi-wavelength correlation. Data 43
patterns on two wavelengths are correlated by the same set of
sampled gratings, tuned for the pattern “l x l”. After demultiplexing,
only the wavelength with the correct pattern shows a matching
autocorrelation peak with an output greater than the threshold at the
sample time.
Figure 2-17. Experimental setup for multi-wavelength header 44
recognition using sampled fiber Bragg grating-based correlators. The
correlators are tuned to match the pattern “1001”.
Figure 2-18. Results for multi-wavelength header recognition. 45
Figure 2-19. Power penalty measurements for the optical switch used 46
in both header recognition experiments. The penalty to receiver
sensitivity through the switch for either output port is negligible.
Figure 3-1. Digital gate-level diagram and truth table for a 3-input 60
AND gate. The ‘x ’ values represent ‘don’t care’ bits, where the
output is unchanged regardless of the signal logic level.
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Figure 3-2. Conceptual diagram o f the PPLN waveguide conversion 61
process, (a) In the “standard” 2-input configuration, a pump Xp
generates a “hard-wired” intermediate pump via second harmonic
generation, which mixes with the probe (ks) via difference-ffequency
generation (DFG) to produce the output at A ,o u t. (b) In the three-input
configuration, two pumps (A ,pi and Xp2) mix via sum-ffequency
generation (SFG) to produce the same intermediate pump as in (a),
which mixes with the probe.
Figure 3-3. Experimental setup for the 3-input AND gate. The three 63
signals are coupled together prior to entry into the PPLN waveguide;
all mixing occurs within the PPLN device.
Figure 3-4. Optical spectra for the 3-input AND gate, (a) The output 64
signal is present only when inputs A, B, and C are all present, (b-d)
Any missing input nullifies the conversion process.
Figure 3-5. Input and output waveforms for the 3-input AND 65
module, (a-c) 5 Gbit/s RZ inputs A (1545.0 nm), B (1547.5 nm), and
C (1555.0 nm). (d) 1552.5 nm output signal exists only when A, B,
and C take the value logic ‘ 1’.
Figure 3-6. Bit-error-rate curves and eye diagrams for the 3-input 66
AND gate. There is negligible power penalty to receiver sensitivity
at 10-9 bit-error-rate.
Figure 4-1. A conceptual diagram of our optical time-to-live (TTL) 71
decrementing module. A packet enters a switching node and first
passes through the TTL module. If the TTL is nonzero, it is
decremented by one and passes to the switch fabric. If the TTL is
zero, it is dropped from the network and the resulting TTL value is
irrelevant.
Figure 4-2. (a) Binary subtraction o f“l ” from the 8-bit binary value 73
“ 11010000”. Due to the borrowing process inherent to subtraction,
the result, “ 11001111” has all bits, up to and including the first “1”
bit, inverted, (b) Subtracting one from a binary number can be
performed by replacing a series of bits (up to and including the first
“ 1” bit) with their conjugates.
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Figure 4-3. Using gain saturation in a semiconductor-optical- 74
amplifier (SOA) conjugate data can be generated at the output o f the
optical circulator. A high-power data channel and low-power
continuous-wave (CW) channel (in our experiment, both channels
were at the same wavelength) counter-propagate through the SOA.
When the high-power channel is “on” (a “ 1” bit) the gain of the SOA
is saturated and the low-power channel is strangled, resulting in a “0”
bit. When the high-power channel is “o ff’ (a “0” bit) the SOA
contributes all its gain to the low-power channel, resulting in a “ 1”
bit. The extinction ratio can be >10 dB. Input (normal) and output
(inverted) oscilloscope traces of the data sequence “10100100” are
shown.
Figure 4-4. Difference-ffequency-generation (DFG) in a 75
periodically-poled lithium-niobate (PPLN) waveguide results in
“reflection” o f an input wavelength L|N around the PPLN pump
wavelength Lpump via a cascaded %(2):%(2) process. First, via
second-harmonic-generation, a channel at Lpump/2 is generated (1),
and that channel mixes with the input Lin to produce Lout (2).
Figure 4-5. The experimental setup of the optical TTL module. The 76
initial data stream is split into three branches - one is used to create
conjugate data (“databar”) via gain saturation in an SOA, one is used
as the data stream, and the last is detected and used to control the
module. A D-flip-flop controls the insertion of conjugate data by
controlling the PPLN waveguide pumps. The “TTL start” pulse is
perhaps generated by an existing preamble-detection module, such as
described in [4-9].
Figure 4-6. A close-up look at the TTL field o f a packet with a TTL 80
value of “00111100” (LSB->MSB) (a) The TTL field of the “data”
stream, (b) The TTL field o f “databar”, the conjugate data generated
via gain saturation in the SOA, showing a TTL value of “11000011”.
(c) The control signal for the “data” PPLN pump - “data” is L-
shifted at all times save from the start o f the TTL until after the first
“1” bit in the TTL. (d) The control signal for the “databar” PPLN
pump - “databar” begins L-shifting when the TTL starts and ends
immediately after the first “1” bit. (e) A close-up view of the TTL-
modified output, with a new TTL o f “11011100” (the bits up to and
including the first “ 1” bit having been replaced with “databar”).
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Figure 4-7. Optical spectrum at the output of the “data” PPLN 81
waveguide, showing the three signals - “data” at Xin=1545 nm, the X-
shifted output at A,o u t = 1 555.24 nm, and the 1550.12 nm PPLN pump.
Figure 4-8. Power penalty curves for the optical TTL module. The 81
total penalty is -2.4 dB.
Figure 4-9. (a) A number of input packets to the TTL module, each 82
with different TTL values and data payloads, (b) Packets with
nonzero TTL values have their TTL decremented and then pass
through the module, (c) When a packet with a TTL value of zero
enters the module, a signal is generated that drops the packet from the
network (in this case using an optical switch), and the resulting TTL
value is irrelevant.
Figure 5-1. (a). Gate-level conceptual diagram o f a half-subtracter. 90
(b). Gate-level conceptual diagram of a half-adder. The difference is
a single “NOT” gate (the bubble on the AND) in the half-subtracter.
Figure 5-2. Truth table for a half-subtracter and half-adder. The 91
shaded area denotes that the Difference output of the subtracter and
the Sum output of the adder are identical, (b). Gate-level conceptual
diagram o f a combined half-subtracter/adder, using 6 gates (three
AND, one OR, two inverters (bubbles)).
Figure 5-3. Conceptual diagram of the optical implementation o f the 92
half-subtracter/adder. This module uses three optical elements - two
semiconductor optical amplifiers (SOAs), and one periodically-poled
lithium-niobate (PPLN) waveguide. The OR function is provided via
an optical coupler. The upper shaded block is all that is required for
half-subtracter functionality, the lower block is required to include
half-adder functionality.
Figure 5-4. Experimental setup for the half-subtracter/adder. 95
Figure 5-5. Output optical spectrum of the PPLN waveguide. 97
Conversion efficiency for a 6 dBm input at 1548 nm is -21 dB.
x
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Figure 5-6. (a). Data input ‘X ’ to the half-subtracter/adder module. 98
(b). Data input ‘ Y ’ to the half-subtracter/adder modules, (c).
“Borrow” output of the half-subtracter. A pulse is present only if
input ‘Y ’ is logic ‘1 ’ while input ‘X ’ is logic ‘O’, (d).
“Difference/Sum” output of the half-subtracter/adder. A pulse is
present if input ‘ Y ’ is logic ‘ 1’ or input ‘X ’ is logic ‘ 1 but not both.
(e). “Carry” output of the half-adder. An output pulse is present only
if both inputs ‘X ’ and ‘Y ’ are logic ‘1’.
Figure 5-7. Bit-error-rate plot for the half-subtracter/adder. The 99
maximum penalty from the module is ~1 dB, for the Difference/Sum
output.
Figure 6-1. Conceptual diagram o f an OCDMA LAN using a ID 109
code. User #1 encodes data intended for user #2 using a code unique
to user #2. The code consists o f a number of pulses (“chips”) placed
in specific time subdivisions of the original bit. This data is
broadcast to all users on the LAN via a star coupler, however, only
user #2’s decoder can translate the encoded pulses into an output bit -
all other decoders, not knowing user #2’s code, simply see noise.
Figure 6-2. (a). Two sample ID OCDMA codes with code weight 3 112
(3 pulses) and 13 possible time subdivisions, (b). Time-shifting the
two codes with respect to each other shows that by shifting code #2 to
the “right” with respect to code #1, there can be a maximum of one
code “collision” (common pulses), (c). Shifting code #2 to the “left”
with respect to code #1 shows, for one potential time shift, two
common chips. Thus the maximum collision parameter, k , for this
code is 2.
Figure 6-3. (a). A standard set of NRZ data bits and a ID OCDMA 114
representation o f those bits. (b). A 2D (time, wavelength)
representation o f the data bits shown in (a), (c). A representation of
the data bits shown in (a) using a polarization-diversity coded format
- the same code can be used twice, resulting in a doubling o f user
capacity.
Figure 6-4. Experimental setup for polarization-diversity OCDMA. 115
Tc = chip time.
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Figure 6-5. (a) Encoded series o f bits for a single-user (single
polarization active), (b). Encoded series of bits when both
polarizations are active, (c). OCDMA decoded bits for a single
active polarization, (d). OCDMA decoded bits when both
polarization states are active - additional noise is present due to
polarization leakage, (e). Output 2 Gbit/s bits after threshold
detection for the case o f a single active polarization, (f). Output 2
Gbit/s bits after threshold detection for the case of both polarizations
active.
Figure 6-6. Bit error rates for the polarization-diversity OCDMA
system with one polarization on, and with both polarizations (users
1&2) active. Total penalty is <2 dB when both polarizations are
active.
Figure 6-7. (a). A 3D (time, wavelength, polarization) representation
of data bits. (b). Increase in total supported users (compared to a 2D
OCDMA system) as the maximum collision parameter, k , of a 3D
codeset increases.
Table 6-1. Users supported by 2D and 3D OCDMA codesets for
identical constraints.
Figure 6-8. (a). Two user codes in a polarization diversity OCDMA
system. A given user only has pulses on a single polarization, (b).
Two user codes in a 3D OCDMA system. Users have chips in both
polarization states.
Figure 6-9. A “black box” experimental setup for our 3D OCDMA
transmission system. A data bit is encoded using the 11-chip, 4-
wavelength, weight 4 (per polarization) code shown in this figure,
transmitted at 11 Gchip/s (1 Gbit/s) through a small length of fiber (<
1 km) and a star copier to emulate a LAN environment, then sent to
the decoder, where it is reassembled into a bit. The “encoder” and
“decoder” branches are explained in detail in later figures.
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Figure 6-10. (a). Experimental setup for the 3D OCDMA encoder. 123
Four lasers are combined, modulated, and then each polarization is
encoded using a set of fiber and free-space delay lines, (b). An
encoded data bit on the perpendicular polarization state. The 4
pulses, each at a different wavelength, are placed according to the
code shown in Fig. 5. (c). An encoded data bit on the parallel
polarization state, (d). The signal when the encoded data on the two
polarization states are combined using a polarization beam combiner.
Figure 6-11. (a). Experimental setup for the 3D OCDMA decoder. 125
The two polarization codes are split using a polarization beam
splitter, and each are independently decoded, then sent to individual
receivers and threshold detectors. After threshold detection, the two
signals are ANDed together to produce a 1 Gbit/s NRZ output, (b).
A series o f decoded 1 Gbit/s data bits on the perpendicular
polarization, (c). A series o f decoded 1 Gbit/s data bits on the
parallel polarization, (d). The same series of data bits after both
polarizations are threshold detected and ANDed together - the
resulting output is 1 Gbit/s NRZ.
Figure 6-12. Power penalty plot for the 3D OCDMA system. Total 126
penalty is 1.8 dB when both polarizations for a given user of interest
are active.
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Abbreviations
AWG Arrayed waveguide grating
CDMA Code-division multiple-access
CW Continuous-wave
DFG Difference-frequency generation
EDFA Erbium-doped fiber amplifier
FBG Fiber Bragg grating
FWM Four-wave mixing
IP Internet protocol
LSB Least significant bit
MSB Most significant bit
NRZ Non-retum-to-zero
OCDMA Optical code-division multiple-access
O-E-O Optical-electronic-optical
PPLN Periodically-poled lithium-niobate
RZ Retum-to-zero
SFG Sum-frequency generation
SHG Second harmonic generation
SOA Semiconductor optical amplifier
TCP Transport control protocol
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TTL Time-to-live
WDM W avelength-di vision-multiplexing
XPM Cross-phase modulation
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Abstract
Future network applications, such as real-time interactive multimedia, high-
resolution imaging, and secure communications, may require bandwidth levels and
impose latency requirements beyond that which electronics can provide. These
requirements may be met by keeping the data plane (where data and packets are
transmitted and switched), and perhaps the control plane (where routing and
forwarding decisions are made), in the optical domain. However, as it may not be
practical to perform all control plane functions optically, an optical network is
proposed where optics is used within the data plane to process, modify, and forward
packets, and optics and electronics complement each other within the control plane,
allowing “optical/electronic hybrid signal processing” network nodes within the all-
optical data network.
A number o f essential optical control and data plane functions that could be located
within such a network node are proposed and demonstrated experimentally. In the
control plane, modules should be simple, fast, and operate on as many channels as
possible. A number of such modules, including an integrable optical header
recognition module, a multi-channel header recognition module, and a 3-input AND
gate for contention detection, are demonstrated experimentally.
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In the data plane, modules must operate at the line rate, and result in minimal data
distortion, as many different modules may be cascaded within a network node, and
data traffic may pass through multiple nodes before reaching its destination. A
number o f “mandatory” packet processing functions take place at every node in
modem networks, and these must be replicated within the optical data plane. Two
examples are time-to-live decrementing, which prevents packet congestion, and the
calculation o f a packet checksum, which acts as error detection. An in-line optical
time-to-live module and an optical half-subtracter/adder (an essential piece o f an
optical checksum subsystem) are demonstrated experimentally.
Security may also be an issue in both the control and data planes. However,
increasing network security often means decreasing the number o f supported users
within the network. For this reason, a novel three-dimensional (time-wavelength-
polarization) optical code-division-multiple-access (OCDMA) coding scheme is
demonstrated, that retains the enhanced security of two-dimensional (time-
wavelength) OCDMA, while increasing the number o f supported users.
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Chapter I - Introduction
Since the advent of digital communications and the birth of the publicly available
Internet, network architectures have been designed using electronic chips and
switches. As a natural consequence, networks evolved based on the advances in and
the need to adapt to the limitations of electronic processing technology. This
evolution wrought what could be considered the modem “hybrid” electric-optical
core data network, in which:
• Electronic processing technology enabled the transition from circuit
switching to the more flexible packet switching
• Optical fiber transmission technology enabled high-speed, long-distance
communications
Current electronic networks can be considered to have three parts - end users
(consumers and businesses) attach to an “access” node in the overall network, which
aggregates many (tens, perhaps hundreds) of low-bandwidth users into a single data
stream and transmits it to the larger wide-area network. When data must be
transmitted over a long distance, access nodes send data to an “edge” node o f the
network, which sits at the outer edge of the “core” network. An edge router collects
data from many access routers, and sends it into the “core” network. Within the
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network core, “core” routers tend to run at high line rates (2.5 or 10 Gbit/s per
channel), operate rapidly (millisecond to sub-millisecond latency), and have only
between four and eight input/output ports.
At each node within the core network, optical packets are converted into electrical
signals (O/E conversion) in order to perform networking and processing functions
such as header recognition, routing, packet forwarding, TTL decrementing, header
coding/decoding, and calculation o f checksum [1-1 - 1-5]. After processing, these
packets are then converted back to optical signals for transmission, resulting in
optical-electronic-optical, or O/E/O, conversion at each core network node - a costly
(in terms o f latency) and inefficient (in terms of power consumption) process [1-6].
In general, electronic technologies are cheap, available, and mature. The process by
which packets traverse an electronic router are well-understood, and significant
advances in data processing capability within a router generally results not from new
ways of approaching the network, but by further miniaturization/integration (faster
components) and increased parallelism (doing more things at once, or on multiple
data packets simultaneously). However, as bit rates and bandwidth demands rise
within the network core, electronics may be limited in terms of speed, power
consumption, and data-format transparency when compared to optical technologies
[1-7].
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Future networking applications, such as interactive multimedia and secure
communications may require bandwidth levels and impose latency requirements
beyond that which electronics can provide. These requirements may be met by
keeping data in the optical domain, using all-optical switches, and using optics to
perform essential packet processing functions, such as header recognition. However,
it may not be practical (or even feasible) to perform all routing processes in the
optical domain. There are significant questions whether optical technologies are best
used only in the data plane - the “actual path” that all packets take when traversing
the router, encompassing such functions as header updating and packet buffering [1-
8, 1-9] - or also in the control plane - the functions of the router that use data within
the packet to make decisions, but can operate by simply reading the packet data,
without needing to alter the packet or its transmission [1-10]. Control plane
functions can include header recognition, packet contention resolution, and error
detection [1-11].
A likely compromise is an optical data plane combined with a hybrid
optical/electronic control plane, where optics and electronics are each reserved for
those functions that they do best:
Optics
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• Physical-layer transport between network nodes
• Fast all-optical processing of the majority o f optical packets (header
recognition, synchronization, header replacement/updating, buffering)
• Format-transparent all-optical switching o f data packets
• Regeneration o f degraded optical signals
Electronics
• Processing of less-likely yet computation-intensive signals (rare/error-
filled headers)
• Storage of large routing tables
• Regeneration of packets degraded beyond the threshold for optical
regeneration
• Simple, low-bit-rate control signals for optical data and control plane
modules
Network routers perform a number of essential control-plane functions - it is the
control plane where much of the “routing” takes place. Key functions include packet
header recognition, packet routing and forwarding, packet contention resolution,
signal quality monitoring, and error checking. A significant question is how many of
these functions can and should be done optically, and in what scope (for example,
4
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optics could be used to recognize the most frequent headers, with rare headers being
read via conventional electronics at the cost of additional latency).
Within the data plane, for a network to take advantage of transparent optical
switching and avoid O/E/O conversion, it is necessary for the router’s data plane
functions to be implemented optically. Some essential data plane functions include
header time-to-live decrementing, checksum computation, header replacement,
packet buffering, signal regeneration, and packet switching. As these functions act
directly on the data in an optically-switched network, they must not significantly
degrade the data (or the data must be regenerated at each node prior to
retransmission), as data must pass through all such modules, and do so multiple
times (as data traverses many core routers on its way through a network).
For the control plane, header recognition poses a problem within the optical domain.
Routing tables generally have >100,000 entries, and, lacking optical memory, it is
infeasible to implement a header recognition module with 100,000 individual optical
recognition elements. To take advantage of the decreased latency available from
optics, a hybrid optical/electronic header recognition module is proposed that uses a
special algorithm to determine the most commonly used headers and distill them
down to a manageable number o f optical correlation/recognition modules. A
majority o f the network traffic can be routed all-optical using these optical header
5
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recognition modules, while electronics can handle the few “misses”. Both integrable
single-wavelength and multi-wavelength header recognition modules are
demonstrated in Chapter 2.
Contention resolution and detection is an interesting problem that merges the control
and data planes. It is not yet known how contention resolution will take place in the
optical domain - via deflection routing, optical wavelength conversion, or optical
buffering. However, in each case, it is necessary to determine when there are too
many packets heading to a destination port at one time. Optical logic is also often
necessary within both the control and data planes - to detect contention, to handle
synchronization issues, to allow for addition and subtraction, as well as memory. To
address these applications, 3-input AND gate is demonstrated in Chapter 3. While
optical logic gates are in their infancy, the majority o f demonstrated logic functions
operate only on two inputs, meaning that multiple lossy gates must be cascaded to
realize many logic functions (such as the full adder). A 3-input gate can alleviate
cascading concerns while allowing functions such as enabled header recognition and
optical full adders.
Within the data plane, one of the few packet processing steps that is done at every
router is decrementing the packet time-to-live (TTL) field. This field serves to
prevent “routing loops”, where packets exist indefinitely within the network, taking
6
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up “space” and bandwidth that could be used by normal packets. Each time a packet
passes through a router, the value within the TTL field is reduced by one, and when
it equals zero, the network assumes there is an error and destroys the packet. The
TTL field is important enough that in the IPv6 protocol, which will someday take the
place o f the IPv4 protocol used in the Internet today, while most header fields
currently in use were removed, the TTL remains - meaning that future optical
networks will need the ability to decrement this field within the data plane. A
module that performs both TTL decrementing and packet dropping (in the case o f a
zero TTL value), and that can act on an 8-bit field within a packet header, is
proposed and demonstrated in Chapter 4.
Optical arithmetic (addition or subtraction) may be required within the optical data
and control planes. Optical TTL decrementing can be accomplished using an optical
subtracter, while optical addition may be critical in computing the value of the IP
packet “checksum” field, which allows for error detection during packet
transmission. This checksum must not only be calculated on-the-fly by the routing
node to allow for error detection (a control plane function), it must be recomputed
after any packet modification (such as the decrementing o f the TTL) and the value
within the packet modified (a data plane function). While computing the IP
checksum optically is beyond current optical technologies, it is essentially to
construct the fundamental “building blocks” that can evolve into a fully-functional
7
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optical arithmetic-logic unit (ALU). One such fundamental block, a simultaneous
optical half-subtracter and half-adder, is proposed and demonstrated in Chapter 5.
Within the network core, optical transmission rates generally are no lower than 2.5
Gbit/s per wavelength within the fiber, and often reach 10 Gbit/s and beyond (with
40 Gbit/s/wavelength technologies now being deployed). While this is ideal for the
network core, where large amounts o f data have been aggregated by the edge routers,
it is inefficient when applying optics to local-area-network (LAN) environments (e.g.
an office building). Within a LAN, there may be many users (e.g. desktop
computers connected to the network), but users are not transmitting at all times, and
the data rate per user is considerably less than the 10 Gbit/s or more supplied by a
single wavelength. Thus, assigning users unique wavelengths simply wastes
bandwidth. To allow for the fine granularity of traffic within an optical LAN
environment, optical code-division-multiple-access (OCDMA) technologies have
been proposed. Similar to wireless CDMA, an OCDMA system assigns users unique
codes, and all users use the same “bandwidth space”, defining the “intended data
destination” by the code they use to transmit the data. A unique three-dimensional
(time-wavelength-polarization) OCDMA user code system that allows substantially
more users (desktops) than conventional OCDMA technologies is demonstrated in
Chapter 6.
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The Internet as it is known today would not exist without optical fiber - the fact that
10 and 40 Gbit/s signals can be transmitted across the ocean floor with losses orders
of magnitude lower than coaxial cable has led to a revolution in communication
technologies around the globe. The demand for bandwidth grows unabated - now
more than doubling yearly, after increasing by factors of ten or more per year during
the “Internet bubble”. This insatiable demand for more “bits per second” may push
optics from the application of physical transport, into the router itself, where the
possibility of extremely low latency routing may be realized. The development o f a
hybrid optical/electronic router may well be that which sparks another revolution in
communications technology - the benefits of which, like those in past upheavals in
communications, are likely incalculable.
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REFERENCES
[1-1] P. Green, “Progress in optical networking,” IEEE Communications Magazine,
vol. 39, no. 1, pp. 54-61, 2001.
[1-2] W. Hung, K. Chan, L. K. Chen, C. K. Chan, and F. Tong, “A routing loop
control scheme in optical layer for optical packet networks,” Conference on Optical
Fiber Communications (OFC) 2002, paper ThGGl 11, pp. 770-771, 2002.
[1-3] K. K. Goel, P. R. Prucnal, Y. Shimazu, M. Milbrodt, E. Desurvire, and B. Tell,
“Demonstration of packet switching through an integrated optic tree switch using
photo-conductive logic gates,” Electronics Letters, vol. 26, no. 5, pp. 287-289, 1990.
[1-4] X. Chen and P. Mohopatra, “Lifetime behavior and its impact on Web
caching,” IEEE Workshop on Internet Applications 1999, pp. 54-61, 1999.
[1-5] C. Jiao and L. Schwiebert, “Error masking probability of l ’s complement
checksums,” 10th International Conf. on Computer Communications and Networks,
pp. 505-510, 2001.
[1-6] J. M. Simmons, “On determining the optimal optical reach for a long-haul
network,” IEEE/OSA Journal o f Lightwave Technology, vol. 23, no. 3, pp. 1039-
1048, 2005.
[1-7] R. Giles, K. Kumaran, D. Mitra, C. Nuzman, and I. Saniee, “Selective
transparency in resilient optical networks,” Proceedings o f MILCOM 2002, vol. 1,
pp. 12-1 A, 2002.
[1-8] W. D. Zhong and R. S. Tucker, “A new wavelength-routed photonic packet
buffer combining traveling delay lines with delay-line loops,” IEEE/OSA Journal o f
Lightwave Technology, vol. 19, no. 8, pp. 1085-1092, 2001.
[1-9] E. Park, D. Norte, and A. E. Willner, “Simultaneous all-optical packet-header
replacement and wavelength shifting for a dynamically-reconfigurable WDM
network f IEEE Photonics Technology Letters, vol. 7, no. 7, pp. 810-812, 1995.
[1-10] D. Colle, S. De Maesschalck, M. Pickavet, P. Demeester, M. Jaeger, and A.
Gladisch, “Developing control plane models for optical networks,” Conf on Optical
Fiber Communication (OFC) 2002, pp. 757-759, 2002.
10
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[1-11] Z. Pan, H. Yang, Z. Zhu, J. Cao, V. Akella, S. Butt, and S. J. B. Yoo,
“Demonstration o f variable-length packet contention resolution and packet
forwarding in an optical-label switching router,” IEEE Photonics Technology
Letters, vol. 16, no. 7, pp. 1772-1774, 2004.
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Chapter II - Optical Header Recognition
I. INTRODUCTION
In present-day fiber-optic networks, data packets are converted to electrical form at
each node to process their headers and make routing decisions, as shown in Fig. 2-1.
As routing tables grow in size, more memory accesses are required to determine the
next-hop address and appropriate output port to forward each packet to. The
associated increase in routing-table lookup times is becoming a significant source of
latency in the network core. To make matters worse, the transmission capacity of
optical fibers is rapidly increasing, forcing the routers to accommodate more packets,
more often. Since routing tables will continue to grow and transmission rates are
always on the rise, it is essential to develop methods to reduce the lookup-time
required to forward incoming IP packets. This motivates the need for optical
designers to examine the operations of current electronic routers to determine where
it may be feasible to employ optical techniques to assist the electronics in making
ultra-fast routing decisions.
IP routers perform two primary functions, routing and forwarding. Routing is the
process of generating the lookup table of destination addresses and corresponding
12
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Input
Optical
Packets
Control
E/O
E/O O/E
E/O
Electronic
Switch
3 C
Routing Table
Lookup
Electronic Buffer
Output
Optical
O Packets
Fig. 2-1. Conceptual diagram of a modem routing node. Optical packets are converted to electrical
signals (O/E/O conversion), the packet header is read, and the packet is forwarded to an appropriate
output port, where it is converted back to an optical signal for transmission.
next-hop addresses and output ports. Routing tables in the network core are fairly
stable and are typically recomputed on a timescale of tens o f minutes to reflect the
continually evolving layout of the network. Forwarding is the process o f steering
packets toward their destinations by comparing their 32-bit destination addresses to
entries in a routing table using a longest-prefix matching algorithm, as shown in Fig.
2-2(a). Thus, routing is analogous to drawing a map and forwarding is the act of
following its directions. The basic concept of forwarding is illustrated in Fig. 2-2(b)
for a packet with a simple 8-bit destination address of “11010100.” This address is
compared to entries in the routing table, where two matches are found. The
matching entry with the longest-prefix is chosen and directs the packet to output port
3.
The forwarding process can be time consuming given that core routing tables have
grown to contain more than 100,000 entries. Lookup-times are presently on the
order of microseconds. Given that a significant portion o f Internet packets entering
routers are short, 40-byte TCP/IP acknowledge packets, nanosecond lookup-times
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Destination
Address
32-bits
IP Packet
Port 1
IP Router
(a)
Next Hop
32-bits
Example using
8-bit address
11010100 m = >
Destination
address
Example Routing Ta ble
Entries Match? Port
•
•
•
•
•
•
•
•
•
11010xxx
✓
2
101100xx
No 2
110101xx
< / >
3 ■
1101011x
/N o 1
•
/ 5
•
•
•
►Forward
Longest Prefix Match
(b)
Fig. 2-2. (a) Diagram of packet forwarding by a router at a network node, (b) The concept of the
“longest prefix match” method of interrogating packet destination addresses.
are needed to achieve the desired Tb/s throughput. Some efforts are being made to
improve electronic hardware architectures and search algorithms to reduce lookup
times [2-1], but the ideal case would be for the packet headers to be processed on-
the-fly using optical signal processing techniques, so that the only limitation to
throughput is the speed of the optical switch (currently a few nanoseconds). A true
all-optical router would therefore need to be capable of 24-bit lookups into 100,000-
entry tables at >10 Gb/s (since only 24 of the 32 address bits are significant for
packet-forwarding in the network core). Unfortunately, such capabilities are beyond
current optical technologies, which inherently suffer from high optical splitting
losses that limit them to matching incoming packets against a few patterns that are a
14
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few bits long. However, some recent developments hint at the feasibility of a partial
solution in which presently achievable optical techniques may be combined with a
novel routing-table optimization algorithm to reduce lookup-times by at least an
order of magnitude from microseconds to nanoseconds.
Given that most core routers have only four to eight outgoing ports, it may be
possible to determine a packet’s output port by looking at only a small subset of the
24 bits in the destination address. So although building a true all-optical router is
beyond current optical technologies, it is feasible to build an “optical bypass” to
vastly accelerate a conventional router. A subset of the traffic would be routed by
the optical bypass without any O/E conversion, at increased throughput and
decreased latency. The remainder of the traffic, which requires more complicated
processing, is handled by a conventional electronic router. Previous research has
shown that by utilizing a subset o f the routing table with as few as 100 o f the most
popular entries, the router can still successfully forward as much as 90% o f the
incoming traffic [2-2]. From these 100 entries, a number o f “subsets,” of the total
routing table, each consisting of a number of bits in the destination address (4-8) that
can be interrogated via optical recognition techniques and that route to the same
output port, can be resolved. The remaining challenge is to design a method to
optically recognize these “subsets” to generate “match” signals that can be used to
forward an optical packet.
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A promising technique for recognizing a small set of optical packet header bits on-
the-fly involves the use of time-domain optical correlators to compare a few header
bits on an incoming packet to a predetermined header-bit pattern. The optical
correlators required for this application must be tunable and designed to easily scale
to 40 Gb/s and beyond. Optical correlators are typically implemented with tapped-
delay-line structures that split the optical signal into several branches, where each
successive branch delays the signal 1 bit-time longer than the previous branch. The
tiny distances required to achieve these differential 1-bit delays in fiber at bit rates
>10 Gb/s present a serious challenge for previously reported correlator designs
(described in detail in a later section of this chapter).
In this chapter, two correlator designs for optical header recognition are proposed
and experimentally demonstrated. In the first design, a compact, single-
wavelength/single-channel fiber Bragg grating (FBG)-based correlator is constructed
from a single uniform fiber grating that is divided into separate, electrically-tunable
sections using thin film micro-heaters. The precision of the heater deposition defines
the spacing between gratings. Since thin-film heaters can be fabricated with
lithographic precision, spacings down to hundreds of microns are achievable with
this technology, enabling the correlator to readily scale to higher bit rates.
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In wavelength-division-multiplexed (WDM) systems, packets arrive at routing nodes
on multiple wavelengths. For this case, a separate bank o f standard optical
correlators (for example, the first design) is required for each incoming wavelength
channel. To reduce the number of components required in a WDM routing node, the
second correlator implementation demonstrates a correlator design that is constructed
with sampled-FBGs that enables the headers on multiple wavelengths to be
simultaneously tested against a stored bit pattern. The correlation operation can
therefore be performed prior to demultiplexing and switching. This eliminates the
need for multiple sets of correlators and significantly reduces the required number of
components in a WDM routing node.
An additional advance over previously reported correlator architectures (described in
upcoming sections) is that this approach uses two grating arrays per correlator, one
to correlate with the desired “1” bits in the input signal, and another to match with
the desired “0” bits. This research shows that the combined outputs from both of
these correlators are necessary to produce unique correlation outputs for all 2n
possible n-bit sequences.
II. OPTICALLY-ASSISTED INTERNET ROUTING
17
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To implement an effective optical bypass for an electronic router, the key design
decision is to combine a software algorithm with a small set o f dynamically
configurable fiber-Bragg-grating based optical correlators. A conceptual diagram
showing how the optical bypass is implemented in an IP router is shown in Fig. 2-3.
A small portion of the incoming optical packet stream is tapped off and sent to the
correlator module, which consists of one correlator per “subset” o f bits to be
recognized. The optical signal is amplified, split and sent to M correlators, each of
which can be configured to produce a “match” signal for any number, K, o f the 24
significant bits in the destination address.
Data B Data A
ML
Tap
Correlator Control & Timing
Router
E/O
Switch
Electronic
Processing
O/E
Optical Correlator Module
EDFA
Correlator 1 f =Port 1 Match?=
Correlator 2 = J = Port 2 Match? ^
Correlator 3 = S =Port 2 Match?
Correlator 4 = J = Port 3 Match?
Correlator M = f = Port 4 Match?
Data B
Data A
Auxiliary Port for
optical “misses”
# Correlators > # Ports, (M>N)
Fig. 2-3. Conceptual diagram of the optical bypass for an internet router. Some of the optical
signal is tapped-off and fed into a bank o f optical correlators that are configured to recognize
certain subsets of the header. Should any of the correlators result in a “match”, the packet is
routed optically. If there are no “hits”, the packet is routed to an auxiliary port for optical-
electronic-optical (O-E-O) conversion and conventional packet processing.
18
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An algorithm for generating a routing table cache containing as few as 100 entries
that could successfully route as much as 90% of the traffic entering an IP router [2-2]
has been previously demonstrated. Since a 100-entry lookup-table is still too large to
implement optically, the goal here is to define an algorithm to represent this 100-
entry table with as few as eight or ten optical correlators. The fact that Internet
routers typically have only two to four outgoing ports makes this feasible. Even if
there are 100,000 entries, each of them only points to one o f two or four possible
destinations. So once the table has been reduced to a 100-entry cache o f “popular”
destinations, the entries in this smaller table can be further optimized by grouping
them according to output port. The algorithm then searches for patterns among the
entries in these groups compared to the entire 100,000-entry table for which the
output port can be determined by examining only a subset, K, o f the n bits in the
destination address, with K ideally less than 5. An additional goal o f the software is
to determine the optimum groupings of these entries so as to minimize the number of
optical correlators required. The software then configures each optical correlator to
represent one of the resulting groups. This process is illustrated in Fig. 2-4. Note
that there will likely be multiple correlators corresponding to each output port since
there will be groups o f bit patterns that the algorithm determines should all be routed
to a particular port. For example, it is feasible that two correlators, each o f which are
configured to match a different subset of address bits, both route packets to the same
19
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'100,000 Total Entries
Core routers only have
N = 2 to 4 output ports.
All entries point to one
of them.
*
'100 “Popular” Entries
Electronic
Routing Table
“Cache”
~10 Optical Correlators
(match patterns to output ports)
M Correlators recognize
||_ any K of 32 address bits.
(Algorithm goal:
minimize M and K)
Fig. 2-4. Concept of finding the “header subsets” to configure the optical correlators. A simple
algorithm finds the 100 most popular destinations for packet traffic, then a more advanced algorithm
groups these by output port and determines what bit subsets can be used to route most of the traffic
via optical correlation.
port when they get a match. The algorithm must re-compute the optical lookup-table
and reconfigure the correlators each time the routing table is updated. Threshold
detectors are used at the outputs of the optical correlators to provide an electrical
match/no-match signal to the optical switch. The switch uses these signals to
determine which output port each packet should be forwarded to. If the correlators
fail to find a match for an incoming packet, the switch routes the packet to an
auxiliary port for electrical processing by a conventional electronic router (see port 5
in Fig. 2-3). For example, if the algorithm predetermines that any incoming packets
with bit positions 1, 4, and 5 equal to 1, 0, and 1 should go to port 1, then a correlator
is configured to provide a “match” signal for any input pattern with “lxxOl” for its
20
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first five bits and anything else for the rest o f the address (where the “x”s indicate
“don’t care” bits that can either be a "1" or "0").
While the optical bypass enables on-the-fly forwarding of incoming packets, there
are some issues associated with forwarding packets without converting them to
electronics to process and update their headers. For example, the IP header's time-to-
live (TTL) field is not decremented and the header checksum is not recomputed,
whereas protocol requires that both of these operations occur at each network hop.
One potential solution to this problem is to revise the protocol to allow for packets to
traverse a small number of core network hops without O/E conversion and then
update these fields once they reach a fully electronic router at the core edge.
Alternatively, some advanced optical signal processing techniques (some discussed
in later chapters) are being developed to directly operate on these fields in the optical
domain, though this research is still in the early development stages.
III. DIGITAL OPTICAL CORRELATION VIA TAPPED DELAY LINES
Correlation, or matched filtering, is an important signal processing function. The
term “correlator” is typically used to describe a hardware implementation o f a
matched filter. Although there exist strict definitions for matched filters versus
correlators on a systems level [2-3], most hardware implementations that produce the
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same output as a matched filter, sampled at the peak autocorrelation value, are
referred to as “correlators.” This function has historically been used in conjunction
with special coding techniques to pick a desired signal out of noise, an essential
requirement for RADAR and CDMA systems. In optical communication systems,
correlators can likewise be used to recognize particular bit patterns, enabling
applications such as optical CDMA networks and header recognition. Optical
correlation presents a unique situation when compared to electrical correlation in that
the data bits in an optical communication system are most commonly represented by
the optical power o f the signal as opposed to a voltage as in electrical systems.
Consequently, the digital waveforms consist of only positive values (a “unipolar”
system), causing the correlation function of any two optical signals to be a
completely non-negative function. It is possible with optical phase modulation to
achieve a bipolar system, but this requires a coherent receiver, which is far more
complex to implement in optics than the standard direct intensity-detection receivers.
As such, this work (and this section) applies primarily to the correlation o f digital
binary waveforms that are intensity-modulated onto optical carriers.
Just as with electronics, prior to the development of high-speed digital signal
processors, a common implementation o f an optical correlator is the tapped delay
line. A basic implementation o f an optical tapped delay line is shown in Fig. 2-5(a).
In this example, the delay line is configured to match the correlation sequence
22
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Input three
4-bit words
1011 1101 0101
x(t)
I
Q .
W
X
0 T bit
/
C 0 2 T bit
%
< D
C
L q
E
o
o
T —
X
■ 't
Correlation
Output, y(t)
/
TV
t = T
Thresho
Detector
Match
or
No Match
Configured to match “1101”
(a)
word 1 word 2 word 3
+
Sample Times, Ts: f
t
« > )
t
1 O il 0 1 0 1 1 1 1 0 1
110 1 0 1 0 1 1 1110 1
0 0 0 0 0 0 0i0 0 0 0 0
1 0 1 0 1 Oil 1 1 1 0 1
1 1 1 2 1 211 31213 2 2 2 0 1
Delay Weight
None 1
1 bit 1
2 bits 0
3 bits 1
c
o
T O
8>
o
o
Correlation Output
Threshold
► time
0 1
Sample Times, Ts: ^
No match
t
Match
I
No match
-►time
(C)
Fig. 2-5. (a) A simple digital tapped-delay-line correlator (electronic or optical). To configure the
correlator to match “1101”, switches are used, with “ 1” represented by a closed switch, and “0” by an
open switch, (b) The result when the input in (a) is applied to the correlator. The output would be
sampled at time Ts to determine a “match”, (c) The output from the correlator. Note that only a
matching pattern (1101) results in an output above threshold at the sample time.
“1101.” Thus, the delay line requires four taps (one for each bit in the desired
sequence), weighted by the factors 1, 1, 0 and 1, respectively. The weights are
implemented by placing a switch in each path that is closed for weight = 1, and
opened for weight = 0. The incoming optical bit-stream is equally split among the
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four fiber-optic delay lines. Each successive delay line adds one additional bit of
delay to the incoming signal before the combiner, where the powers o f the four
signals are added together to yield the correlation output function. This function is
sampled at the optimum time, Ts, and passed through a threshold detector that is set
to detect a power level above 2, since the autocorrelation peak of “1101” with itself
equals 3 (or more specifically, three times the power in each “1” bit). The output is
detected using a photoreceiver and a simple electronic decision circuit is used to
compare the correlation output to the threshold value. As an alternative, this
threshold detection may be implemented optically, though optical threshold detection
is still a nascent research area requiring further development to become practical.
The high-speed advantage o f optics still prevails in this case since the correlation
function is produced in the time it takes the signal to traverse the optical correlator,
and the decision circuit only needs to be triggered at the packet-rate, which is often
in the range of kHz to MHz, depending on the number of bits in each data packet.
For example, for a stream o f short, 40-byte packets (320 bits/packet) at 40 Gb/s, the
packet rate is only 125 MHz.
The mathematical function describing the tapped-delay-line correlator is:
m-fjXtf-jTuMfT*) (!)
j =0
where n is the number o f bits in the correlation sequence, Tut is one bit period, x(t-
jTut) is the input signal delayed by j bit times, and hQTut) represents the j weights
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that multiply each o f the 7-bit delayed input signals. For a phase-modulated system,
the same operation is performed by replacing the switches with the appropriate
optical phase-shifters to match the desired bit pattern (e.g. “tctcO tc” instead of
“1101”). Fig. 2-5(b) illustrates the delay-and-add operation of the correlator for the
case when the three 4-bit words “1011” “1101” and “0101” are input to the
correlator, where the second word is an exact match to the desired sequence. Since
the correlation function for two 4-bit words is 7 bits long and the peak occurs during
the 4th time slot, the correlation output is sampled every four bits and compared to a
threshold as shown in Fig. 2-5(c). As expected, the correlation output for the second
word exceeds the threshold while the first and third samples produce no matches.
Note that for an input signal L bits long, the length of the correlation output will be
L+n-1 bits long.
Note that the correlator as shown in Fig. 2-5(a) will also produce a level “3” peak
that is above the threshold at time Ts for a “1111” input, which is not the desired bit
pattern. This is because the open switch in the third delay line, corresponding to the
third correlation bit, does not “care” if the third bit is a “1” or a “0” since it does not
pass any light. Thus, the correlator as shown is really configured to produce a match
for the sequence, “ l l x l ” where the “x” indicates a “don’t care” bit that can either be
“0” or “1.” This is not an issue in optical CDMA systems, where the set of
codewords can be specifically designed to maintain a constant number o f “ 1” bits in
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each codeword. However, for the header recognition application, which must be
able to uniquely recognize any of the 2” possible n-bit sequences, this situation will
result in “false-positive” matches whenever a “ 1” is present where a “0” bit is
desired.
To overcome this problem, a second correlator is added that is configured in
complement to the first one and produces a “match” signal when zero power is
present at the sample time. This is accomplished by placing a NOT gate at the
output of the threshold detector that is set just above level zero. If the power goes
above the threshold, this indicates that at least one “1” bit is present where a “0” is
desired, and the NOT gate will convert the high output to a low one to indicate “no
match” for this correlator. This correlator therefore correlates with the desired “0”
bits in the sequence and is thus called a “zeros” (or “Os”) correlator. Likewise, the
originally described correlator is called a “ones” (or “Is”) correlator. In the zeros
correlator, the switches are closed for desired “0” bits and open otherwise (or, as
explained in the next section, the FBG mirrors reflect for desired “0” bits and are
tuned away otherwise). Thus, the “1” bits are “don’t care” bits in a zeros correlator.
By combining the photodetected outputs of the ones and zeros correlators with an
electronic AND gate, a final “match” signal will only be produced when the input
pattern uniquely matches the desired correlation sequence. An illustration of how
26
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
■ Threshold « 2
“ l x x l ”
correlator
.Match
Match
Match
“xO O x" ’
correlator
Threshold » 0
(a)
i Threshold « 2
False match
No match
No match
Threshold « 0
“xOOx’*
correlator
“Ixxl”
correlator
(b)
Fig. 2-6. Diagram of how a dual-correlator architecture (“ones” and “zeros” correlators) can prevent
false positive results. The “zeros” correlator (the bottom box in each figure) has a closed switch
wherever there should be a zero, and checks for ZERO power at the sample time, (a) A matching bit
pattern is above the threshold at the sample time in the “ones” correlator, and has zero power at the
sample time in the “zeros” correlator, and thus there is a match, (b) A non-matching bit pattern may
generate a “false match” in the “ones” correlator, but is rejected by the “zeros” correlator.
the combination of ones and zeros correlators can avoid false positive matches is
depicted in Fig. 2-6. The desired correlation sequence is “1001,” meaning the ones
correlator is configured to match a “lx x l” pattern and the zeros correlator will
produce a match for an “xOOx” pattern. In Fig. 2-6(a), the incoming sequence is
“1001” and so the ones and zeros correlators both produce “match” signals, resulting
in a “match” signal at the output of the AND gate. In Fig. 2-6(b), the input sequence
is a “ 1101,” causing the ones correlator to still produce a “match” signal (this would
be a false positive match if only this correlator were present), while in the zeros
correlator, the undesired “1” bit in the second time-slot of the input causes the power
at the sample time to exceed the threshold, resulting in a “no match.” The
27
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
combination o f the “match” and “no match” signals in the AND gate produce the
correct “no match” result.
IV. SINGLE-CHANNEL THERMALLY-TUNED OPTICAL HEADER
RECOGNITION USING FIBER BRAGG GRATING CORRELATORS
While a number of previous techniques for optical correlation have been
demonstrated [2-4 - 2-8], correlators based on fiber Bragg gratings (FBGs) have
shown excellent promise for enabling fiber-based optical header recognition [2-9].
An FBG is fabricated by creating a periodic variation in the fiber’s index of
refraction for a few millimeters to a centimeter o f length along the fiber core [2-10].
Since optical fiber is photosensitive at ultraviolet frequencies, the grating can be
written by illuminating the fiber from the side with the interference pattern o f two
ultraviolet laser beams. A conventional FBG acts as a reflective, wavelength-
selective filter, i.e., it reflects light at a particular wavelength that is determined by
the spatial period of the index grating, and passes light at all other wavelengths. The
bandwidth o f the FBG filter largely depends on the magnitude o f the index variation
and is typically designed to be <100 GHz (0.8 nm) for communications applications.
A nice feature of FBG filters is that the reflection spectrum can be adjusted by a few
nanometers via heating or stretching of the grating. This allows one to alter the
wavelength that the FBG reflects. The reflectivity of the grating is nearly 100% at
28
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
the center o f the reflected spectrum and falls off outside the grating bandwidth. By
tuning the FBG so that the signal wavelength intersects with the rising or falling
edge o f the passband, the reflected energy at that wavelength will be reduced from
100% toward 0% as the grating’s passband is tuned farther away.
The optical tapped delay line structure shown in Fig. 2-5(a) requires a separate fiber
branch and an optical switch for each bit in the desired bit pattern, making it
impractical to construct a bank of 24-bit correlators, even if only a few o f the
branches are “active” (i.e. when one is looking at a “subset” o f the bits, as in the
router bypass). Moreover, the length o f each fiber branch must be cut to precisely
provide the requisite 1-bit delays between successive branches. This corresponds to
a differential length of 2 cm of fiber at 10 Gb/s and 5 mm at 40 Gb/s. A simpler,
more producible and manageable correlator may be constructed by writing a series of
fiber Bragg grating mirrors into a single length o f fiber, as shown in Fig. 2-7. In this
case, the reflectivities of the FBG mirrors provide the same weighting function as the
optical switches in Fig. 2-5. The gratings representing desired "1" bits are tuned to
reflect (closed switch case) while those representing "0" bits are tuned to be
transparent (open switch case). Since the light makes a double pass through the
array, the spacing between FBGs must correspond to 1/2 of a bit time to produce a
round-trip delay of 1 -bit-time. An optical circulator is placed at the input to route the
29
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
% Bit delay
Input “ 1” 1 “ 1 ” “x ” “ 1 ”
R = 23% 38% 0% 100%
“Don’t Care” bit
Detector
Threshold
1 I,...... I ... I ..... . 1 ... I . . . .
!3!
I ...... In
t
Ts
Match
Fig. 2-7. Fiber Bragg grating (FBG)-based optical correlator. The switches in Fig. 2-5 are
replaced with FBG mirrors of varying reflectivity, while a “0” bit is represented by a mirror that
is tuned away and transparent.
counter-propagating correlation output to the threshold detector. Aside from these
differences, the operation of the correlator is identical to that described for Fig. 2-5.
By taking advantage o f the fact that the reflection spectrum of the FBG can be tuned
by heating or stretching o f the fiber, a reconfigurable, compact, all-fiber correlator
can be constructed. The array in Fig. 2-7 is a 4-bit ones correlator using FBGs in
series, configured to match the pattern " llx l." As shown in the figure, this is
accomplished by tuning the reflectivities of the three FBGs representing “ 1” bits to
23%, 38% and 100%. These reflectivities may be computed using the following
recursive equation:
(2)
30
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
This equation is derived by requiring that the light reflecting off each FBG has equal
power when it exits the correlator. Thus, the reflectivity of the last grating in the
array should be set equal to 1, and then the reflectivities o f all the preceding gratings
can be calculated using this recursive equation. For the case shown in Fig. 2-7, with
R4 = 1 and R3 = 0 (don’t care bit), the results are R2 = (I-R2)2, resulting in R2 = 0.38.
Then, Ri = 0.38(1-Ri)2, yielding Ri = 0.23. The reflectivity o f the first FBG is fairly
low since the portion of light reflected from it must equal the optical power that
makes a double pass through all the other gratings in the series. This lossiness places
a limit on how many bits can realistically be in the correlation sequence and is the
reason that the software algorithm aims to locate addresses in the routing table that
can be forwarded by examining only K = 5 or fewer of the 24 significant address
bits. With five desired “ 1” bits in a correlation sequence, the reflectivity of the first
reflective FBG is 12.4%. Since the autocorrelation peak will contain five stacked
optical bits, the peak correlator output power will be (5)(0.124)Pin p u t, where Pin p u t is
the optical power in an input “1” bit. This power must be greater than the noise floor
at the correlator output in order for the threshold detection to work properly and
places a constraint on Pi„p u t.
In practice, the necessary reflectivities of the gratings are determined by repeatedly
sending a single pulse into the FBG array and observing the powers o f the multiple,
time-delayed output pulses on an oscilloscope. The gratings are tuned until the
31
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Control
Voltages
Deposited 1 cm
Micro-heaters (0.5 cm) center to center
Fig. 2-8. Diagram of the correlator used in this experiment - 8 metal heaters, deposited on a long
FBG, allow the creation of a dynamic thermally-tuned correlator. The FBG is manufactured to not
reflect a signal by default, and the heaters are set to tune the FBG to reflect the desired bit positions.
output pulses have equal power. When the reflectivities are properly tuned, the
response o f the array to a single input pulse is the bit pattern that the correlator is
configured to recognize.
The FBG correlator shown in Fig. 2-7 uses a discrete array o f FBGs, in which each
grating is written separately and great care must be taken to ensure that the spacing
between gratings precisely equals Vi of a bit time. This becomes increasingly
difficult at higher bit rates where the center-to-center spacings range from 1 cm at 10
Gb/s down to 1 mm at 100 Gb/s. To construct an electrically tunable correlator that
more readily scales to higher bit rates, a series of thin-film microheaters were
deposited onto the surface of a single, long uniform grating as shown in Fig. 2-8.
This way, the placement of the heaters defines the grating spacings. When a voltage
is applied to one of the heaters, the effective index of the portion o f the grating
directly beneath the heater varies in response to the rise in temperature. This causes
the filter spectrum o f that small section to shift toward longer wavelengths as shown
32
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-30.0
-35.0
-40.0
13.2 dB
(R = 95%)
m -*5-o
TJ
-50.0
26.5 dB
(R = 99.8%)
I
O
Q_
0.6nm Tuning
of one heater
-55.0
-60.0
10-cm FBG
Passband
-65.0
1560.00 1560.40 1560.80 1561.20 1561.60 1562.00
Wavelength (nm)
Fig. 2-9. Diagram of the reflection spectrum of the thermally-tuned FBG. The experiment is run
at 1561.4 nm, while the FBG reflects between 1560.3 and 1560.9 nm. When a single heater is
tuned, the reflection spectrum of that heater shifts to the signal wavelength.
in Fig. 2-9. This design simplifies the correlator construction since uniform FBGs
that are several centimeters in length are simple and inexpensive to fabricate. The
metal heaters can be deposited with simple e-beam evaporation, or, to achieve very
close spacings, by integrating the heater array onto a silicon substrate using
conventional lithographic techniques and then affixing the fiber to the heater array
[2-11]. The modulation depth of the grating’s effective index, Ane fr, should be large
•5
( - 10") to achieve a strong grating with high reflectivity to ensure that the shorter
sub-gratings will still have high peak reflectivities.
33
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
This design can accommodate the reconfigurable 24-bit correlator needed for the
optical-bypass. The long FBG is fabricated such that its reflection peak is out-of-
band o f the incoming wavelength, i.e., the FBG is transparent at the incoming signal
wavelength unless one o f the heaters is tuned. This is an efficient design because at
any given time the correlator will be configured to recognize only a small subset of
the 24 important address bits, meaning most of the bits will be “don’t care” bits, and
for these bits the heaters will simply remain “off.” Only the few heaters representing
“ 1” bits in the ones correlator and “0” bits in the zeros correlator need to be tuned.
To demonstrate the feasibility of this design, two 8-bit correlators were constructed,
one to operate as the ones correlator and the other for the zeros. The correlators were
fabricated using e-beam evaporation to deposit an array of 8 metallic heaters onto
two 10 cm long uniform fiber Bragg gratings at a center wavelength of ~1560.8 nm.
The heaters are 0.5 cm long with center-to-center spacings o f 1 cm, corresponding to
Vi o f a bit time in fiber at 10 Gbit/s. The heaters consist of a 15 nm titanium layer for
good adhesion to the glass and a 120 nm layer of gold for good electrical
conductivity. The transmission spectrum of the grating is shown in Fig. 2-9 with one
of the heater sub-gratings tuned by 0.6 nm from the center of the main FBG’s
passband. The reflectivity of the main passband is nearly 100% since it is 10 cm
long, and the peak reflectivity o f the shorter sub-grating is approximately 95%. Fig.
2-10 shows how the reflection o f the signal light varies from 0% to 95% as the
34
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
FBG Transmission Spectra
C O
i _
0
£
O
0.
"O
< D
- 4 — *
4—»
£
c /}
c
C O
Long! /
FBG \ /
X .
\ / ^
\ 1 Heat
X
3r #2
c
No Tuning
0% Reflectivity
^Signal
0.6 nm Tuning
Heater #2
85% Reflectivity
1.0 nm Tuning
Heater #2
95% Reflectivity
Wavelength
Fig. 2-10. Diagram showing tunable reflectivity for the thermally-tuned optical correlator. By
changing the control voltage, the reflectivity at the signal wavelength can be tuned (which is
required in order to ensure a proper autocorrelation output).
second heater is tuned. The input signal wavelength was set to 1561.8 nm, requiring
1 nm of tuning to obtain maximum reflection. This 1 nm shift required -25 mW
electrical power applied to the heater, yielding an FBG tuning efficiency o f -40
nm/W. Recent work estimates that a temperature rise of about 70° C is required to
produce the 1 nm of tuning using a typical FBG sensitivity of about 14 pm/°C [2-12].
Assuming room temperature operation, this means that a constant local temperature
of approximately 100° C is required for each of the tuned FBG sections. An
important practical consideration for the operation of the FBG based optical
correlator will be the long-term thermal stability of the FBG at its maximum
35
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
operating temperature. It is well known that the reflectivity o f FBGs can decrease
over time, especially at elevated temperatures. To ensure the long term stability of
the gratings in a practical design, it will be important to anneal the FBGs at a
temperature well beyond the expected maximum operating temperature [2-10]. One
interesting possibility with the evaporated microheaters would be to use the heaters
themselves to perform the grating annealing as part of the correlator manufacturing
process.
An example correlator configuration for examining 3 of 8 bits is shown in Fig. 2-
11(a). It is configured as a ones correlator to recognize the 10 Gbit/s pattern
“ lx x lx x lx ” by applying voltages to the 1st, 4th, and 7th heaters to tune these
portions o f the FBG to reflect at the input wavelength. Fig. 2-11(b) shows an
oscilloscope trace of the correlator response to a single input pulse, which is simply
the stored correlation sequence, “ 10010010.” This response is used to adjust the
heater voltages until the three “ 1” bits are equal height, indicating that the sub
grating reflectivites are properly tuned. Fig. 2-11(c) shows the measured trace of the
autocorrelation output, “010020030020010,” that results for any input of
“ lx x lx x lx ,” where the “x” bits can be either “Is” or “0s.” Since the input matches
the correlator configuration, the central peak exceeds the threshold at the sample
time.
36
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Tune Tune Tune
Input
Autocorrelation
Output
(a)
U)
time (100 ps/div)
Threshod
111 i ..........
(b)
Ts
time (100 ps/div)
(C)
Fig. 2-11. (a) Diagram of a sample setting of the thermally-tuned correlator, tuned to the sequence
“10010010”. (b) Output of the correlator after the reflecitivities of each of the tuned-in portions of
the grating were tuned such that each of the reflection peaks has approximately the same intensity, (c)
Autocorrelation output for an input bit sequence of “ 10010010”.
The experimental setup used to demonstrate the optical bypass at 10 Gbit/s is shown
in Fig. 2-12. The incoming NRZ data packets are 53-bytes long with 8-bit headers
and a 6.4 ns guard time between them to accommodate the switching time of an
LiNbC> 3 optical switch. The threshold o f the ones correlator decision circuit is set to
detect two stacked bits whereas the zeros correlator threshold is always set just above
zero. A packet-rate clock signal (~21 MHz) is used to trigger the decision circuits to
sample the correlator outputs at the proper time. In a full system implementation,
this timing signal would be generated by a previous module that detects the optical
37
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Port A
P ortC
Port D
Delay
Tap 1”s correlator
Port B
Switch
Control
Match ?
50%
AND
0”s correlator
EOM
2x2 Switch
Threshold Detector
Threshold Detector
Tunable Filter Control
Fig. 2-12. Experimental setup for the 8-bit header recognition system using “ones” and “zeros”
correlators. The correlator is tuned for a header pattern of “xxlxOlxO”. The match/no match signal
controls an optical switch to route the packets appropriately.
packet’s arrival time [2-13], The two correlation outputs are combined with an AND
gate that produces a high signal when there is a match and a low signal otherwise
(this signal remains latched until the next sampling result). The output match signal
is amplified and used to drive a two-port LiNbCb optical switch.
To demonstrate the successful operation o f the optical bypass function, the FBG
correlators were tuned to recognize an “xxlxOlxO” pattern (K = 4 o f 8 bits), and the
correlation output was used to route packets with matching headers to port C of the
two port optical switch. The experimental results showing the oscilloscope traces of
the packets and switch control signals are shown in Fig. 2-13. The input packet
stream contains four packets with different headers, the second o f which matches the
correlator configuration. The second row shows the matching signal at the output of
the AND gate, which is amplified and used to drive the optical switch. As expected,
the output goes high during the second packet. The last two lines show the
38
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Headers-
Correlator configuration:
Switch packets matching “ xxlxOlxO” to Port C
m
/
Input
Packets
■ n i i i
Switch
Control No MATCH
Port C
Output
MATCH
No MATCH
Port D
Output
► Time
42.4 ns:
6.4 ns Guard Time
Fig. 2-13. Output of the optical switch for 4 sample input packets. The packet that matches the
correlator configured sequence “xxlxOlxO” is routed to port “C” of the switch. All other packets are
routed to output port “D”.
successful routing o f the packet with a matching header to port C and all non
matching packets to port D.
The “lookup time” required to forward packets using these optical correlators is
simply the time it takes for the light to propagate through the correlators and for the
optical switch to flip, which is on the order o f a few nanoseconds. Thus, the lookup
time for packets that are forwarded by the optical bypass is reduced by an order of
magnitude, from microseconds (for electronic lookups) to nanoseconds, and is only
limited by the optical switching time. As for the reconfiguration time of the
thermally tuned FBG correlators, they will have a time constant of about 1 second,
which is typical o f thermally tuned all-fiber devices [2-14], This slow
39
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
reconfiguration time should not be a problem in practice because the correlators are
reconfigured only when the routing table is recomputed, which at worst occurs
several times per day.
V. MULTI-WAVELENGTH OPTICAL HEADER RECOGNITION USING
SAMPLED FIBER BRAGG GRATING CORRELATORS
The header-subset recognition technique discussed in the previous section acts on a
single optical channel, thus requiring N complete modules in order to recognize the
headers on N different wavelength-division-multiplexed (WDM) channels. A
correlation module that enables reconfigurable optical correlation o f multiple WDM
channels simultaneously can significantly reduce the number of components required
in a WDM routing node. Using a set of discrete sampled fiber Bragg gratings, a
multi-wavelength FBG correlator can be constructed. A sampled FBG is an FBG
that has a superstructure written on top of the grating for which the Fourier transform
produces a reflective time delay that is replicated at equal wavelength spacings [2-
15]. When this type of FBG is stretched or heated, the entire reflection spectrum
shifts, causing the reflectivity at each wavelength to experience the same variation.
Thus, the correlation sequence can be reconfigured for all incoming channels
simultaneously, resulting in a substantial savings in optical components.
40
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
W ///a « b\k ^
V
m .
Header
OXC
Demux
jF
>
Header
Processing
Module
WDM-IIR
Module (H J
ty
H
>
J-
->
OAK
Fig. 2-14. Conceptual diagram of a multi-wavelength header recognition system. A single module
correlates the headers of all channels, and they are then demultiplexed and sent to individual threshold
detectors.
A conceptual diagram illustrating how a WDM header recognition module is
employed in a routing node is shown in Fig. 2-14. The module may still be used as
an optical bypass for an Internet router, but in this case the packets on all incoming
wavelengths can simultaneously be compared to the entries in the optical lookup
table. A portion o f the incident light from the WDM channels is tapped off and sent
into the correlation module. The module uses a bank of tunable sampled-FBG arrays
for comparing the incoming packet addresses against a stored set o f patterns. The
correlator outputs are demultiplexed and separate decision circuits are used to sample
the output for each wavelength. The resulting match/no-match signals are used to
control an optical cross-connect to properly switch the packets on each wavelength.
While a sampled FBG correlator can be constructed in a manner similar to a standard
FBG correlator, the spacing requirements can be problematic. As noted previously,
the center-to-center spacing between gratings must equal 1 cm for operation at 10
41
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
A * , ^
(1555.6 nm) (1557 2 n irt 93o / o
—' reflectivity
W
37%
reflectivity
Stretching
Further stretching
2%J__
reflectivity
W avelen gth , X
Fig. 2-15. Reflection spectrum of the sampled fiber Bragg gratings used in the multi-wavelength
correlator. As the grating is tuned via stretching, the reflectivity changes. In this manner the
correlation sequence (header to be recognized) can be changed.
Gbit/s. Due to their complexity, it can be difficult to manufacture sampled FBGs
shorter than 1 cm that have the high reflectivity required to produce good correlation
results. This problem can be resolved by inserting a passive splitter after the
circulator and interleaving the gratings between multiple fiber branches. This
decreases the spacing requirement by a factor equal to the number of branches.
While these limitations on sampled FBG systems reduce the scalability o f the
architecture, a recent report details a new sampled FBG structure that can reduce the
length o f sampled FBGs while maintaining high reflectivity, enabling the application
of this correlation technique to higher bit-rate systems [2-16].
To demonstrate multi-wavelength correlation, an interleaved sampled FBG correlator
was constructed using two 7-channel sampled gratings with 100 GHz channel
spacing and a maximum reflectivity o f 93%. As shown in Fig. 2-15, the sampled
grating reflection spectrum has multiple passbands, one for each wavelength
42
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Threshold Threshold
Time
Time
Fig. 2-16. Simple example of multi-wavelength correlation. Data patterns on two wavelengths are
correlated by the same set of sampled gratings, tuned for the pattern “ lx l”. After demultiplexing,
only the wavelength with the correct pattern shows a matching autocorrelation peak with an output
greater than the threshold at the sample time.
channel, that all shift together when the grating is stretched. Multi-wavelength
correlator operation is illustrated in Fig. 2-16, where the correlator is configured to
match a “lx l” pattern. The 1st and 3rd sampled FBGs are tuned to reflect and the
2nd is tuned to zero reflectivity. At the correlator output, the signal is demultiplexed
and the output correlation sequences for each wavelength are displayed on an
oscilloscope. The 3-bit pattern on X\ is a match to the correlator and produces the
expected “10201” autocorrelation response, whereas the “100” pattern on X % is not a
match and produces a cross-correlation sequence that falls below the threshold at the
sample time.
The experimental setup used to demonstrate multi-wavelength correlation at 10
Gbit/s is shown in Fig. 2-17. Four 53-byte pseudorandom NRZ packets with
43
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
LINbOJ
switches
>1
A ., transmitter
A g transmitter
10% tap
1” bits correlator 0” bits correlator
sampled FBGs
photodiodes PD PD ■ ! PD PD
J Decision
i circuits
OXC Control
Signals
Fig. 2-17. Experimental setup for multi-wavelength header recognition using sampled fiber Bragg
grating-based correlators. The correlators are tuned to match the pattern “ 1001”.
varying 4-bit headers were modulated onto two wavelength channels (1555.6 and
1557.2 nm). Packet synchronization was assumed and a packet-rate clock signal was
supplied to the decision circuits to sample the correlation peaks at the appropriate
time. The correlators were first configured to match a header pattern of “ 1010.” In
the ones correlator, the 1st and 3rd gratings are tuned via stretching to partially
reflect, and the 2nd and 4th gratings are tuned for no reflection. The gratings are
configured in complement in the zeros correlator. Packets incoming on the two
WDM channels are correlated by the gratings and sent to individual packet-rate
decision circuits. The resulting match/no-match signals for each channel are used to
44
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Correlator configured to match “1010”
1110 1010 1000 1011
* ■ ' p a c k e t s J M m U l U M L l i l 'i i l U i l t i U W L
a , , mo . . . 1 0 0 ,0 . „ , . 1 0 1 0 1 0 0 1
a.2 packets
k\ switch control
Xi switch control
X\ port 1 output
A ,2 port 1 output
X\ port 2 output
X ,2 port 2 output
Reconfigure correlator to match “1000”
A .| port 1 output ________
A - 2 port 1 output _____
/
MATCH
/
MATCH
JMMM
M M lM UIL
J N IiilL
Fig. 18. Results for multi-wavelength header recognition,
control two LiNb03 optical switches, where header-matched packets are switched to
port 1 and non-matching packets are switched to port 2.
The experimental results for packet header recognition and switching are shown in
Fig. 2-18. The packets containing “1010” headers produce match signals that flip the
switch and route these packets to port 1. The correlators are then reconfigured to
recognize a “ 1000” pattern, causing the packets with these headers to now be routed
to port 1. The total optical loss for the data through-path (90% tap + AWG demux +
optical switch) was 7.7 dB and the throughput data suffered zero power penalty
when compared to the back-to-back receiver sensitivity at 10-9 bit error rate as
shown in Fig. 2-19.
45
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3
□ Back-to-back
• Switch bar output
▲ Switch cross output
4
5
6
7
8
9
-13.5 -13 -15 -14.5 -14
Received optical power (dBm)
Fig. 2-19. Power penalty measurements for the optical switch used in both header recognition
experiments. The penalty to receiver sensitivity through the switch for either output port is negligible.
A significant issue that arises for this interleaved correlator structure is the power
fluctuations in the correlation output pulses due to coherent interference. The
coherence time of standard telecommunication lasers is typically tens of
nanoseconds, corresponding to a coherence length in fiber o f about two meters.
When the differential time delay between two branches o f the correlator is less than
the coherence time of the laser (which is the case here), the recombined signals will
coherently interfere with each other causing large power fluctuations in the
correlation output function. This effect severely limits the stability o f the correlation
output and must be mitigated or prevented in order to effectively operate the
correlator. There are a number o f ways to resolve this problem. A polarization
controller followed by a polarization-beam-splitter (PBS) can be used at the input of
each 1x2 optical splitter to ensure that the polarizations between the two branches are
46
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orthogonal. This will prevent coherent interference of the recombined signals
because orthogonally polarized light beams will not interfere. For more than two
branches, a tree structure of 1x2 splitters with polarization controllers and
polarization beam splitters can be used. Another, more manageable, solution is to
somehow convert the coherent light into an incoherent signal before it enters the
correlator. One method o f doing this uses cross-gain modulation in a semiconductor
optical amplifier (SOA) to transfer the coherent data pattern onto incoherent light,
which for this case is the amplified spontaneous emission light generated by the SOA
[2-17],
VI. DISCUSSION
The use of thermally controlled FBGs as tunable-reflectivity mirrors to construct an
optical correlator raises several important issues that must be considered, especially
when scaling the design to operate at higher bit rates. Significant issues associated
with device fabrication include polarization dependence, time-delay variation with
reflectivity, grating bandwidth, dispersion, and thermal crosstalk between micro
heaters. These issues are simple to control at 10 Gbit/s, scaling to 40 Gbit/s appears
quite feasible, and with careful design, it should be possible to enable operation up to
100 Gbit/s and perhaps beyond.
47
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When writing the FBG that the heaters will be deposited onto, care must be taken to
avoid any polarization dependence of the reflection spectrum, otherwise the
reflectivity as well as the time-delay for the grating will be different for the two
orthogonal polarization modes of the optical signal. This can be avoided by
carefully writing the grating so there are no asymmetries in the index-modulation
profile. The 10 cm long FBG that was fabricated for the experimental demonstration
exhibited some polarization dependence, which made it difficult to adjust the sub
grating reflectivities to produce the desired correlator configuration. A polarization
controller was placed at the correlator input to optimize the levels o f the output
pulses while the correlator was being configured to recognize a desired bit sequence.
However, because each sub-grating is tuned to a different reflectivity, they each
exhibit different polarization dependencies. For a particular tuning condition, the
level and time-delay o f a pulse reflected off one sub-grating will vary with
polarization in a different way than the pulses from other sub-gratings. It is therefore
challenging to locate a polarization that is simultaneously optimum for all the sub
gratings. Although this problem was not severe enough to prevent successful
operation o f the correlator, it did cause some distortion of the correlation outputs and
should ideally be avoided when the grating is fabricated.
Using the edge o f the FBG filter spectrum to adjust the reflectivity of the input signal
causes dispersion and unwanted variations in the time delay as the grating is tuned.
48
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The round-trip delay o f a signal reflected from an FBG varies for different points
along the filter edge. This is a problem for the optical correlators demonstrated here,
for which the time delay between neighboring gratings should ideally equal Vi o f a
bit time to ensure the output bits are exactly aligned to stack up and produce well-
defined correlation peaks. In this experiment, it was observed that the time delay of
a pulse reflecting off a single sub-grating varied by as much as 35 ps, a significant
fraction of the 100 ps bit time. Clearly, the time delay cannot vary more than the
finite length o f the grating (in the worst case, the light has shifted from effectively
reflecting off the front o f the grating to the back). The lengths of the sub-gratings are
defined by the temperature profile induced by the heaters. Given that the length of
the heaters in this experiment is 0.5 cm and the expectation that the heat diffuses
approximately 1 mm beyond the heater edges (see thermal crosstalk discussion
below), the sub-grating lengths are ~7 mm each. This corresponds to ~34 ps in fiber,
matching the measured results. At higher bit rates, the length of the heaters becomes
much shorter, reducing the maximum possible delay variation, but this is in
proportion to the shorter pulse-widths and the variation will still be on the order of
25% to 35% of a bit time. This time-delay variation causes a spreading o f the output
autocorrelation peak and reduces the contrast between the central peak and the
sidelobes, which adversely affects the threshold detection performance. Moreover,
the time-delay response at the edge o f an FBG passband is strongly sloped, causing
the signal to experience dispersion. This may not be a significant issue for a 10
49
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Gbit/s experiment, but it could become a problem at 40 Gbit/s and beyond. Note that
no dispersion is induced on the throughput data channel, just on the tapped-off signal
traversing the correlators. This causes the peaks in the correlation output to spread in
time. Some amount o f dispersion-induced spreading may actually be helpful for
relaxing the required rise-time of the decision circuit’s sampling signal. Though the
decision circuit only needs to sample at the packet rate (MHz), at 40 Gbit/s it must be
able to recognize a correlation peak that is only 25 ps wide. Thus, it may be
desirable to have some dispersion to relax this requirement, however, this must be
carefully traded against the corresponding impairment to the contrast between the
central peak and its sidelobes.
Another issue to consider is that the gratings must be strong enough to provide high
reflectivity for the short sub-gratings as well as sufficient filter bandwidth for the
incoming signal. The strength of a grating refers to the modulation depth, An, o f the
variation in the fiber’s effective index of refraction, ne ff. Strong gratings with An on
the order of 10'3 are producible and should meet the reflectivity requirements. For
strong gratings, the FBG bandwidth is directly proportional to An and is independent
of the grating length [2-18]. This must be considered at high bit rates to ensure that
the filter bandwidth exceeds the bandwidth of the optical signal. For instance, 100
Gbit/s pulses have an optical bandwidth of approximately 200 GHz. An FBG with
ne ff = 1.45, a center wavelength of 1561 nm, and An = 2xl0'3 will yield a filter
50
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bandwidth o f approximately 270 GHz, which is producible and wide enough to
accommodate the high-bandwidth signal. However, stronger gratings have sharper
filter edges, resulting in higher dispersion. Therefore, a careful design will have to
trade these two parameters against each other to optimize the correlator performance
at a desired bit rate.
To scale the correlator to higher bit rates requires a much higher spatial frequency of
thin film micro-heaters. However, thermal diffusion between heaters will limit how
closely they can be placed before the thermal profile in the fiber between
neighboring heaters begins to overlap making it impossible to create a series of
distinct sub-gratings. Using etched cladding fibers, however, and with the possible
addition o f heatsinks in the spaces between heaters [2-19], a 40 Gbit/s correlator,
which requires 1.25-mm spacing, should be readily producible and a 100 Gbit/s
correlator, which requires 500-micron spacing, appears to be quite feasible.
An additional issue to consider when using optical correlators for header recognition
is that the correlation outputs do not have reduced sidelobes like they would in coded
communication schemes, such as optical CDMA. In OCDMA systems, the
autocorrelation outputs look like a single tall peak with negligible sidelobes. This is
because the codewords transmitted in OCDMA networks are designed to be
orthogonal. This is necessary because the receivers in OCDMA networks are
51
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simultaneously receiving data packets from all of the users in the network, so
orthogonal codes must be employed to ensure that the cross-correlation outputs from
other users do not add up and exceed the threshold at the sample time. For header
recognition, only on bit pattern is received at a time and there is no option for
demanding that Internet addresses use orthogonal codes. Thus, correlation output
functions in header-recognition systems will contain sidelobes. An important
consideration for these systems is the signal-to-noise ratio so that a sidelobe from a
non-matching packet does not inadvertently exceed the threshold at the sample time.
A valuable next step for this research topic would be to perform a full analysis o f the
correlation error rates (how often the correlator produces either false positive or
negative matches) that result for different threshold levels and for different random
input addresses.
VII. SUMMARY
Fiber-based optical correlation techniques have been investigated for several years
for their potential to recognize incoming bit streams at the speed o f light, with
essentially no latency. Present optical technologies are limited to testing an incoming
bit stream against a handful of different possible correlation sequences with only a
few bits each. This limits their potential uses for header recognition since real
network data packets have addresses with dozens of bits that must be compared
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against thousands o f entries in a routing lookup table. However, this research
indicates that it may be feasible to design an algorithm to generate a subset o f the
routing table containing entries for packets that can be forwarded by examining only
a few bits in an IP destination address. This opens the door to using the best that both
optics and electronics has to offer and enables the construction o f an optically-
assisted Internet router.
To implement the optical bypass, a novel FBG-based correlator design was presented
in which an array o f thin-film micro-heaters is deposited on a long, uniform FBG to
create a series o f equally spaced sub-gratings that are tuned by varying the voltages
across the heaters. The advantages of this design are that the fiber correlators are
compact, electrically-tunable, simple to produce and readily scalable to higher bit
rates. An 8-bit correlator module was constructed and used to experimentally
demonstrate the successful correlation and switching of packets at 10 Gb/s. With this
technique, the packets that successfully find a match in the bank o f optical
correlators can be forwarded at nanosecond speeds, a reduction in orders of
magnitude from electronic lookup times.
To reduce the number o f optical correlators that would be required to employ this
optical-bypass in a WDM routing node, an optical correlator using sampled-FBGs
53
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was also constructed to enable the packet-headers on different input wavelengths to
simultaneously be compared with a correlation pattern.
While optical correlators currently see limited commercial application, the frontier of
all-optical networking is rapidly approaching, aided by the ever-increasing demand
to transmit more bandwidth over the network core. This, in addition to the growing
interest in optical CDMA networks, will push designers to develop producible
optical correlators that can be dynamically adjusted to recognize very high bit-rate
sequences. For applications such as header or label recognition, technologies such as
those described here that can implement huge arrays or banks of correlators to
efficiently test the incoming signal against all possible bit sequences will be needed.
Reaching these goals presents a significant engineering challenge, but research is
continuing to make progress, and optical correlators, combined with appropriate data
coding techniques, offer great potential for bringing the ever-expanding field of
optical signal processing to light.
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REFERENCES
[2-1] Mehrotra, P. and Franzon, P. D., “Novel hardware architecture for fast address
lookups,” IEEE Communications Magazine, vol. 40, no. 11, pp. 66-71, 2002.
[2-2] Bannister, J., Touch, J., Kamath, P., and Patel, A. “An optical booster for
internet routers,” Proceedings o f the Eighth International Conference on High-
Performance Computing, Hyderabad, India, pp. 339-413, 2001.
[2-3] F. G. Stremler, Introduction to Communications Systems, 3rd Edition, Addison-
Wesley, Massachusetts, 1990.
[2-4] Shin, J. D., Jeon, M.-Y., and Kang, C.-S. “Fiber-optic matched filters with
metal films deposited on fiber delay-line ends for optical packet address detection,”
IEEE Photonics Technology Letters, vol. 8, no. 7, pp. 941-943, 1996.
[2-5] Petruzzi, P., Richardson, C. J. K., Van Leeuwen, M., Moulton, N., and
Goldhar, J., “All optical pattern recognition using a segmented semiconductor optical
amplifier,” European Conference on Optical Communication (ECOC) 2001, pp.
304-305, 2001.
[2-6] Widjaja, J., Wada, N., Ishii, Y., and Chijo, W., “Photonic packet address
processor using holographic correlator,” Electronics Letters, vol. 37, no. 11, pp. 703-
704, 2001.
[2-7] Wey, J. S., Goldhar, J., Butler, D. L., and Burdge, G. L., “Investigation of
dynamic gratings in erbium-doped fiber for optical bit pattern recognition,”
Conference on Lasers and Electro-optics (CLEO) 1997, pp. 443-444, 1997.
[2-8] Kishi, N., Kawachi, K. and Yamashita, E., “Auto-correlation method for weak
optical short pulses using a nonlinear amplifying loop mirror,” European Conference
on Optical Communication (ECOC) 1997, pp. 215-218, 1997.
[2-9] Hunter, D. B., and Minasian, R. A., “Programmable high-speed optical code
recognition using fiber Bragg grating arrays,” Electronics Letters, vol. 35, no. 5, pp.
412-414, 1999.
[2-10] Kashyap, R., Fiber Bragg Gratings, Academic Press, San Diego, 1999.
55
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[2-11] Lin, C. H., Li, Q., Au, A. A., Jiang, Y., Lyons, E. R., and Lee, H. P., “A loss
tunable long-period fiber grating on corrugated silicon with on-chip microheater and
temperature sensor,” Conference on Optical Fiber Communication (OFC) 2002, pp.
193-194, 2002.
[2-12] Othonos, A. and Kalli, K., Fiber Bragg Gratings: Fundamentals and
Applications in Telecommunications and Sensing, Artech House, pp. 99, 1999.
[2-13] Cardakli, M. C. and Willner, A. E., “Synchronization of a network element
for optical packet switching using optical correlators and wavelength shifting,” IEEE
Photonics Technology Letters, vol. 14, no. 9, pp. 1375-1377, 2002.
[2-14] Li, L., Geng, J., Zhao, L., Chen, G., Chen, G., Fang, Z., and Lam, C. F.,
“Response characteristics of thin-film-heated tunable fiber Bragg gratings,” IEEE
Photonics Technology Letters, vol. 15, no. 4, pp. 545-547, 2003.
[2-15] Ibsen, M., Durkin, M. K., Cole, M. J., and Laming, R. I., “Sinc-sampled fiber
Bragg gratings for identical multiple-wavelength operation,” IEEE Photonics
Technology Letters, vol. 10, no. 6, 842-844, 1998.
[2-16] Yusuki, N. and Shinji, Y., “Realization of various superstructure fiber Bragg
gratings for DWDM systems using multiple-phase-shift technique,” Conference on
Optical Fiber Communication (OFC) 2002, paper TuQ3, 2002.
[2-17] Parolari, P., Marazzi, L., Rossetti, D., Maier, G., and Martinelli, M.,
“Coherent-to-incoherent light conversion for optical correlators,” IEEE/OSA Journal
of Lightwave Technology, vol. 18, no. 9, pp. 1284-1288, 2000.
[2-18] Erdogan, T., “Fiber grating spectra,” IEEE/OSA Journal o f Lightwave
Technology, vol. 15, no. 8, pp. 1277-1294, 1997.
[2-19] Roger, J. A., Kuo, P., Ahuja, A., Eggleton, B. J., and Jackman, R. J.,
“Characteristics of heat flow in optical fiber devices that use integrated thin-film
heaters,” Applied Optics, vol. 39, no. 9, pp. 5109-5116, 2000.
56
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Chapter III - Optical 3-Input AND Gate
I. INTRODUCTION
Future high-performance optical networks and processing systems may require a
shift from conventional electronic signal processing to high-speed all-optical routing,
signal processing, and logic [3-1]. An optical approach to systems and networks
may be preferable in cases where (i) the desired function occurs within the optical
data plane in which optical-electronic-optical conversions are undesirable or (ii) only
a few logic functions in the control plane must be performed, such that fast optics
may trump parallel electronics. Some example applications include optical packet
checksum computation, optical header recognition, optical TTL decrementing, and
optical contention detection within a network node.
Recent research into optical logic and signal processing has focused on 2-input
implementations of electronic logic primitives, e.g. AND/XOR/NOR. However,
optical signals that traverse these gates often suffer significant signal degradation,
limiting the cascadability o f these devices within a multi-node optical network. In
addition, a number of common electronic primitives currently being investigated for
optical implementation, such as the adder [3-2], require either the cascading o f many
57
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2-input gates or, preferably, a single 3-input optical gate, for which there are little to
no published results.
In particular, a 3-input AND gate may see significant application within an optical
network or signal processing system. Some potential applications include (i) AND-
based optical header recognition with a timed “enable” input to prevent false
positives [3-3], (ii) network contention detection, where the existence o f multiple
simultaneous packets could trigger an output pulse, (iii) conversion of an optical
half-adder to a full-adder to enable optical checksum computation, and (iv) rapid bit-
time-scale enabling of any 2-input AND function via the third input port. Optical
contention detection may be a key function - AND gates can be used to determine
whether there are “too many” packets traversing a switching node at a given moment
- this knowledge may be critical not only for determining whether packets need to be
buffered, but also to determine whether or not routing decisions must be made based
on traffic loads. While there have been a number of demonstrations of 2-input AND
functionality [3-4, 3-5], little to no 3-input optical AND functionality has been
reported.
In this chapter, a module is demonstrated that performs the logical AND function on
three independent 5 Gbit/s RZ data streams without requiring the cascading of
optical gates. Signals suffer negligible power penalty to receiver sensitivity at 10'9
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bit-error-rate and thus this module is ideal for cascading within an optical network.
Sum- and difference-ffequency generation-based wavelength conversion within a
single periodically-poled lithium niobate (PPLN) waveguide are used to enable a
two-step conversion process that mixes two pump signals rather than the single
pump commonly used within PPLN waveguide devices. An intermediate pump
signal is generated via sum-frequency generation (SFG) between the two pumps
within the waveguide, and this intermediate pump is then mixed with a third optical
probe signal to generate a X-shifted output. As wavelength shifting within the PPLN
waveguide operates on a bit-time-scale, modulating data signals onto the two pumps
and the probe results in a logic ‘ 1 ’ output only when all input data streams are logic
‘1’, representing the logical AND of the three input signals. Additional advantages
of the PPLN waveguide include its wide bandwidth, minimal noise generation, and
lack of intrinsic chirp.
II. CONCEPT OF OPTICAL AND GATE
Fig. 3-1 shows a simple digital gate-level conceptual diagram and logical truth table
for a three-input (‘A ’, ‘B ’, and ‘C’) digital AND gate. The ‘x’ inputs are ‘don’t care’
values, for which the output remains constant regardless of the value o f that input.
As shown in the first three lines, the output of the gate is logic ‘0’ if any o f the three
input signals takes the value of logic ‘O ’. Only when all three input signals carry the
59
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Input data
Gate
output
A B C
0 X X 0
X 0 X 0
X X 0 0
1 1 1 1
AND
Fig. 3-1. Digital gate-level diagram and truth table for a 3-input AND gate. The ‘x’ values represent
‘don’t care’ bits, where the output is unchanged regardless of the signal logic level.
value logic ‘1’ will the gate output take the value of logic ‘1’, representing the AND
(‘A*B»C’) function. An electronic implementation of this gate either requires a
cascade o f 2-input AND gates, or a single, slower, 3-input gate.
This optical implementation replaces a 3-input electronic gate with a single PPLN
waveguide. PPLN waveguides are commonly used for wavelength shifting and
optical logic, and generally have a “hard-wired” intermediate pump wavelength (or
set o f intermediate pump wavelengths), which can then mix with an unlimited
number o f signal wavelengths via a two-step wavelength conversion process,
resulting in an input signal mapped to a mirror-image wavelength with respect to a
pump [3-6]. This “standard” two-stage PPLN conversion process is shown in Fig. 3-
2(a). First, a pump signal at wavelength Xp (~1550 nm for this PPLN waveguide)
generates the “hard-wired” intermediate pump wavelength via second harmonic
generation (SHG) at a wavelength Xp/2 (~775 nm). The non-variable intermediate
pump wavelength is a result of the poling of the waveguide, which “locks” the
60
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2. DFG (generates XnI T T )
V 2
O UT
1. SHG
(a)
2. DFG (generates Xo, , T )
_ " > ' L . •. ^ '
Xp/2 Xpj ^T2
■s-
X g ;
''OUT
♦ X
1. SFG
(b)
Fig. 3-2. Conceptual diagram of the PPLN waveguide conversion process, (a) In the “standard” 2-
input configuration, a pump X P generates a “hard-wired” intermediate pump via second harmonic
generation, which mixes with the probe (/„s) via difference-frequency generation (DFG) to produce
the output at 3 » o u t. (b) In the three-input configuration, two pumps ( X P\ and A ,P 2 ) mix via sum-
ffequency generation (SFG) to produce the same intermediate pump as in (a), which mixes with the
probe.
frequency o f this intermediate pump. This intermediate pump then mixes with the
probe signal, at wavelength Xs, to generate an output signal at A,out (~2*A ,p - ^s) via
difference-frequency generation (DFG). A key advantage o f this device is that the X-
shifting process can be controlled on the order of a bit duration - by modulating the
PPLN waveguide pump signal, a ‘1’ bit on the probe wavelength is X-shifted only
when the pump signal is also ‘1’ (similar to a two-input logical AND). However,
61
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due to the nature of the device, it is generally not possible to shift the location of the
intermediate pump, and multi-pump PPLN devices treat each pump independently
(the two pumps themselves do not readily mix with each other as their mixing
product is not a “hard-wired” intermediate wavelength).
A diagram o f the 3-input conversion process is shown in Fig. 3-2(b). Two pump
signals (A ,pi and Lp2 ), equidistant from the pump are used as described above. These
two pump signals mix with each other via sum-frequency generation (SFG) to
generate an intermediate pump at -775 nm, which is identical to the intermediate
pump wavelength described above. This intermediate pump can then mix (via DFG)
with the probe signal to generate the A -oux signal. Taking advantage o f the bit-time-
scale ^.-shifting afforded by the waveguide, by modulating both LPi and AP 2
independently, the intermediate pump will exist only when both pumps take the
value logic ‘ 1’ - thus an output 41’ bit will be present only when the intermediate
pump exists and the probe signal takes the value logic 4 1’ - representing the logical
3-input AND of the data streams on the two pumps and the probe.
III. EXPERIMENTAL SETUP
The experimental setup for the 3-input AND gate is shown in Fig. 3-3. The three
input data streams 4 A ’, 4 B ’, and 4 C’ are generated via externally modulating three
62
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Input A - 5 Gbit/s RZ
9 -
X pj 1545.0 nm — ► ; MOD
Input B - 5 Gbit/s RZ
Xs 1547.5 nm — MOD : ----- [
Input C - 5 Gbit/s RZ
_L
X p2 1555.0 nm — ► MOD
C^)
PPLN J ^ L ° UtpUt
^ h a . b . c
Fig. 3-3. Experimental setup for the 3-input AND gate. The three signals are coupled together prior
to entry into the PPLN waveguide; all mixing occurs within the PPLN device.
lasers at 1545.0 nm (Xpi), 1547.5 nm (Xs), and 1555.0 nm (XP 2 ) with 5 Gbit/s RZ 29-l
pseudorandom data sequences. The 1545.0 nm and 1555.0 nm signals, which are
equidistant from the main PPLN waveguide pump of 1550.0 nm, generate the “hard
wired” intermediate pump via SFG, while the 1547.5 nm signal mixes with the
intermediate pump to generate the output signal at 1552.5 nm ( X q u t ) via DFG.
The three input signals are amplified and coupled together prior to entering the
PPLN waveguide. Within the PPLN, simultaneous SFG and DFG result in an output
signal generated at Xout only when all three input signals carry a value o f logic ‘1’.
The optical spectra at the output of the PPLN waveguide are shown in Fig. 3-4. Fig.
3-4(a) shows the generated output signal when all three inputs are present. When all
three inputs have power levels of ~8 dBm, the output signal power is —20 dBm.
This results in an apparent conversion efficiency o f -28 dBm, however this is illusory
as an output bit exists only 1/8 as frequently as any given input bit (due to the
63
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a. Input A Input B Input C
(8 dBm) (8 dBm) (8 dBm)
u
* o
C s
& H g
« a -20
v > 5 ,
& _4Q J K l i i uV lJftk U
A«B*C output
(-20 dBm)
M ill H.Jj __________________________ jlililLlliilikti)
O 1545.0 1547.5 1552.5 1555.0
W avelength (nm)
b.
s.
< u
* o
o o
Ph S
T s § -20
a
o
_ 4 0 A u l»
Input A
(8 dBm)
IUIiJ IU uI.
Input B
(8 dBm)
Llilll in I ijU lumliitiiUiMllIkuJ
1545.0 1547.5
Wavelength (nm)
t 0
| ^
P h S -20
I I
£ - 4 0
o
Input A
(8 dBm)
Input C
(8 dBm)
1545.0 1555.0
W avelength (nm)
S 0
O
a -20
a
2
£ -40
Input B i
(8 dBm)
Input C
(8 dBm)
t h h j l .aauilMttij .k
1547.5 1555.0
W avelength (nm)
Fig. 3-4. Optical spectra for the 3-input AND gate, (a) The output signal is present only when inputs
A, B, and C are all present, (b-d) Any missing input nullifies the conversion process.
probability o f 3 pseudorandom logic ‘ 1 ’ input bits overlapping) - thus, the actual
conversion efficiency is ~9 dB higher, or ~-19 dBm. Figs. 3-4(b-d) show the output
optical spectrum when input C, input B, and input A are shut off, respectively. In
each case, there is no signal generated at A,o u t - The 1552.5 nm output signal is
isolated via filtering and amplified, and as it carries a ‘1’ bit only when ‘A ’, ‘B ’, and
‘C’ all carry overlapping ‘1 ’ bits, it represents the logical AND o f the 3 inputs.
IV. RESULTS AND DISCUSSION
Figs. 3-5(a-c) show sample 20-bit sequences from inputs ‘A ’, ‘B ’, and ‘C’,
respectively. The SFG/DFG generated output signal is shown in Fig. 3-5(d), and
carries a ‘ 1 ’ bit only when all three input signals have an overlapping ‘ 1 ’ bit. This
64
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o 1 1 0 1 0 0 0 1 1 1 0 0 X 010110
a. Input ‘A ’
JV\AJAUIA/^
1 1 0 0 0 1 0 1 1 0 1 1 0 1 0 1 0 0 0 1
b. Input ‘B’
X j WUUUI
0 1 0 0 1 1 o o 1 o 1 o o o o i i o o i
c. Input ‘C’
|uuuj W m Al y WfcJ M W W lL M L M b Jf V W lww Ifa
TPffr |* n m y y T , w p M w r |i p ||f ^ ^
Ol 000000101000010
JL A J l 1
O l O O O O O O I O I O O O O I O O O O
d. Output
‘A»B*C’
Fig. 3-5. Input and output waveforms for the 3-input AND module, (a-c) 5 Gbit/s RZ inputs A
(1545.0 nm), B (1547.5 nm), and C (1555.0 nm). (d) 1552.5 nm output signal exists only when A, B,
and C take the value logic ‘ 1
signal is the A*B*C logical AND of the three input data streams. There is minimal
crosstalk in some locations, arising from high-power input signals mixing with
EDFA noise power.
The bit-error-rate curves and representative eye diagrams for the 3-input AND gate
are shown in Fig. 3-6. This 3-input AND gate shows negligible power penalty to
receiver sensitivity at 10'9 bit-error-rate. It is clear from the eye diagrams that this
module also has some minor signal regenerative qualities, as the output eye is
significantly cleaner than the input eye. While the low level of crosstalk generated
by the module may result in some bit errors, this “cleaning up” o f the input eye likely
neutralizes the penalty associated with those errors.
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A Back-to-back
□ AND output
AND output eye
Back-to-back eye
Optical Power (dBm)
Fig. 3-6. Bit-error-rate curves and eye diagrams for the 3-input AND gate. There is negligible power
penalty to receiver sensitivity at 10-9 bit-error-rate.
It is noted that many previously-demonstrated optical logic gates suffer from
significant power penalties to receiver sensitivity, limiting the cascadability o f such
gates within an optical network (even with only a single gate per node). Due to the
negligible power penalty (and potential regenerative qualities) o f this 3-input AND
gate, this is one of the few demonstrated optical gates with the potential for
application within multi-node optical networks. In addition, due to the availability of
3 (rather than the conventional 2) inputs, fewer such gates may be needed within the
network. While the experimental demonstration used RZ data signals, optical logic
in PPLN waveguides has been demonstrated for both the RZ and NRZ data formats,
and this setup would likely function for NRZ data (and at higher bit rates) without
significant modification.
66
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V. SUMMARY
While there have been numerous demonstrations of primitive 2-input optical logic
gates, there have been scant demonstrations of 3-input gates in the optical domain -
gates that may be critical for future optical networks. In particular, a 3-input AND
gate may see application to numerous functions within the optical control and data
planes, including packet contention detection within the control plane, and expansion
of optical adders for checksum computation within the data plane.
In this chapter, a 3-input AND gate constructed using a PPLN waveguide is
proposed and demonstrated. This gate, instead o f using second-harmonic generation
within a single optical pump to generate an intermediate pump used for wavelength
conversion, uses two pumps that mix using sum-frequency generation to generate the
same intermediate pump signal. This AND gate module performs the logical AND
function on three independent 5 Gbit/s RZ data streams without requiring the
cascading o f optical gates. Signals suffer negligible power penalty to receiver
sensitivity at 10‘9 bit-error-rate and thus this module is ideal for cascading within an
optical network.
67
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REFERENCES
[3-1] N. Elfaramawy and A. Awad, “All-optical logic circuits based on the nonlinear
properties of the semiconductor optical amplifier,” Ninth International Symposium
on Computers and Communications (ISCC) 2004, vol. 1, pp. 270-275, 2004.
[3-2] A. J. Poustie, K. J. Blow, A. E. Kelly, and R. J. Manning, “All-optical full
adder with bit-differential delay,” Optics Communications, vol. 168, no. 1-4, pp. 89-
93, 1999.
[3-3] D. Cotter, J. K. Lucek, M. Shabeer, K. Smith, D. C. Rogers, D. Nesset, and P.
Gunning, “Self-routing of 100 Gbit/s packets using 6 bit ‘keyword’ address
recognition,” Electronics Letters, vol. 31, no. 17, pp. 1475-1476, 1995.
[3-4] J. Wang, P. Ye, M. Zhang, Y. Zhao, and Q. Li, “Simple AND gate
implementation for optical packet switching networks,” International Conf. on
Communication Technology (ICCT) 2003, vol. 1, pp. 590-592, 2003.
[3-5] E. S. Awad, P. Cho, and J. Goldhar, “High-speed all-optical AND gate using
nonlinear transmission of electroabsorption modulator,” IEEE Photonics Technology
Letters, vol. 13, no. 5, pp. 472-474, 2001.
[3-6] K. R. Parameswaran, J. R. Kurz, R. V. Roussev, and M. M. Fejer,
“Observation o f 99% pump depletion in single pass SHG in a PPLN waveguide,”
Conf. on Lasers and Electro-Optics (CLEO) 2001, paper CFB3, pp. 549, 2001.
68
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Chapter IV: Optical Time-to-Live (TTL) Decrementing
I. INTRODUCTION
One problem faced by many packet-switched networks is that of “routing loops”,
where misdirected or mislabeled packets are routed in circles, never reaching their
destination, and leading to severe network congestion [4-1]. While rare packet
processing errors can result in misrouted packets, routing loops can occur due to
errors within the routing table stored at a switching node, or because a change in the
routing table is taking longer than normal to propagate throughout the network. One
commonly-employed method to prevent these loops from strangling the bandwidth
of a network is to use a “time-to-live” (TTL) field within the header of a packet. The
TTL field determines the maximum numbers of hops a packet can take before getting
dropped for being too “old” for the network. In modem IP packets, the TTL is a
binary number (typically 8 bits long) that is decremented by 1 when traversing a
switching node. When the TTL value of a packet reaches zero, the packet is dropped
from the network. “Rogue” packets are either eventually re-routed towards the
correct destination, or the TTL expires and they are dropped. Decrementing this
TTL field requires editing the packet header, something easy in electronics but often
difficult in optical systems.
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There has been minimal previous research on optical technologies for decrementing
the TTL field of an optical packet, or of dropping or destroying packets that have a
zero TTL, particularly for NRZ systems. There has been one recent report o f using a
discrete series o f ultrashort RZ optical pulses as a packet’s “TTL burst,” where
instead of a binary field within the header the number of optical pulses present
corresponded to the value of the TTL [4-2]. The TTL module, consisting of a
semiconductor-optical-amplifier (SOA) and a mode-locked laser, would extinguish a
single pulse each time the packet passed through the module. When no pulses
remained, the packet was dropped. However, this method required restructuring o f a
standard packet header as the binary TTL field was replaced with an indeterminate
number o f optical pulses.
In this chapter, a data-plane TTL-decrementing module that acts upon a standard 8-
bit TTL field located within an NRZ-modulated optical packet is proposed and
demonstrated. If the TTL field within the incoming packet is non-zero, the packet
passes through the module, where gain saturation within an SOA and difference-
frequency-generation (DFG) in a set of periodically-poled lithium-niobate (PPLN)
waveguide wavelength shifters are used to decrement the TTL field. If the TTL field
of the incoming packet is zero, the module processes the packet and generates a
control signal that is used to drop the packet from the network. This technique is
independent of the length of the TTL and the packet, requires minimal control
electronics, does not require the use of ultrashort RZ optical pulses, requires no
70
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guard time between the end o f the TTL field and the rest of the packet, and has only
a 2.4 dB power penalty at 10-9 bit-error-rate. In addition, while this module is
experimentally demonstrated for 10 Gbit/s NRZ-modulated packets, it can, with
minimal modification, be made compatible with RZ-modulated data.
II. SYSTEM CONCEPT
A conceptual diagram o f how this TTL module might operate within an optical
switching node is shown in Fig. 4-1. A packet with a binary TTL field of known
length (commonly 8 bits) enters the switching node and the TTL module. The TTL
module checks the TTL of the incoming packet - if it is nonzero, the TTL is
decremented by one and the packet passes through to the optical switch fabric. If the
TTL o f the incoming packet is zero, the packet is destroyed or dropped. In the zero-
DATA
>toO XC
Data
packets
D ATA 1 1 1 jDATA
V 7 r
TTL
TTL=0:
Packet dropped^ Q
Fig. 4-1. A conceptual diagram of our optical time-to-live (TTL) decrementing module. A packet
enters a switching node and first passes through the TTL module. If the TTL is nonzero, it is
decremented by one and passes to the switch fabric. If the TTL is zero, it is dropped from the
network and the resulting TTL value is irrelevant.
Module
TTL*0:
TTL decremented
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TTL case, the resulting TTL value after passing through the module is irrelevant as
the packet is no longer within the network.
Optically decrementing the TTL by “1” requires optical implementation o f a binary
subtraction algorithm [4-3, 4-4]. One such method is decrementing-via-inversion.
For any arbitrary starting binary value, subtracting “1” results in the least-significant-
bit (LSB) being inverted (in binary subtraction, 1 minus 1 is 0, while 0 minus 1
results in a 1, after “borrowing” from the next higher column). If the least significant
bit (LSB) is a “1” bit, the subtraction is complete, as no borrowing is necessary.
However, if the LSB is a “0” bit, we must reduce the next higher column by “1” as a
result of the borrowing process (and if that next column is “0”, leads to additional
borrowing). This process is illustrated in Fig. 4-2(a). To decrement by one, invert
each bit, beginning with the LSB, until a “ 1” bit is encountered. Invert the “ 1” bit,
and then stop (as inverting the “ 1” bit completes the subtraction). All bits beyond
the first “ 1” bit remain unchanged. This process results in a set o f bits being
replaced by their conjugates, and thus this binary subtraction can take place by
replacing bits, up-to-and-including the first “1” bit, with their conjugates, as shown
in Fig. 4-2(b) - the TTL data to be decremented in this figure consists o f the bit
sequence “11010000” (from the most significant bit (MSB) to the LSB). To create
the decremented output, the first 5 bits (starting with the LSB, up to and including
the first “ 1” bit) are replaced with their conjugate (the shaded part o f “databar”),
while the rest of the bits remain the same (the shaded part of “data”). To implement
72
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“Borrrowing” - * .0111
110 w o o
1 _
11001111
Hr1
All bits up to &
including 1st “1” bit
are inverted
(a)
“data” conjugated
Decremented
output
(“databar”)
(b)
Fig. 4-2. (a) Binary subtraction of “1” from the 8-bit binary value “11010000”. Due to the
borrowing process inherent to subtraction, the result, “11001111” has all bits, up to and including the
first “ 1” bit, inverted, (b) Subtracting one from a binary number can be performed by replacing a
series of bits (up to and including the first “1” bit) with their conjugates.
this “decrementing-via-inversion” process in the optical domain, there are three main
requirements: 1) a method of generating a set o f conjugate data, 2) a fast method to
replace data with its conjugate, and 3) a way to detect the first “1” bit in the TTL so
the replacement process can be terminated.
To generate a set of conjugate data to perform this process, the technique of gain
saturation, or cross-gain-modulation (XGM), in a semiconductor-optical-amplifier
(SOA), is utilized [4-5, 4-6]. An SOA is a well-studied optical device that has a
number o f interesting nonlinear properties, including XGM, cross-phase-modulation
(XPM), and four-wave-mixing (FWM). A high-power data channel (the data to be
conjugated) enters the SOA through one of its input ports, and a low-power
continuous-wave (CW) signal enters via the other. An illustration o f this process is
shown in Fig. 4-3. In this experiment, both channels were at the same wavelength.
73
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Bias
current
SOA
'CW,IN lATA, IN
PD j— ► '
>10 dB
time
time
Fig. 4-3. Using gain saturation in a semiconductor-optical-amplifier (SOA) conjugate data can be
generated at the output of the optical circulator. A high-power data channel and low-power
continuous-wave (CW) channel (in our experiment, both channels were at the same wavelength)
counter-propagate through the SOA. When the high-power channel is “on” (a “ 1” bit) the gain of the
SOA is saturated and the low-power channel is strangled, resulting in a “0” bit. When the high-power
channel is “o ff’ (a “0” bit) the SOA contributes all its gain to the low-power channel, resulting in a
“ 1” bit. The extinction ratio can be >10 dB. Input (normal) and output (inverted) oscilloscope traces
of the data sequence “10100100” are shown.
When the data channel is “on” (a data “1” bit), the SOA provides the majority o f its
gain to the high-power signal, and the CW signal is squelched, resulting in a “0” bit
on the CW wave at the output of the optical circulator. However, when the data
channel is “o ff’ (a data “0” bit), the CW signal receives most of the gain and a “ 1”
bit results at the output. The resulting circulator output carries data conjugate to that
of the data channel. The extinction ratio in this process can be >10 dB. This
inverted data can then be inserted where necessary to perform the “decrementing-
via-inversion” procedure.
Replacing data with its conjugate (“databar”) is done via the technique o f difference-
ffequency-generation (DFG) in periodically-poled lithium-niobate (PPLN)
waveguide wavelength shifters [4-7]. These nonlinear devices use a cascaded
% (2);X (2 ) process to efficiently shift an input signal to a new wavelength when a pump
74
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(1): Second-harmonic generation
(2): % < 2 ) mixing for DFG
Fig. 4-4. Difference-ffequency-generation (DFG) in a periodically-poled lithium-niobate (PPLN)
waveguide results in “reflection” of an input wavelength L n around the PPLN pump wavelength
V ump via a cascaded x(2):%(2) process. First, via second-harmonic-generation, a channel at XP U m p/2
is generated (1), and that channel mixes with the input ain to produce Lout (2).
signal is present. The PPLN waveguide adds negligible spontaneous emission noise,
operates with little to no chirp, has similar up- and down-conversion efficiency,
induces negligible crosstalk at the output, and has a >THz bandwidth [4-7].
In essence, the output wavelength is the input wavelength “reflected” around the
pump wavelength, as shown in Fig. 4-4. These devices have seen application in a
number o f optical switching architectures [4-8]. A PPLN waveguide only L-shifts an
input channel to a new wavelength when a pump channel is present. By using two
PPLN waveguides (one for the “data” and another for the inverted data, or “databar”)
and modulating the PPLN pumps appropriately, one can choose when the “data” and
“databar” signals are A.-shifted. Through the use of conjugate pump signals (so only
one o f the two signals is being X-shifted at any given time), either “data” or
“databar” can be X-shifted as needed. By only ^-shifting “databar” to a new
75
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Signal inversion
10 Gbit/s
NRZ Dropped
packet
(TTL=0)
SOA
(CW )
Xr~ MOD ■
data
M OD
1x2
switch
'PUMP
data
V ufipl!™ ”
X i TTL-
updated
data out
TTL start
D-flip flop
Electronic control
Fig. 4-5. The experimental setup of the optical TTL module. The initial data stream is split into three
branches - one is used to create conjugate data (“databar”) via gain saturation in an SOA, one is used
as the data stream, and the last is detected and used to control the module. A D-flip-flop controls the
insertion of conjugate data by controlling the PPLN waveguide pumps. The “TTL start” pulse is
perhaps generated by an existing preamble-detection module, such as described in [4-9],
wavelength when the TTL-decrementing algorithm requires inverted data, and
shifting “data” to a new wavelength at all other times (during the rest o f the TTL,
and during the rest o f the packet), the resulting two 7,-shifted signals can be
combined, and the new wavelength isolated via filtering, resulting in a combined, X-
shifted, and TTL-decremented channel.
III. EXPERIMENTAL SETUP
The experimental setup of the optical TTL module is shown in Fig. 4-5. An
incoming data packet with an 8-bit TTL field (with a 1 -bit gu ard time before the TTL
to ensure proper timing, but no guard time between the end of the TTL and the rest
of the packet data) is amplified and split into three branches. The middle branch is
76
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the “data” sent to the “data” PPLN waveguide. The top branch is transmitted
through a 3-port optical circulator and through the SOA to create “databar” via gain
saturation, as described in the preceding section. The final branch o f the input data
stream is sent to a receiver to check for the first “ 1” bit within the TTL. This is done
by using this signal (after an OR gate) as the clock input to a D-flip-flop (DFF) that
selects which of the data streams (“data” or “databar”) is X-shifted at any given
moment by the PPLN waveguides by modulating the PPLN waveguide pumps. The
DFF is the key to controlling the TTL-decrementing algorithm, with the “Q” output
of the DFF controlling the “databar” PPLN pump modulator and the “Qbar” output
controlling the “data” PPLN pump modulator. This guarantees that only one of the
two data streams will be X-shifted at any given moment. A “TTL start” pulse (which
we generate artificially, but could be provided by some sort o f optical preamble
detection such as in [4-9]) signals to the electronics the start o f the TTL field and
acts as both an input and a clock (after the OR gate) to the DFF, setting the “Q”
output o f the DFF to “1.” As the “Q” output of the DFF is tied to the “databar”
PPLN pump, the “databar” channel is shifted to a new wavelength, X o u t , while the
“Q” output remains high. The “data” channel, whose PPLN pump is controlled by
the “Qbar” output o f the DFF, is not A,-shifted while the “Q” output remains high.
We shift “databar” to Xout only when the TTL-modification requires the conjugate
data at the output - that is, until the first “1” bit is present in the TTL. The first “1”
bit in the TTL o f the packet acts as a “clock” input to the DFF, resetting the “Q”
output to zero, shutting off the pump to the “databar” PPLN and turning on the pump
77
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to the “data” PPLN. This begins ^-shifting of the “data” stream to A,o u t - After
filtering out all wavelengths save A-o u t , the two synchronized X-shifted signals
(“data” and “databar”, which are never ^-shifted to A-o u t simultaneously) are
combined via a coupler and the result is a TTL-modified A,o u t output channel.
The “Q” signal is also used to control a switch that drops the packet when the TTL of
the incoming packet is zero. Any “1” bit within the TTL field will cause the “Q”
output to reset to “0.” Thus, if the “Q” output is still “1” after the TTL has passed,
then there cannot be any “1” bits within the TTL field - it must have a zero value. A
simple decision circuit is used to test “Q” immediately after the TTL has passed
through the module. Only if all TTL bits are zero will the “Q” output remain high,
and thus a positive decision at this stage can be used to reset the DFF and drive an
optical switch that drops the packet. While it is possible that some corruption of
packet data can take place if the TTL is zero (as the “Q” output remains high, and
thus “databar” is shifted to A,o u t after the TTL has passed - it is for this reason that
the decision circuit also resets the DFF), as packets are dropped or destroyed when
the TTL o f an incoming packet is zero, the resulting packet data may be irrelevant.
In addition, as any packet with a nonzero TTL will stop shifting “databar” and begin
shifting the “data” stream by the end of the TTL field, no guard time between the end
of the TTL and the rest o f the packet is required.
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VI. RESULTS AND DISCUSSION
Three 20-byte packets, each with varying TTL values and payload data, 0.8 ns of
guard time between packets, and no guard time between the end of the TTL and the
rest o f the packet, are modulated at 10 Gbit/s onto a 1545 nm signal wavelength (Xin)
and sent into the TTL module. Two packets had non-zero TTL values, and one
packet had a zero TTL. A closer look at the TTL field of one o f the packets is shown
in Fig. 4-6 for a packet with a TTL value of “00111100” (LSB->MSB). The input
“data” signal for this packet is shown in Fig. 4-6(a), and the “databar” signal
generated via gain saturation in the SOA (with a 1545 nm CW input to the SOA) is
shown in Fig. 4-6(b). The SOA bias current was 80 mA. The first three bits o f the
TTL (starting with the LSB) are “001”, so the first “1” bit is the 3rd bit o f the TTL.
Thus, the “decrementing-via-inversion” algorithm should require that the first 3 bits
of the TTL be replaced by their conjugates. The PPLN pump modulation signals
(the outputs of the DFF) are shown in Figs. 4-6(c) and 4-6(d), where (c) is the
“Qbar” signal modulating the “data” PPLN pump, and (d) is the “Q” signal
modulating the “databar” PPLN pump. The pump wavelength for both PPLNs was
1550.12 nm, and the pump power into each PPLN was approximately 10 dBm,
resulting in a X-shifted output signal at 1555.24 nm at around -13 dBm. The PPLN
spectrum showing the input, pump, and ^.-shifted output is shown in Fig. 4-7. After
amplification and filtering to remove all wavelengths save 1555.24 nm, the resulting
streams were combined and the TTL-modified result is shown in Fig. 4-6(e). While
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End of prev. T T L
packet (LSB->MSB)
* — r S
800 ps
0 0 1 1 1 1 0 0
“Data*
a ‘ data
11000011
f\nA __rvi
11000011
> ■ j u i r u i r
c.
“Data” PPLN
pump modulation
“Databar ” PPLN /"I
pump m odulation 1 — -
11011100
e.
TTL-updated
packet
on/iqiw
New packet
Fig. 4-6. A close-up look at the TTL field of a packet with a TTL value of “00111100” (LSB->MSB)
(a) The TTL field of the “data” stream, (b) The TTL field of “databar”, the conjugate data generated
via gain saturation in the SOA, showing a TTL value of “11000011”. (c) The control signal for the
“data” PPLN pump - “data” is ^.-shifted at all times save from the start of the TTL until after the first
“ 1” bit in the TTL. (d) The control signal for the “databar” PPLN pump - “databar” begins ^.-shifting
when the TTL starts and ends immediately after the first “1” bit. (e) A close-up view of the TTL-
modified output, with a new TTL of “11011100” (the bits up to and including the first “ 1” bit having
been replaced with “databar”).
this technique results in a shift of the input wavelength to a new output wavelength,
this can be alleviated by using a conventional wavelength shifter (or a second PPLN
with a pump wavelength identical to the first, causing a second shift around the
pump back to the original input wavelength).
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s
« 10+
■ a
U
0 >
I "13 + A h
•a
Q -3 8 -fc ,
1, IN
A p u
2, OUT
- + -
1545 1550.12 1555.24
l—► A , (nm)
2
a Back-to-back
• “databar” generation
» \flcr ^.-shifting
n Updated TTL
4
5
©
7
8
9
-14 -13 -12 -11 -10 ■ 9
Fig. 4-7. Optical spectrum at the output of the “data”
PPLN waveguide, showing the three signals - “data”
at L|N =1545 nm, the A-shifted output at A0ut=1555.24
nm, and the 1550.12 nm PPLN pump.
Receiver Power (dBm)
Fig. 4-8. Power penalty curves for the optical
TTL module. The total penalty is -2 .4 dB.
Power penalty curves are shown in Fig. 4-8. The total power penalty o f this module
is ~2.4 dB when compared to the back-to-back receiver sensitivity at 10-9 bit-error-
rate, arising mostly by the L-shifting in the PPLN and insertion of parts o f “databar”
into the TTL field. Using the current setup, it may be difficult to traverse a large
number o f hops, and as such this system may be viable only in a low-hop network
core. However, the use of a higher-efficiency PPLN waveguide and an SOA with
lower chirp (or an optical 2/3R regenerator) may reduce these sensitivity penalties
considerably, allowing for transmission beyond a handful o f nodes.
To demonstrate packet dropping, a lithium-niobate optical switch was placed in
series with the TTL module and controlled by a decision circuit as described in the
above section. The circuit checks the “Q” value on the 1st bit after the TTL ends - if
it is high, it signals the switch to drop the packet and resets the DFF so that the “Q”
81
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TTL value
(LSB ->M SB)“
a. D ata packets
k TTL-updated
packets
Dropped packet
(TTL = 0)
Packet #1
10000101
Packet #2
00000000
Packet #3
00111100
1 1 1 *
00000
J iff
c.
11011100
Fig. 4-9. (a) A number of input packets to the TTL module, each with different TTL values and data
payloads, (b) Packets with nonzero TTL values have their TTL decremented and then pass through
the module, (c) When a packet with a TTL value of zero enters the module, a signal is generated that
drops the packet from the network (in this case using an optical switch), and the resulting TTL value
is irrelevant.
signal is again “0.” The three packets are shown in Fig. 4-9(a), and the switch
outputs are shown as Figs. 4-9(b) and 4-9(c), where (b) shows the “through” port and
(c) the “drop” port.
While this technique was demonstrated for NRZ-modulated data, this technique can
be applied to RZ systems without major modification. By replacing the low-power
CW signal input to the SOA with a constant stream o f RZ “ 1” bits synchronized to
the input, a “databar” stream of RZ bits can be generated. The rest o f the system
requires no modification - such an implementation also removes the need for the 1-
bit guard time prior to the start o f the TTL. Without further investigation as to the
effects o f the PPLN and SOA on other types of signals (CRZ, CSRZ), it is difficult
to say whether this technique can be extended to other modulation formats.
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VI. SUMMARY
“Routing loops,” where a misdirected packet is routed in circles indefinitely, can be a
significant problem in modern-day networks, leading to severe network congestion if
misrouted packets are not quickly dropped from the network. To combat this
problem, IP packets incorporate a “time-to-live” field that is decremented by one at
each “hop” within the network - when the TTL value reaches zero, the packet is
dropped from the network. To begin a move towards all-optical routing within the
network core, it may be necessary to implement this TTL decrementing process in
the optical domain.
83
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REFERENCES
[4-1] V. Paxson, “End-to-end routing behavior in the Internet,” IEEE/ACM
Transactions on Networking, vol. 5, no. 5, pp. 601-615, October 1997.
[4-2] W. Hung, K. Chan, L. K. Chen, C. K. Chan, and F. Tong, “A routing loop
control scheme in optical layer for optical packet networks,” Conference on Optical
Fiber Communications (OFC) 2002, paper ThGGl 11, pp. 770-771, 2002.
[4-3] R. E. Fowkes, “Hardware efficient algorithms for trigonometric functions,”
IEEE Transactions on Computers, vol. 42, no. 2, pp. 235-239, February 1993.
[4-4] H.-I. Jeon and M. A. G. Abushagur, “Digital optical arithmetic processor
based on symbolic substitution,” Proceedings o f the 20th Southeastern Symposium
on System Theory (1998), pp. 221-223, 1998.
[4-5] P. Parolari, L. Marazzi, M. Connen, and M. Martinelli, “SOA-based all-optical
threshold,” Conference on Lasers and Electro-Optics (CLEO) 2000, paper CWK29,
pp. 309-310, 2000.
[4-6] M. C. Cardakli, D. Gurkan, S. A. Havstad, and A. E. Willner, “Variable-bit-
rate header recognition for reconfigurable networks using tunable fiber-Bragg-
gratings as optical correlators,” Conference on Optical Fiber Communications
(OFC) 2002, paper TuN2, vol. 1, pp. 213-215, 2000.
[4-7] K. R. Parameswaran, J. R. Kurz, R. V. Roussev, and M. M. Fejer,
“Observation of 99% pump depletion in single pass SHG in a PPLN waveguide,”
Conference on Lasers and Electro-Optics (CLEO) 2001, paper CFB3, pp. 549, 2001.
[4-8] G. S. Kanter, P. Kumar, K. R. Parameswaran, and M. M. Fejer, “Wavelength-
selective pulsed all-optical switching based on cascaded second-order nonlinearity in
a periodically poled lithium-niobate waveguide,” IEEE Photonics Technology
Letters, vol. 13, no. 4, pp. 341-343, April 2001.
[4-9] M. C. Cardakli and A. E. Willner, “Synchronization o f a network element for
optical packet switching using optical correlators and wavelength shifting,” IEEE
P h o t o n i c s T e c h n o l o g y L e t t e r s , vol. 14, no. 9, pp. 1375-1377, September 2002.
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Chapter V - Optical Half-Subtacter/Adder Module
I. INTRODUCTION
There has been recent renewed interest in the possibility of all-optical networks,
where optical signals are transmitted, routed, and processed optically at line rates [5-
1]. However, such a vision requires more than the availability o f high-speed optical
switches - many functions not currently realized in the optical domain may be
required, including optical address recognition, packet forwarding, routing-loop
control/TTL decrementing (discussed in Chapter IV), optical encoding/decoding of
data (discussed in Chapter VI), and packet checksum calculation [5-2 - 5-4]. It may
also require signal processing devices, including optical digital logic gates, counters,
shift registers, and half- and full-adders and subtracters for data encryption, key
checking, or processing of packet headers. Attention must also be paid to whether
only the data plane, or both the data and control planes, should use optical packet
processing techniques, and whether these implantations should use wholly optics, or
a mixture of optics and electronics (“optically-assisted routing”).
For this reason, there has been a strong recent research interest in constructing and
demonstrating experimentally digital logic functions (e.g. AND/OR/XOR/XNOR) in
the optical domain [5-5], and in using these gates, as well as novel optical devices, to
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implement some of the basic functions o f signal processing. However, high-speed
digital optical signal processing and networking, which can involve use of shift
registers, subtracters, adders, (de-)multiplexers, and counters, is still a nascent field,
with many functions not yet demonstrated experimentally.
There have been some recent demonstrations o f some of these essential functions in
the optical domain. In particular, there has been recent research into the
development of optical digital logic, with most of the common electronic gates
having been implemented in the optical domain (although perhaps not yet in an
easily integrable way). In optical signal processing, there have been demonstrations
of a number o f key functions, including recent results on optical half-addition [5-6 -
5-7], and demonstration of an optical shift register [5-8].
However, there has yet to be a demonstration o f an optical half-subtracter, nor a
module that can perform simultaneous half-subtraction and -addition. Such a half
subtracter module can see application to the essential network function o f optical
TTL decrementing and routing loop control (which only requires half-subtraction)
[5-4, 5-9]. Additional potential applications include dual-direction binary counters,
encryption and decryption of optical data, and optical arithmetic-logic units (ALUs).
Furthermore, a module that can perform simultaneous bit-wise half-subtraction and
half-addition of input data streams may offer significantly enhanced flexibility in
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optical packet-switched networks and optical processing systems, as half-adders can
see application to binary counters and packet checksum calculation within networks.
In this chapter, a module that performs simultaneous bit-wise half-subtraction and
half-addition o f two independent 5 Gbit/s input data streams is proposed and
demonstrated. The “Borrow” (/X*Y, where /X represents the inverse o f X, or ‘X-
bar’) and “Difference/Sum” (X©Y, or XOR) outputs are generated using cross-gain
modulation (XGM) in two parallel semiconductor optical amplifiers. Taking
advantage of the gain saturation inherent to SOAs, the module generates two signals,
/X*Y, and X*/Y, and combines them using a passive optical coupler to generate the
XOR “Difference/Sum” output. Because the parallel SOAs generate /X*Y and X*/Y
separately, the /X*Y signal can be tapped off to use as the “Borrow” output, making
the Borrow output “free” as a side-effect of the generation of “Difference/Sum” (a
key reason why a subtracter implementation may be easier optically than an adder,
which requires an additional “Carry” output). Difference-frequency-generation-
based X-conversion in a periodically-poled lithium niobate (PPLN) waveguide is
used to generate the “Carry” (X*Y) output. The PPLN waveguide allows bit-
synchronous wavelength shifting, is wide-bandwidth, and offers no intrinsic chirp.
This module uses only three active elements to perform both half-subtraction and
addition, and carries a maximum power penalty o f 1.0 dB.
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II. NETWORK ARCHITECTURE
The development and implementation of optical digital logic and signal processing
functions may require a fundamental shift in architecture as one moves from
conventional electronic processing to high-speed optical signal processing. It may
not be enough to simply “replace every electronic gate with an optical one” - some
functions that may be trivial to construct using electronic elements may be difficult
in optics, while the unique features inherent in optics (including many optical
nonlinearities and phase relationships) may make alternative implementations of
gates and devices more realistic in a high-speed optical network. It may also be
necessary to look at the network architecture as a whole, and determine that the
“electronic way of networking” may not be the best way to use an optical network.
A key example is that of the electronic ALU vs. an optical one. In conventional
electronics, addition is the default operation - subtraction using an individual
subtracter is done in specialized situations (such as TTL decrementing, or
encryption/decryption) - in most cases, however, subtraction is done in an ALU by
taking the two’s complement of the subtrahend (B, in the equation “A-B=C”) and
adding A and B together. One reason for this is that in conventional electronic
processing, it has been easier to construct high-speed adders than subtracters - thus,
almost all electronic networks are built around the adder as a fundamental building
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block. However, this may not be true for optical systems, where a half-subtracter
implementation may be more straightforward than that o f a half-adder. Thus, it is
not only enough to “build an electronic ALU with optics” but rather to consider the
possibility o f completely new architectures for optical networks - to do this, not only
are examples o f currently-used electronic functions required, but examples o f optical
implementation of functions often ignored in electronics may be useful in developing
such new architectures.
III. LOGIC IMPLEMENTATION
A digital gate-level conceptual diagram for a half-subtracter that implements the
function ‘X-Y’ is shown on the left in Fig. 5-1(a). There are two digital inputs, ‘X ’
and ‘Y ’, and two outputs, “Difference”, and “Borrow”. The “Difference” output
exists only when either ‘X ’ or ‘Y ’ exist (equals logic ‘1’), but not both (if both inputs
to the subtracter equal one, 1 - 1 = 0 ) . Thus, the output logical relationship for
“Difference” is ‘X©Y’, commonly known as the exclusive OR (XOR), or parity,
function. The XOR function, while not difficult to implement directly in electronics,
has been found difficult to implement directly in the optical domain (although there
have been some recent demonstrations [5-10]). However, this problem can be solved
by breaking the XOR function down into the logical primitives o f AND and OR,
leading to the function ‘X*/Y + /X*Y’, and thus can be implemented using two AND
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Z j x O K >
A ND
D IF F E R E N C E XY J I xO R )- ^ SUM
SUM
B O R R O W
CARRY
(a) (b)
Fig. 5-1. (a). Gate-level conceptual diagram of a half-subtracter, (b). Gate-level conceptual
diagram of a half-adder. The difference is a single “NOT” gate (the bubble on the AND) in the half
subtracter.
OR gate. The “Borrow” signal exists only when it is necessary to subtract from a
nonexistent signal (i.e. 0 - 1 = 1, plus a ‘Borrow’), and thus is represented by the
logical function 7X*Y’. In the original conceptual diagram in Fig. 5-1(a), this
required an additional gate. However, when implementing the “Difference” signal
using AND/OR gates, the “Borrow” signal o f 7X*Y’ is generated as an intermediate
step toward “Difference”, and can be tapped off, generating the “Borrow” signal “for
free” as a byproduct of generating “Difference”.
A digital gate-level implementation o f a half-adder that implements the function
‘X+Y’ is shown in Fig. 1(b). There are again two inputs, ‘X ’ and ‘Y ’, and two
outputs, “Sum”, and “Carry”. The “Sum” output exists when one o f the digital
inputs, but not both, carries a value o f logic ‘ 1’ (0 + 1 or 1 + 0 = 1). This is an XOR
relationship, identical to that which is required to generate the “Difference” signal in
the half-subtracter. Thus, it is not necessary, in this simultaneous half
subtracter/adder implementation, to include a separate set o f gates for “Sum” - it
gates with inverters (‘bubbles’) at the input, the outputs o f which are followed by an
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Input data
bits
Subtracter
(X-Y)
Adder (X+Y)
X Y Borrow Difl Sum C arry
0 0 0 0 0 0
0 1 1 1 1 0
1 0 0 1 1 0
1 1 0 u 0 , 1
(a)
BORROW
DIFF/SUM
CARRY
AND
(b)
Fig. 5-2. Truth table for a half-subtracter and half-adder. The shaded area denotes that the Difference
output of the subtracter and the Sum output of the adder are identical, (b). Gate-level conceptual
diagram of a combined half-subtracter/adder, using 6 gates (three AND, one OR, two inverters
(bubbles)).
also comes “free” as a result of generating “Difference” in the subtracter. The
“Carry” output exists only when both the ‘X ’ and ‘Y ’ inputs are logic ‘1 ’ (i.e. 1 + 1 =
0, plus a ‘Carry’). This is the logical function ‘X»Y’, or AND, and can be
represented by a single AND gate.
A truth table showing the inputs and outputs for the half-subtracter and adder is
shown in Fig. 5-2(a). Note the shaded area of the table, showing the similarity
between the half-subtracter “Difference” output and the half-adder “Sum” output.
Taking advantage of these similarities to create a single “master” gate-level
implementation for the combined half-subtracter and half-adder, we obtain the
construction shown in Fig. 5-2(b). The final implementation requires six logic gates
- three AND, one OR, and two inverters (bubbles on the AND gates).
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IV. OPTICAL IMPLEMENTATION
A conceptual diagram o f the optical implementation of the half-subtracter/adder is
shown in Fig. 5-3, and requires only three nonlinear optical elements compared to
the six electronic gates described in the previous section. The device consists o f two
“blocks”, one which generates the Difference/Sum and Borrow outputs, the other
which generates the Carry output.
The upper block o f the half-subtracter/adder is the XOR block that will generate both
the “Borrow” output and the “Difference/Sum” output. The keys to this block are
the two semiconductor optical amplifiers (SOAs), which generate these outputs via
cross-gain-modulation (XGM). In the XGM process, one high-power pump signal
saturates the gain o f the SOA, resulting in little-to-no residual gain available for any
other (much lower power) probe signals. In the case of two synchronized co-
BORROW
H i SOA
X*Y
DIFF/SUM X*Y
SOA
OR
X»Y
PPLN
CARRY
Fig. 5-3. Conceptual diagram of the optical implementation of the half-subtracter/adder. This module
uses three optical elements - two semiconductor optical amplifiers (SOAs), and one periodically-
poled lithium-niobate (PPLN) waveguide. The OR function is provided via an optical coupler. The
upper shaded block is all that is required for half-subtracter functionality, the lower block is required
to include half-adder functionality.
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propagating data streams ‘X ’ and ‘Y \ on independent wavelengths Xx and XY, if the
‘X ’ data stream is used as a pump, and thus is at a significantly higher average
optical power level than the ‘Y ’ data stream, then whenever an ‘X ’ data bit is equal
to ‘1’ the gain of the SOA is almost completely saturated and a ‘Y ’ data bit o f any
value (‘0’ or ‘ 1’) is strangled, resulting in an output of ‘0’ [5-11]. Only when a ‘Y ’
data bit is equal to logic ‘1’ and the coinciding ‘X ’ bit is ‘O’ will any output be seen
on Xy. This corresponds to a logical function of 7X»Y’ on XY. This output on XY
can then be isolated via filtering.
To generate the “Borrow” signal, input ‘X ’ is used as the high-power pump signal,
and input ‘Y ’ is the lower-power probe signal, generating the logical function
7X*Y’. In the second SOA within the upper block, the ‘Y ’ input is used as the high-
power pump signal, and input ‘X ’ is the lower-power probe signal, generating the
logical function ‘X*/Y’. A single 50:50 coupler is used as an OR gate, combining
the two SOA outputs and generating the logic function ‘X»/Y + /X»Y’, or XOR - the
required Difference/Sum output.
The lower block o f the half-subtracter/adder is present only to allow half-adder
functionality, and if half-adder functionality is not needed, can be omitted. This
block generates the ‘X*Y’ “Carry” signal using different frequency generation
(DFG) in a periodically-poled lithium-niobate (PPLN) waveguide. Using a cascaded
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X (2);X(2 ) process, the PPLN waveguide acts as a wavelength conversion device that
maps an input signal to a mirror-image wavelength with respect to a pump
wavelength (Xc « 2*X% - Xy) [5-12]. A key advantage o f the PPLN waveguide
device is that the X-shifting process can be controlled on the order o f a bit duration -
by modulating the PPLN waveguide pump signal, a logic ‘ 1’ bit on the input signal
wavelength(s) is X-shifted only when the pump signal is logic ‘1’. Thus the output
wavelength, Xc, carries data that is the logical AND o f the input signal and
modulated pump. Additional advantages of DFG in the the PPLN waveguide over
the use o f four-wave-mixing in an additional SOA include its wide operational
bandwidth (-50 nm), lack of intrinsic chirp, and negligible added noise.
V. EXPERIMENTAL SETUP
Fig. 5-4 shows the experimental setup for the optical half-subtracter/adder, divided
into the two blocks described in the previous section. The two data streams ‘X ’ and
‘Y ’ are generated via externally modulating two lasers at 1548.0 nm (Xx) and 1550.1
nm (Xy) with 5 Gbit/s RZ pseudorandom data sequences up to 2U-1 (stopping at 21 1 -
1 due to the difficulty of manually programming the pattern generator). The ‘X ’ and
‘Y ’ signals are divided between the two blocks using individual 50:50 couplers.
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Input X
5 G bit/s RZ
1
1548.0 nm -H MOD
1550.1 nm — * MOD
10/90
coupler
.9 X/.l Y
BORROW
X*Y
SOA #1-8'
1546.0
1X /.9Y
DIFF/SUM
X©Y
SOA #2
CARRY
X*Y
PPLN -
T
Input Y
5 Gbit/s RZ
Fig. 5-4. Experimental setup for the half-subtracter/adder.
The ‘X ’ and ‘Y ’ inputs are both amplified to 18 dBm and combined using a 10:90
coupler. Coupler output port #1 uses the ‘X ’ data signal (16.5 dBm output) as the
high-power pump, and the ‘Y ’ data signal (8 dBm) as the lower-power probe signal.
Coupler output port #2 has the power levels reversed (‘Y ’ at 16.5 dBm, ‘X ’ at 8
dBm), and the ‘Y ’ data signal acts as the pump signal while ‘X ’ is the probe. The
two coupler outputs are input to the two SOAs, both biased at 185 mA. 1546.0 nm
CW assist light (shown in the figure) at 9 dBm is also coupled into each SOA along
with the data signals. This input increases the efficiency o f the XGM process by
biasing the total average power closer to the saturation point [5-13].
The outputs o f the two SOAs are filtered to isolate the low-power probe signal
wavelength, which, as a result of gain saturation, carries the logical result desired -
for SOA #1, the output signal on Xy (1550.1 nm), which carries the logical result
7X»Y’, is filtered and isolated using a 0.5 nm filter. For SOA #2, the output signal
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on Xx (1548 nm), which carries the logical result ‘X 7Y ’, is filtered and isolated. The
output of SOA #1 is then split into two branches using a 50:50 coupler. One output
branch o f this coupler represents the 7X*Y’ “Borrow” output for the half-subtracter,
one o f the three outputs of this half-subtracter module. The other output branch is
combined with an attenuated SOA #2 output using a 50:50 optical coupler to create
the combined final output o f 7X*Y + X*/Y’, which is an XOR output - the
“Difference” output o f the combined half-subtracter. Should half-adder functionality
also be desired, this output signal also represents the “Sum” output for the half-
adder.
The second block o f the half-subtracter/adder module, used to generate the “Carry”
output signal, is implemented using a single PPLN waveguide. The pump
wavelength for the PPLN waveguide used is 1550.1 nm, and thus input data signal
‘Y ’ is used as the PPLN pump. Input signal ‘X ’, at 1548 nm, is used as the probe
signal, and the converted output signal is at a wavelength “mirrored” around the
pump, or approximately 1552.2 nm. Input signals ‘X ’ and ‘Y ’ are individually
amplified, combined using a 50:50 coupler, and injected into the PPLN waveguide.
The output optical spectrum o f the PPLN waveguide, showing the ‘Y ’ pump signal,
‘X ’ probe signal, and the -15 dBm converted output signal on X c a r r y is shown in
Fig. 5-5. The conversion efficiency for a ~6 dBm input signal on Xx is -21 dB, and
the noise floor is at -33 dBm. The output signal on Xcarry = 1552.2 nm is isolated
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Input Y
(10 dBm)
q Input X !
(7 dBm)|
CARRY
output
(-15 dBm)
1548.0 1550.1 1552.2
W avelength (nm)
Fig. 5-5. Output optical spectrum of the PPLN waveguide. Conversion efficiency for a 6 dBm input
at 1548 nm is -21 dB.
via filtering, then amplified. This signal carries the logical function ‘X*Y’, which is
the AND o f the two data inputs, and is the “Carry” output for the half-adder portion
of this module.
VI. RESULTS AND DISCUSSION
Representative samples from the input data signals ‘X ’ and ‘Y ’ are shown in Figs. 5-
6(a) and (b), respectively. The “Borrow” output of SOA #1, representing the logical
relationship 7X*Y’, is shown in Fig. 5-6(c) - an output pulse is present only when
input ‘Y ’ is logic ‘ 1 ’ and input ‘X ’ is logic ‘O’. The second output o f the module, the
“Difference/Sum” output, which is the combination of the outputs o f SOA #1 and
SOA #2, representing the logical relationship ‘/X«Y + X*/Y’, is shown in Fig. 5-6(d)
- an output pulse is present when input ‘Y ’ is logic ‘1’ or input ‘X ’ is logic ‘1’, but
not both. The ‘X*Y’ “Carry” output of the PPLN waveguide, required only for half-
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001010000100000100100
t
c. Borrow
t
01 10 1 00 11 10 0 01 01 01 10 0
d. Difference/Sum
0 0 0 10 01 00 0 10 10 00 00 00 0
t
e. Carry
► t
Fig. 5-6. (a). Data input ‘X’ to the half-subtracter/adder module, (b). Data input ‘Y ’ to the half
subtracter/adder modules, (c). “Borrow” output of the half-subtracter. A pulse is present only if
input ‘Y ’ is logic ‘1’ while input ‘X ’ is logic ‘O ’, (d). “Difference/Sum” output of the half
subtracter/adder. A pulse is present if input ‘Y ’ is logic ‘ 1’ or input ‘X’ is logic ‘1’, but not both.
(e). “Carry” output of the half-adder. An output pulse is present only if both inputs ‘X ’ and ‘Y ’ are
logic ‘1’.
adder operation, is shown in Fig. 5-6(e), and an output pulse is present only when
both inputs ‘X ’ and ‘Y ’ carry a value of logic ‘1’.
The bit-error-rate/power penalty plots for for the half-subtracter/adder module are
shown in Fig. 5-7. The “Carry” output o f the module shows a -0.7 dB penalty to
receiver sensitivity when compared to the back-to-back receiver sensitivity at 10-9
bit-error-rate. The “Borrow” and “Difference/Sum” outputs show slightly higher
power penalties, with the SOA #1 “Borrow” output showing a -0.8 dB power
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penalty, and the combined SOA #1 and #2 “Difference/Sum” output showing the
maximum penalty from the module, with a ~1.0 dB penalty to receiver sensitivity.
The “Carry” penalty could be reduced by using a PPLN waveguide with higher
efficiency, while the penalty in the “Borrow” and “Difference/Sum” outputs could be
reduced by using more closely matched SOAs, and by the use of SOAs with lower
noise and higher XGM efficiency.
The use of the RZ data format was in part to reduce any pattern dependence that
might arise as a result of the XGM process. However, no pattern dependence was
observed for our module for data sequences from 27-l to 2n -l. Given high-quality
SOA devices, it is likely that this module will work without significant alteration for
NRZ signals.
A Back-to-back
• CARRY
A D IFF/SU M
X
□ b o r r o w
AS
-14 1 3 . 5 -13 - 12.5 -12 - 11.5 -11
Optical Power (dBm)
Fig. 5-7. Bit-error-rate plot for the half-subtracter/adder. The maximum penalty from the module is
~1 dB, for the Difference/Sum output.
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One potential limitation of this module is that the “Difference/Sum” output o f this
module is carried on two wavelengths, as it is the combination of the 7X*Y’ output
of SOA #1, which is carried on Xy, and the ‘X*/Y’ output of SOA #2, which is
carried on Ax- For some applications, such as the localized calculation o f optical
checksums, or optical encryption/decryption of data, this limitation may not be
significant. However, in cases where data must be re-integrated into the optical
packet (such as TTL decrementing using the optical half-subtracter) it may be
necessary to employ an additional static wavelength converter after SOA #2, prior to
combining the two SOA outputs, to ensure that all “Difference/Sum” output pulses
exist on the same wavelength.
It is also noted that the upper block o f the system setup (generating the “Borrow” and
“Difference/Sum” outputs) is all that is required to create a working optical half
subtracter, using two SOAs, as the “Borrow” signal is generated “free” as part o f
generating the “Difference/Sum”. The additional PPLN waveguide is required only
to generate the “Carry” signal for half-adder functionality (as the “Sum” also comes
“free” as part o f generating the “Difference” output). As the half-adder requires
additional optical devices (either the PPLN, or another SOA for four-wave-mixing),
and furthermore, the half-subtracter components (SOAs) are readily integrable
optical components, it may be easier, in a future optical network, to use subtraction
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as a ‘default’ operation rather than the addition commonly used in electronic
systems.
VII. SUMMARY
A module is proposed and demonstrated that performs simultaneous bit-wise half
subtraction and half-addition o f two independent 5 Gbit/s RZ input data streams.
XGM in two parallel SOAs is used to generate “Borrow” and “Difference/Sum”
outputs for use in bit-wise half-subtraction, while difference-frequency-generation in
a PPLN waveguide generates a “Carry” output for half-adder functionality. This
module uses only three optical elements to perform both half-subtracter and half
adder functionality, and generates all three outputs with a maximum ~1.0 dB power
penalty.
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897-899, 2004.
[5-11] P. Parolari, L. Marazzi, M. Connen, and M. Martinelli, “SOA-based all-
optical threshold,” Conf. on Lasers and Electro-Optics (CLEO) 2000, paper CWK29,
pp. 309-310, 2000.
[5-12] K. R. Parameswaran, J. R. Kurz, R. V. Roussev, and M. M. Fejer,
“Observation of 99% pump depletion in single pass SHG in a PPLN waveguide,”
Conf. on Lasers and Electro-Optics (CLEO) 2001, paper CFB3, pp. 549, 2001.
[5-13] R. Inohara, K. Nishimura, M. Tsurusawa, and M. Usami, “Experimental
analysis o f cross-phase modulation and cross-gain modulation in SOA-injecting CW
assist light,” IEEE Photonics Technology Letters, vol. 15, no. 9, pp. 1192-1194,
2003.
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Chapter VI - Polarization-based Data Coding in Optical Code
Division Multiple Access (OCDMA) Systems
I. INTRODUCTION
There has been recent renewed interest in pushing optical communication networks
beyond the “edge” of the network core, towards the access networks, and even to the
desktop, where users may be part of a larger optical local-area-network (LAN) [6-1].
LAN traffic is highly granular, with tens, or even hundreds, of users pushing data
simultaneously, at bit rates considered miniscule (2 Gbit/s or less per user) compared
to an optical network core (where many simultaneous WDM channels may transmit
at >10 Gbit/s apiece). This data (in Ethernet LAN systems), if intended for a user
within the LAN, is broadcast to all members of the LAN, while data intended for the
“external network” is collected by the central hub, re-packaged, and sent outside the
network.
However, current optical network designs that center on the use o f WDM
technologies do not scale well to the fine granularity required in the optical LAN
environment - assigning each user an individual wavelength is a significant waste of
resources, as only a handful of the total users are transmitting/receiving at any given
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moment, and those that are do not need the 10 Gbit/s or more that a dedicated WDM
channel can provide.
For this reason there has been increased interest in optical code-division-multiple-
access (OCDMA) technologies [6-2]. The traditional approach to OCDMA is
similar to wireless CDMA - bits are subdivided in time into many short “chips” with
a designated chip pattern representing a user’s code. This use o f time-domain chips
is typically considered a “1-dimensional” or “ID ” OCDMA system [6-3]. However,
there is a key difference between this OCDMA environment and a traditional
wireless CDMA system that limits optical system performance - wireless CDMA
systems are typically bipolar, with “+ 1” and “-1” transmission chips allowing highly
orthogonal codes [6-4]. However, standard OCDMA systems using amplitude chip
encoding cannot provide a “-1” - light is either present, or absent, and no “-1”
“canceling” chip is available. Thus, a significant drawback to OCDMA technologies
is the necessity o f generating, propagating, and detecting extremely short optical
pulses within a specific detection window (sample time) such that (i) there is
sufficient orthogonality among the user codes and (ii) a sufficiently large number of
users can be accommodated.
One method o f alleviating this concern is to move to a “two-dimensional” (2D)
OCDMA code structure, where bits are subdivided into individual time chips, and
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each chip is assigned an independent wavelength out of a discrete set o f wavelengths
[6-5, 6-6]. This can significantly enhance the number o f active and potential users
within an OCDMA system, however, it can still be quite limiting, particularly in
cases like a LAN, where only a small number of users are transmitting
simultaneously, but a large number o f users must be accommodated. For example, a
codeset using 11 chip times and 4 wavelengths can accommodate 4 simultaneous
users, but only 12 total users. In a transmission system where only a handful of users
are utilizing network resources at once, there is a dire need for increasing the number
of users supported by the OCDMA codeset.
Taking advantage o f the fact that light can be transmitted in two orthogonal
polarization states can lead to OCDMA systems that supposed enhanced user counts.
In the first codeset design, a 2D codeset is developed, and each code is assigned to
two unique users - however, each user is also assigned an orthogonal polarization
state, and the decoder is designed to receive and extract data from only a single
polarization state - this leads to a case where two users, while sharing codes in time
and wavelength, see little interference as the OCDMA decoder due to its polarizing
nature. This technique is sometimes referred to as “polarization diversity” OCDMA,
and is somewhat analogous to polarization division multiplexing, a technique
sometimes used to increase spectral efficiency within optical networks [6-7] This
technique doubles the total number of users supported by the OCDMA system.
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In the second codeset design, orthogonal polarization states are used to design a
“three-dimensional” (3D) (time, wavelength, and polarization) OCDMA codeset.
Chips are assigned a time slot, wavelength, and polarization state - such a 3D user
code uses the two polarization states along with chip times and discrete wavelengths
to uniquely identify users such that each code is sufficiently orthogonal for high
autocorrelation and low cross-correlation. This technique o f polarization coding can
significantly increase the number o f potential users of a system, under the condition
that the polarization states do not overly couple. This condition would hold within a
typical “office” OCDMA LAN environment using newer fiber and components.
In this chapter, a polarization diversity OCDMA system and a true 3D time-
wavelength-polarization encoding and decoding OCDMA system are demonstrated.
In the case o f polarization diversity coding, the same code is assigned to two
different users, and each user is assigned a polarization state. Using a simple
codeset, the data is encoded using a fiber-delay-line encoder and is sent through a
short length of fiber. At the receiver, a user has a polarizer (tuned to his assigned
polarization) and a decoder configured for his specific code, and recovers their data.
Using this technique, OCDMA-encoded data on two different polarizations is
transmitted, and a given user receives only his data (despite the possible existence of
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data using the same code on the orthogonal polarization). This technique results in
less than 2 dB o f system penalty.
In the case o f 3D coding, a 3D codeset is generated where a given user has chips
encoded in time, wavelength, and polarization such that each individual user’s code
is polarization-rotation-invariant with respect to any other user’s code, i.e. the
interference between codes does not increase if two users have a different set of
orthogonal polarizations. This type of coding can increase the number o f potential
users by a factor o f approximately 2K over a conventional 2D code, where “ k ” is the
number o f collisions the codeset will allow. 1 Gbit/s, 11 Gchip/s data is encoded
using ffee-space and fiber delay lines and polarization beam combiners and decoded
using a polarization beamsplitter, wavelength demultiplexers, and additional
fiber/free space delays. Separate electronic decision circuits on each polarization’s
code ensure the existence o f a “1” bit, and the two decisions are then ANDed
together to obtain a final 1 Gbit/s data output. This technique suffers a -1.8 dB
power penalty to receiver sensitivity at 10'9 bit-error-rate.
II. OCDMA CONCEPT
Fig. 6-1 shows a conceptual diagram of an OCDMA LAN system, using a ID
codeset for simplicity. A user that is transmitting data (user #1) to another user (user
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ID encoded
data bit
OCDMA
ICnc odcr
Code #2
______ User #3
Oi DM \ Output noise
decoder ■ ■ ■ • ■
Code #3
User #4
! OC'DMA Output noise
decoder ....
Code #4
User #2
()( DM \ Output bit
^ decoder ...... [ |
Code #2
Data bit
• d ir
User #1
Fig. 6-1. Conceptual diagram of an OCDMA LAN using a ID code. User #1 encodes data intended
for user #2 using a code unique to user #2. The code consists of a number of pulses (“chips”) placed
in specific time subdivisions of the original bit. This data is broadcast to all users on the LAN via a
star coupler, however, only user #2’s decoder can translate the encoded pulses into an output bit - all
other decoders, not knowing user #2’s code, simply see noise.
#2) on the LAN encodes the individual “1” bits into “chips”, which for a ID code are
simple time-divisions o f a bit. For example, a codeset may subdivide a bit into 10
time slots, and a given user’s code will be defined as pulses (called “chips”) existing
within a specific 4 o f those 10 slots. Every user in the system is assigned an
individual code, and the transmitter encodes the data with a code appropriate for the
user for which the data is intended (the “user of interest”). The data is then sent into
the LAN, where a star coupler broadcasts all transmitted data (from every user) to
every other user in the system.
There are two potential outcomes when the data reaches an OCDMA receiver,
depending on whether or not the receiver is for the “user o f interest”, or an
unmatched user. A matching decoder and receiver, corresponding to the user of
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interest, is structured to “stack” the chips on top of one another (essentially
“undoing” the transmitter coding), producing a high autocorrelation peak. After the
receiver, the peak is them sampled during an appropriate sampling window via an
electronic threshold detector, and should it be higher than a predetermined threshold
level, it is considered a received “1” bit. An unmatched decoder, corresponding to
any other user save the user of interest, will rearrange the chip locations, and may
even place one or more chips within the “sampling window,” but will not stack them
all, as a non-matched decoder is configured to fully stack an alternate code. Thus the
decoded signal will not exceed the threshold level during the sampling window, and
the data will be discarded as noise (referred to as “multiple access interference”), and
considered a “0” bit.
There are two general user counts given when classifying an OCDMA codeset - total
users, and simultaneous users. Ideally, a system should be able to have all users
transmitting simultaneously, but as anyone who has received “network busy” on a
cellular phone can attest, the actual number o f users that can be supported
simultaneously within a CDMA system is often significantly lower than the number
of users that are attached to the network. In an optical LAN environment (such as a
large office), the number of potential users (e.g. desks) may be high, leading to a
requirement for a large number of potential users, yet only a few users may be
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transmitting intra-LAN OCDMA traffic at any given time, so the number of
supported simultaneous users required may be moderate.
A key factor that affects the simultaneous and potential user count within an
OCDMA codeset is the collision count. A code collision occurs whenever a user’s
decoder places one or more chips from a non-matched user into the sampling
window. As OCDMA systems are often asynchronous, it is not enough to design a
codeset such that “by default” the codes do not share any common chips - it is
possible, due to the asynchronous nature of such systems, for one code to be time-
shifted with respect to another such that multiple bits (perhaps from more than one
non-matching user) may be stacked by a decoder, resulting in an erroneous positive
threshold level, and a bit error. An example o f code collision for a series o f weight
3, 13 time chip ID codes is shown in Fig. 6-2. In Fig. 6-2(a), two 3-chip codes from
this OCDMA codeset are shown. In Fig. 6-2(b), an example o f a collision is shown
between code #1 and code #2 - note that even though the two codes do not share any
common chips, when time-shifted, there are common chips. Due to the unipolar
nature o f OCDMA systems, it is not possible for asynchronous optical orthogonal
codes (OOCs) to have fewer than one collision. In Fig 6-2(c), a different time-shift
between code #1 and code #2 is shown, and in this case, there are two common
chips. Thus, this codeset would be considered to have a maximum collision
parameter (known as the MCP, or kappa, k ) of 2. k is the maximum number o f
111
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User # 1 code _T1------T I Tl_ _TI I TL — T " L
User #2 code____ T U I 11____" ► ____ R j l ______ T l J = _
----------------------------► ( T 1 . . t ---------
(a) (b) (c)
Fig. 6-2. (a). Two sample ID OCDMA codes with code weight 3 (3 pulses) and 13 possible time
subdivisions, (b). Time-shifting the two codes with respect to each other shows that by shifting code
#2 to the “right” with respect to code #1, there can be a maximum of one code “collision” (common
pulses), (c). Shifting code #2 to the “left” with respect to code #1 shows, for one potential time shift,
two common chips. Thus the maximum collision parameter, k , for this code is 2.
collisions present between any two codes arbitrary codes in the codeset for all
possible time shifts between codes. Increasing k generally decreases the number of
available active users (due to the potential for greater interference between codes at
the decoder), but decreases the number o f total available user codes in the system.
Since a codeset with higher k will often have a greater chance for bit errors resulting
from multiple non-matched user chips being placed within the sampling window by
a decoder, increasing k is rarely a viable option for ID OCDMA systems. This is
important as while the demonstrated polarization diversity codeset always doubles
the total number of users supported by an OCDMA system, the benefit (in terms of
total supported users) o f the 3D OCDMA technique increases with k - while
generally code designers look to create codes with k = 1 , recent work has shown that
codesets can be generated with k > 1 while still maintaining a BER better than 10'9 [6-
8].
III. POLARIZATION DIVERSITY OCDMA CONCEPT AND RESULTS
112
1 I
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The simplest way to increase the potential user count in a ID OCDMA system is to
increase the number o f chips per bit, i.e. subdivide the bit into smaller and smaller
time increments. However, with OCDMA data rates hovering at >500 Mbit/s, even a
reasonable number of time chips leads to extremely short optical pulses - an 80-chip
system at 1 Gbit/s requires 80 Gchip/s, or -12 ps per chip - and such a system with a
code weight (number o f chips per bit) of 3 only supports 13 users - with the
supported user count decreasing as the number of chips per bit increases.
A more common method is to move to 2D OCDMA, where chips are assigned a time
slot and a wavelength out of a set of discrete wavelengths. Each chip is usually
assigned a different wavelength. This increase in code dimensionality can
significantly increase the number of users supported. In addition, the probability of
code collision at the receiver (and thus the probability of error) is often decreased as
chips must not only match in time, but also match in wavelength in order to be
erroneously placed within a sampling window by a decoder. Examples o f uncoded
data and ID and 2D user codes are shown in Figs. 6-3(a-b), respectively. However,
there may still be significant user count restrictions on 2D OCDMA systems - for
example, a system with 11 chip times and 4 wavelengths with a minimum k (1) can
only accommodate 12 users.
113
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Unencoded
input bits
“0”
OCDMA-encoded “1=1001” “0”
bits with [“ T....... 1 1
Chips “ 1 0 0 1 ” 11 M
» »
(a)
^2
X3
« 0 ”
“O ’
*1 12 *3 *4
^1
'W /,
^ 2
^ 3
X4
W a
User 1 - _L
itfi
/y v v w
tl tj t3 t4
(b) (c)
Fig. 6-3. (a). A standard set of NRZ data bits and a ID OCDMA representation of those bits. (b). A
2D (time, wavelength) representation of the data bits shown in (a), (c). A representation of the data
bits shown in (a) using a polarization-diversity coded format - the same code can be used twice,
resulting in a doubling of user capacity.
To alleviate these restrictions, a polarization-diversity codeset is proposed. Such a
code is shown in Fig. 6-3(c), where a given code can be utilized twice, each instance
assigned a polarization state (arbitrarily called parallel, ||, and perpendicular, _L ).
Such an OCDMA setup is similar to a 2D setup, save with additional polarization
control at the transmitter, and the decoder, armed with a polarizer, isolates the
appropriate polarization for the “user of interest”, then stacks the pulses properly to
produce a correlation output. A second user, somewhere within the network, has an
identically setup decoder, but with an orthogonal polarizer, allowing recovery o f any
independent data transmitted to that user. In systems with low polarization coupling,
data intended for a user on one polarization goes unseen by the user assigned the
114
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Coder
Users
1&2
Fiber Link
2 Gbit/s
data out
Polarizer
Decoder
Fig. 6-4. Experimental setup for polarization-diversity OCDMA. Tc = chip time,
same code, but orthogonal polarization. In this way, the user capacity o f the LAN is
doubled.
Fig. 6-4 shows the experimental setup o f the polarization diversity-enhanced
OCDMA system. Four laser sources (Xi - L4) at 1543.40, 1544.23, 1546.85, and
1547.58 nm are combined and modulated with 29-l pseudorandom data at 2 Gbit/s
(10 Gchip/s, as there are 5 time chips in this system). The modulator output is split
into two parts, with one side passing through fiber to decorrelate the two data sets
and prevent coherent crosstalk, and recombined through polarization controllers and
a polarization-beam-combiner (PBC), resulting in the two uncorrelated data paths on
different polarizations. Variable attenuators are included in each polarization path
prior to the PBC to allow either polarization signal to be turned “on” or “o ff’ as
necessary. Data then passes through the OCDMA coder, consisting o f a wavelength
115
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demultiplexer, a set of fiber delay lines, and a 4-to-l coupler, for which the delays
are set to match one o f the two codes. The result is coded data on two different
polarizations. After transmission through a short length o f fiber to emulate a LAN
environment, the “end user” or “user of interest” is reached, where a polarizer
isolates one of the two polarization states (depending on which user's data is to be
received) and the data is then decoded via a fiber-delay-line decoder and converted
to 2 Gbit/s NRZ data using an electrical threshold detector.
The coded data, decoded data, and recovered 2 Gbit/s data (after threshold detection)
for one polarization (user # 1) and when both polarizations (users #1 and #2) are
active are shown in Fig. 6-5. The encoded data bits are shown in Fig. 6-5(a) for the
case o f a single active polarization, and in Fig. 6-5(b) when a second user with an
identical code is active on an orthogonal polarization. Figs. 6-5(c) and (d) show the
data after decoding and polarization isolation (via the polarizer) for the cases o f a
single user and two active polarization states, respectively. Figs. 6-5(e) and (f) show
the recovered 2 Gbit/s NRZ data after threshold detection for the case o f a single
active polarization (Fig. 6-5(e)) or two active polarization states (Fig. 6-5(f)). While
there is some random noise due to minor polarization fluctuation and nonideal
isolation between the polarizations (the polarizer used in this experiment had a
maximum isolation of -2 0 dB) the decoded data is clear, and the received data is
error-free after threshold detection. Due to the low transmission distances, the
116
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(a) (b)
'*1 n
A
f t is
rv
11 I 1 ,
1' 1' 1 1 1
i
i
i n f
■ I
r
i
I
' d l i
i
1
i
, 11 1 !
{ \i
i :
, ! ■
y sj
V V :
(d)
' (
r , ■
*
i ' l l
■ 1 i
1 ih 'i i
!""" !
1 1 i
i i
1 i :
1 1
1 ! ! |
V ' !
Vj Si
i V ' i
s
S
V i 1 1 ,
*. i S * .;
. 1 1 I' 1
: : v
I, 1 ll 1
. ! V.
h
f \
i 1 |
1 i ,
i •' i
i
| , , r . !
■ i !
i
i i M i
: i ;
' i li i i
i ' ll
l
- U -
: x
1 ' l ,
(e) (f)
(a), (c), (e) - Single user (one polarization) (b), (d), (f) - Two users (both polarizations)
Fig. 6-5. (a) Encoded series of bits for a single-user (single polarization active), (b). Encoded series
of bits when both polarizations are active, (c). OCDMA decoded bits for a single active polarization,
(d). OCDMA decoded bits when both polarization states are active - additional noise is present due
to polarization leakage, (e). Output 2 Gbit/s bits after threshold detection for the case of a single
active polarization, (f). Output 2 Gbit/s bits after threshold detection for the case of both
polarizations active.
polarizations remained stable over time and polarization tracking was unnecessary,
with no polarization controller retuning required.
The bit-error-rates for the system for user 1 and when user 1 and user 2 (both
polarizations) are active are shown in Fig. 6-6. The penalty when both polarizations
are active is ~2 dB, resulting from nonideal isolation between the two polarizations
and random polarization fluctuation caused by the large wavelength spacing
(required due to limitations o f the demultiplexers used).
117
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a :
lu 5
m
o 7
i
10
4
3
8
-9.5 -9 -8.5 -8 -7.5 -7 -6.5
Received Optical Power (dBm)
Fig. 6-6. Bit error rates for the polarization-diversity OCDMA system with one polarization on, and
with both polarizations (users 1&2) active. Total penalty is <2 dB when both polarizations are active.
IV. 3D OCDMA CONCEPT
Regardless o f the construction of the original codeset, the application o f polarization
diversity to an OCDMA codeset can do no more than double the total number of
supported users - this means that a system with 11 chip times and 4 wavelengths can
support 24 users under this code construction, compared to 12 users in a 2D system.
While this is an improvement over traditional 2D approaches, it is significantly lower
than the number of users that may be present in the average optical LAN
environment.
118
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■ = * • 1 2 I 4 c
*V *1 t2 t 3 t4 Collisions in codeset
(a) (b)
Fig. 6-7. (a). A 3D (time, wavelength, polarization) representation of data bits. (b). Increase in total
supported users (compared to a 2D OCDMA system) as the maximum collision parameter, k , of a 3D
codeset increases.
To further expand the supported user count, we add a third dimension, that of
polarization, to the codeset. An example of data encoded using a 3D code is shown
in Fig. 6-7(a). Each chip in a code is assigned a time slot, a wavelength, and one of
two orthogonal polarization states. The probability of code collision is again reduced
as non-matched user chips must match in time, wavelength, and polarization to be
placed within a sampling window. This increase in dimensionality allows a
significant increase in the number of supported users. This increase, compared to a
2D system with the same number o f chip times and wavelengths, is estimated in Fig.
6-7(b), and is roughly equal to 2K , where k is the maximum collision parameter for
the codeset. Table 6-1 shows some results of code 2D and 3D code generation for
identical constraints (other than code dimensionality). This table shows that a 2D
codeset with 10 chip times, 15 wavelengths, a code weight (number o f chips) o f 10,
and a k o f 1 can support a total of 24 users, while a 3D codeset with similar
constraints can support 49 - more than double the total supported users. Increasing
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Table 6-1: Users supported by 2D and 3D OCDMA codesets for identical constraints
t (# of
chip
times)
A (# of
wavelengths)
w (code
weight)
k (code
collisions)
2D users
supported
3D users
supported
10 15 10 1 24 49
10 15 10 2 447 1843
20 30 25 1 28 58
20 30 25 2 777 3116
the collision parameter k to 2 allows the 2D code to support 447 users, while the 3D
code can support more than 1800 users - a more than four-fold increase (but roughly
equivalent to 2K = 4).
This technique for code generation is not equivalent to polarization diversity coding.
An example o f two user codes for polarization diversity OCDMA is shown in Fig. 6-
8(a). Two users are assigned identical codes, save for the polarization state on which
the code is transmitted. Two “true-3D” OCDMA user codes are shown in Fig. 6-
8(b), with all chips spread between both polarization states. Polarization diversity
coding can achieve a roughly twofold increase in the number o f users supported by a
system (but cannot achieve the >2K increase possible via 3D coding), however,
security is severely compromised, as a user need only rotate the polarization of
incoming light by 90 degrees in order to decode data intended for a different user.
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(a) (b)
Fig. 6-8. (a). Two user codes in a polarization diversity OCDMA system. A given user only has
pulses on a single polarization, (b). Two user codes in a 3D OCDMA system. Users have chips in
both polarization states.
V. 3D OCDMA SETUP AND RESULTS
A “black box” experimental setup for the 3D OCDMA system is shown in Fig. 6-9.
The code used was an 11 chip, 4 wavelength, weight 4 (per polarization), k = 1 code
that can support 12 users (2 simultaneous) in a 2D system but 25 total users (4
simultaneous) in this 3D system. The user code for this transmission experiment is
shown in Fig. 6-9. A key advantage o f this codeset is that it is polarization-rotation-
invariant between users - while it is necessary for a given user’s receiver to be able
to lock on to its orthogonal polarization states (perhaps using a subcarrier to do
polarization tracking, or simply using a test signal when a network control system
assigns a code, as polarizations within the short-distance LAN structure generally
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Sample time
”'|j|-"Threshold X
1 ! Match
Threshold ||
Sample time
Fig. 6-9. A “black box” experimental setup for our 3D OCDMA transmission system. A data bit is
encoded using the 11-chip, 4-wavelength, weight 4 (per polarization) code shown in this figure,
transmitted at 11 Gchip/s (1 Gbit/s) through a small length of fiber (< 1 km) and a star copier to
emulate a LAN environment, then sent to the decoder, where it is reassembled into a bit. The
“encoder” and “decoder” branches are explained in detail in later figures.
remain stable), there is no requirement that all users’ codes use identical polarization
axes. The code is designed such that the number of common chips at the receiver
between users remains constant regardless o f the alignment o f their polarizations,
ensuring a constant BER (i.e. the effects of interference from other users will remain
approximately the same regardless o f the alignment o f their polarization axes).
A close-up look at the transmitter/encoder setup for a single user is shown in Fig. 6-
10(a). Lasers at four wavelengths (1554.8, 1555.6, 1556.4, and 1557.2 nm) are
coupled together and modulated at 11 Gchip/s (1 Gbit/s, as we have 11 chips per bit)
with a 29 -l pseudorandom bit sequence. The now-synchronous and, as a result o f the
modulator, identically-polarized, 4 wavelengths are then split into two branches
using a coupler, as shown in Fig. 6- 10(a). The upper branch is sent to the
“perpendicular” polarization OCDMA encoder, while the lower branch is sent to the
122
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1554.8
A < 2
1555.6
««((((•
11 Gc
JL encoder
► 4 MOD <
..
encoder
1556.4
<«««•
1557.2
^Fig. 7-10(b)
0 - r T° coupler
^ F i g . 7-10(d)
Fig. 7-10(c)
(a)
1 1 ±
A » « | A # 2 ^
A A A A J ^ V V —V ,
X 2^X 1 V w ^ ^ » 4 X3 X j X1
- - - - - - - - - - - - - - - - - - - - - - - - - M I I I I I I I I
(b), top, and (c), bottom (d)
Fig. 6-10. (a). Experimental setup for the 3D OCDMA encoder. Four lasers are combined,
modulated, and then each polarization is encoded using a set of fiber and ffee-space delay lines, (b).
An encoded data bit on the perpendicular polarization state. The 4 pulses, each at a different
wavelength, are placed according to the code shown in Fig. 5. (c). An encoded data bit on the
parallel polarization state, (d). The signal when the encoded data on the two polarization states are
combined using a polarization beam combiner.
“parallel” polarization OCDMA encoder. The wavelengths in each branch are then
demultiplexed, and a series o f fiber delay lines are used to place chips in the proper
locations, according to the user code shown in Fig. 6-9. After encoding, the
wavelengths are coupled together to create the two (perpendicular and parallel)
123
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encoded signals. The encoded perpendicular signal is shown in Fig. 6-10(b), while
the encoded parallel signal is shown in Fig. 6- 10(c). Note that due to the code
weight o f 4 per polarization, each signal consists of 4 pulses, each at a different
wavelength. The two signals are then combined using a polarization beam combiner
to ensure that they are on orthogonal polarization states. The combined 3D-
OCDMA-encoded signal is shown in Fig. 6- 10(d). The signal is then sent to a star
coupler and a short length of fiber (no more than one kilometer) to emulate the losses
and short transmission distances that may occur in an actual OCDMA LAN
environment.
A close-up look at the 3D OCDMA decoder/receiver is shown in Fig. 6-11(a). After
the star coupler, the signal passes into a polarization controller, then to a polarization
beam splitter that decomposes the signal into the two polarization components. In an
actual system, polarization calibration may be necessary prior to system activation in
order to properly adjust the polarization controller. Within each branch decoder, the
signals are first amplified (the polarization “scrambling” that often occurs in EDFA
devices does not affect the signals here as the polarizations have already been
separated, and polarization is no longer relevant) the wavelengths are demultiplexed,
and optical fiber and ffee-space delay lines are used to align the chips for each
polarization in time according to the code shown in Fig. 6-9. After the delay lines,
the wavelengths are coupled back together and the decoded signals in each
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► Fig. 11(b)
wma
± decoder
Output
decoder
Q I
Polarization
msso9 t
beam sputter
From
coupler
(b)
♦Fig. 11(d)
(c)
m
"Threshold
► Fig. 11(c) detector
L i u l u ju l^ d L
(d)
r
r
(a)
»t
Fig. 6-11. (a). Experimental setup for the 3D OCDMA decoder. The two polarization codes are split
using a polarization beam splitter, and each are independently decoded, then sent to individual
receivers and threshold detectors. After threshold detection, the two signals are ANDed together to
produce a 1 Gbit/s NRZ output, (b). A series of decoded 1 Gbit/s data bits on the perpendicular
polarization, (c). A series of decoded 1 Gbit/s data bits on the parallel polarization, (d). The same
series of data bits after both polarizations are threshold detected and ANDed together - the resulting
output is 1 Gbit/s NRZ.
polarization branch are sent to individual receivers. A series of decoded bits for the
“perpendicular” decoder (as showing a single decoded bit is rather uninteresting) are
shown in Fig. 6-11(b). The same series of decoded bits, with the chips stacked, for
the “parallel” decoder is shown in Fig. 6-11(c). After the receivers, the two signals
are synchronized and send to individual electronic threshold detectors with the
threshold level set to slightly above the power level of 3 chips (such that only a set of
properly-stacked 4 chips will register above threshold). The threshold detectors
serve two functions - first, they ensure that only properly decoded signals (or signals
with high MAI, in the case of multiple active users) register as “ 1” bits, and second,
they turn the short pulses that result from stacking the 11 Gchip/s chips into a 1
125
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A _ L w/both active
■ || w/both active
♦ Combined
4 ■
-1.8 dB
5 -
• || with _ L off
^ ■ -L with || off
9 ■ 1 1
-10 -9 -8
Receiver power (dBm)
-7 6
Fig. 6-12. Power penalty plot for the 3D OCDMA system. Total penalty is 1.8 dB when both
polarizations for a given user of interest are active.
Gbit/s NRZ output data stream. The decoded and threshold-detected NRZ output
stream is shown in Fig. 6-11(d).
Power penalty plots are shown in Fig. 6-12. The total power penalty to receiver
sensitivity o f this system is -1.8 dB compared to the back-to-back receiver
sensitivity at 10-9 bit-error-rate, arising mostly from losses due to coding and the
slight polarization leakage from components in the system. Included are the receiver
sensitivity plots for each polarization separately after decoding (with the other
polarization inactive), the curves for each polarization’s encoder and decoder setup
when both polarizations are active, and the curve for the final 1 Gbit/s data after
ANDing the two decoded/thresholded data streams together. To ensure a balanced
BER, the optical attenuator was placed prior to the polarization-beam-splitter. The
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Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
differences in sensitivity between the polarizations result from the lack o f two
identical receivers available for the two decoder branches.
While this technique may be ideal for a LAN environment in which polarization
mode dispersion is minimal, it may be less appropriate in the presence o f large
amounts o f instantaneous differential-group-delay (DGD) due to the wavelength
spacing o f our demultiplexers. Each channel in this 3D system will rotate in
polarization relative to a reference channel by an angle equal to 7 t*APDGD, where
Af is the frequency spacing between the channel and the reference. As the DGD
increases, wavelengths may rotate into orthogonal polarization states, increasing the
error rate (and possibly inducing coherent crosstalk with identical wavelengths on
the other polarization). This effect may be reduced by minimizing the wavelength
spacing. For longer transmission distances, chromatic dispersion (a severe limitation
in 2D OCDMA systems as well [6-9]) may also limit the system.
VI. SUMMARY
There has been significant recent renewed interest in multi-user optical LAN
environments. However, CDMA data coding, widely used in electronic and wireless
networks that must support large numbers of users (yet only a handful
simultaneously), is less efficient in optical networks due to the unipolar nature of
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OCDMA codes. ID (time-domain) OCDMA networks are limited in their ability to
support large numbers of users due to the necessity of generating extremely short
optical pulses. For this reason, 2D OCDMA data coding (utilizing both time and
wavelength) has become a topic of recent research interest, reducing the probability
of collision while simultaneously increasing the number o f supported users in the
system. However, even 2D codesets may not support enough users for large-scale
office LANs.
To alleviate this problem, two potential code constructions are demonstrated
experimentally - first, a polarization-diversity OCDMA codeset that doubles the
number o f supported users in a network. To demonstrate the feasibility o f this
OCDMA system, 2 Gbit/s, 10 Gchip/s data is encoded and transmitted through a
simulated OCDMA LAN system. Data for a single user is isolated via a polarizer,
and recovered with less than 2 dB power penalty. Second, a 3-dimensional OCDMA
system that uses time, wavelength, and polarization as degrees o f freedom within the
codeset. This type of coding can increase the number of potential users by a factor
of approximately 2K over a conventional 2D code, where “ k ” is the number of
collisions the codeset will allow. To demonstrate this system, 1 Gbit/s, 11 Gchip/s
data is coded with an 11 chip, 4 wavelength, weight 4 (per polarization) code and
transmit through a star coupler and short length of transmission fiber. Encoding is
accomplished via ffee-space and fiber delay lines and polarization beam combiners,
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while decoding is done using a polarization beamsplitter, wavelength demultiplexers,
and additional fiber/free space delays. After individual threshold detectors, the two
orthogonal polarization outputs are combined with an AND gate to obtain a 1 Gbit/s
NRZ output data stream. Data is encoded, decoded, and recovered with only a 1.8
dB power penalty.
129
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REFERENCES
[6-1] A. Stok and E. H. Sargent, “Lighting the local area: optical code-division-
multiple-access and quality of service provisioning,” IEEE Communications
Magazine, vol. 40, no. 6, pp. 42-46, 2000.
[6-2] C. F. Iam, “To spread or not to spread - the myths o f optical CDMA,” Conf.
on Optical Fiber Communication (OFC) 2001, vol. 2, pp. TuV6-l - TuV6-3, 2001.
[6-3] P. Azmi, M. Nasiri-Kenari, J. A. Salehi, “Low-rate super-orthogonal channel
coding for fiber-optic CDMA communication systems,” IEEE/OSA Journal o f
Lightwave Technology, vol. 19, no. 6, pp. 847-855, 2001.
[6-4] S. S. Kolahi, “Comparison of fixed networks versus wireless CDMA
networks,” IEEE International Conf. on Personal Wireless Communications 2002,
pp. 115-119, 2002.
[6-5] L. Tancevski, I. Andonovic, M. Tur, and J. Budin, “Massive optical LANs
using wavelength hopping/time spreading with increased security,” IEEE Photonics
Technology Letters, vol. 8, no. 7, pp. 935-937, 1996.
[6-6] H. Fathallah, L. A. Rusch, and S. LaRochelle, “Passive optical fast frequency-
hop CDMA communications system,” IEEE/OSA Journal o f Lightwave Technology,
vol. 17, no. 3, pp. 397-405, 1999.
[6-7] Y. Frignac, G. Charlet, W. Idler, R. Dischler, P. Tran, S. Lanne, S. Borne, C.
Martinelli, G. Veith, A. Jourdan, J.-P. Hamaide, and S. Bigo, “Transmission o f 256
wavelength-division and polarization-division multiplexed channels at 42.7 Gb/s
(10.2 Tb/s capacity) over 3x100 km o f TeraLight fiber,” Conf on Optical Fiber
Communication (OFC) 2002, pp. FC5-1 - FC5-3, 2002.
[6-8] P. Saghari, R. Omrani, A. E. Willner, and P. V. Kumar, “Analytical
Interference Model for 2-Dimensional (Time-Wavelength) Asynchronous O-CDMA
Systems,” C onf on Optical Fiber Communication (OFC) 2004, paper FG7, 2004.
[6-9] C. Zuo, W. Ma, H. Pu, and J. Lin, “The impact o f group velocity on
frequency-hopping optical code division multiple access system,” IEEE/OSA Journal
o f Lightwave Technology, vol. 19, no. 10, pp. 1416-1419, 2001.
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Chapter VII - Conclusion
The ever-increasing demand for bandwidth by consumers, industry, and government
may overtax existing electrical component-based networks. Large-scale electrical
networks generally consist of a spiderweb interconnection o f independent core
network nodes crisscrossing the globe. Connected to these core network nodes are
smaller “edge” nodes, which aggregate data for transmission through the high-speed
network core.
At each core node in such a network, an electronic router is present, responsible for
the recognition, updating, routing, and forwarding o f incoming data packets.
Electronic routers, while having made tremendous progress in the past decade, are
still generally bulky, have a large footprint, consume a large amount o f energy, and
cannot always accommodate high bit rate packets (leading to packetloss) or high
throughput rates (leading to higher latency as packets are buffered, or packetloss
when buffers overflow).
Optical fiber spans the sometimes significant distances between core network nodes.
When compared to coaxial cable, optical fiber has significantly lower loss and can
simultaneously sustain significantly higher data transmission rates. Thus the “core
network” is a collection of electronic routers - limited in throughput, bit rate, and
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data capacity, connected by lengths (sometimes thousands o f kilometers long) of
low-loss and high-bandwidth optical fiber.
An often-posed research question is thus whether or not it is possible to push the use
o f optics into the routers themselves, removing the need for optical-electronic-optical
conversion at each routing node - the goal being to take advantage o f the bandwidth
and lower power consumption available within optical fiber. An additional question
is where to place such optical components - within only the data plane (the path that
all packets take when traversing a routing node, which can consist o f header
updating and data signal regeneration), or within both the data and control (the
higher-level functions o f the router, such as header recognition and packet contention
resolution) planes. In this dissertation, a number of control and data plane functions
necessary for enabling an optical router were introduced, and a number o f modules
that addressed many o f these functions were proposed and demonstrated.
In the control plane, some key issues are header recognition, contention resolution,
data synchronization, error checking, and signal quality monitoring. To address the
problem of optical header recognition, a module was proposed to perform grating-
based optical correlation for header recognition. To allow for long packet addresses,
which can lead to unrealistically large optical correlators, a system was proposed that
included an “optical bypass”, where an algorithm is used to determine the most
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frequent destinations for traffic, and determines a subset o f the total number of
header bits (between 4 and 10) that can be used to uniquely identify a router output
port. Optical correlators are used to determine whether or not there is a match to
these common addresses, and packet headers that do not match any o f the common
destination addresses are routed via conventional electronics. In one system
implementation, lithographic techniques were used to create single-wavelength
correlators out o f fiber Bragg gratings (FBGs) that can be easily scaled to high data
rates, and these correlators were used to route data packets to switch ports based on
whether or not the packet headers matched a predetermined header. These
correlators could be thermally tuned via computer control, making them ideal for
integration within a router where the routing table may change multiple times per
day. In a second implementation o f a header recognition module, multi-wavelength
correlators, suitable for WDM networks, were constructed using sampled FBGs.
Sampled FBGs have a superstructure built into the index profile o f the grating,
resulting in reflection peaks at multiple wavelengths. These correlators were used to
construct a WDM header recognition system, where packets on two wavelengths
were simultaneously recognized and each packet switched independently depending
on whether or not their headers match a predetermined correlation pattern. These
gratings could be easily tuned via stretching.
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For contention resolution, a module was demonstrated that implemented a 3-input
optical AND gate. Within the control plane, an AND gate can be used to determine
whether or not there are too many packets (in this case, 3) arriving at one time to a
network node. While cascaded 2-input gates can be used to obtain such information,
previously demonstrated 2-input optical gates can significantly degrade signal
quality, thus higher-input gates are desirable. Using a periodically-poled lithium-
niobate (PPLN) waveguide, two pump signals and a probe were combined to create a
A,-shifted output signal, for which a ‘1’ bit was present only when ‘1’ bits were
present on all three inputs (both pumps and the probe). A significant advantage of
this gate over other demonstrated 2-input gates was its negligible penalty to optical
signal quality. Such a gate can also see significant application to control plane
header recognition, and in the expansion of optical half adders to full adders.
Within the data plane, key problems mostly involve the changes that packets
typically undergo at each node within a network. These include decrementing the
time-to-live (TTL) value within a packet header, updating the checksum within a
packet header, and the coding of optical data for LAN environments. These are
problem already addressed within the electrical domain, but that have, to date, been
difficult in the optical domain. To address the problem o f the TTL, an optical TTL
decrementing module employing semiconductor optical amplifiers (SOAs) and
PPLN waveguides was constructed and demonstrated. This module used an SOA to
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create an inverted copy o f the original packet TTL field data, and two PPLN
waveguides to meld the original TTL field with the inverted copy. This
“decrementing via inversion” method yields a TTL-decremented output packet for
which the packet payload (and, indeed, the rest o f the header) are unchanged. This
module also detected whether or not the input packet had a TTL value o f zero, and
dropped the packet in such a case.
While updating a packet checksum optically is a problem o f as o f yet unsolvable
complexity, there has been progress made on the building blocks that can lead to the
creation o f a checksum module. One such building block was demonstrated, that of
an optical half-subtracter/adder. This module can actually simultaneously be applied
as a building block towards solving the problems of TTL decrementing (which
requires subtraction) and checksum computation (which requires addition). The
optical half-subtracter/adder module was constructed using two SOAs and a single
PPLN waveguide. The two SOAs were used to generate ‘Difference/Sum’ (which
are identical) and ‘Borrow’ signals using cross-gain modulation, while the PPLN
waveguide generated the ‘Carry’ signal required for AND operation using
difference-ffequency generation.
To address the problem o f applying “optics to the desktop” within a fiber optic LAN,
one significant problem is that the bandwidth granularity within typical optical
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networks is on the order of at least 2.5 Gbit/s (a single wavelength), and often higher
(modem networks routinely operate at 10 Gbit/s per wavelength or beyond).
However, it is impractical to assign desktop users a single wavelength, as few would
use many gigabits of bandwidth. Thus, protocols that can divide the high bandwidth
available from optics into manageable chunks for LAN environments must be
produced. One such solution is optical code-division multiple-access (OCDMA),
where every user is assigned a code, and can only decode data that is encoded using
their code sequence. While common, and indeed quite efficient, in electrical
networks, OCDMA has a fundamental limitation - while in electronics, voltage
encoding allows ‘+ 1’ and ‘-1’ pulses (or no pulse at all, for a ‘0’), optical amplitude
encoding can detect either the presence o f light, a ‘+1 ’, or no light at all, a ‘O’ - there
is no corresponding ‘-1’ pulse, leading to a severe restriction in the number of
available user codes. To alleviate this restriction, a three-dimensional time-
wavelength-polarization OCDMA scheme was proposed, and a sample system
demonstrated using a 3D code. Such a codeset can result in user counts significantly
higher than even two-dimensional OCDMA codesets.
The “all-optical core packet-switched network” is not yet a reality, and networks
today continue to use electronic routing, with fiber connecting core network
elements, and optical-to-electronic-to-optical conversion at each network node.
However, the technology for moving toward an optical network core is progressing -
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passive optical networks (PONs), similar to circuit-switched telephone networks, are
seeing some initial application in areas where wavelength channels need not be
switched rapidly. Optical burst switching is seen as a promising “go-between”
technology, allowing a move toward an optical data plane, with a protocol designed
such that packets are unchanged at each core node, with an electronic control plane
(albeit with substantially larger packets than standard packet-switched networks).
These emerging technologies demonstrate that the demand for bandwidth is indeed
leading a push for greater application of optics to routing. The end result may likely
be a router with a fully optical data plane, with a hybrid, integrated optical/electronic
control plane. Further research into how to properly recognize headers, resolve
contention between packets, decrement the TTL, and push fiber to the desktop will
be necessary before such a router can be realized. Additionally, research into
integrated optics, optical signal processing, network protocols, and optical/electronic
networks and functions is necessary to reach this goal - and collaboration between
device, systems, communications, and network designers will be necessary before
such a network can be realized. However, as the demand for bandwidth continues to
double each year, it is quite likely that continuing research will soon make a reality
o f the optical data plane, hybrid control plane, packet-switched network.
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Asset Metadata

Creator McGeehan, John Edward (author)

Core Title Experimental demonstration of optical router and signal processing functions in dynamically reconfigurable wavelength-division-multiplexed fiber -optic networks

School Graduate School

Degree Doctor of Philosophy

Degree Program Electrical Engineering

Publisher University of Southern California (original), University of Southern California. Libraries (digital)

Tag engineering, electronics and electrical,OAI-PMH Harvest,physics, optics

Language English

Contributor Digitized by ProQuest (provenance)

Advisor Willner, Alan E. (committee chair), Bickers, Eugene (committee member), Choma, John (committee member), Kuehl, Hans H. (committee member)

Permanent Link (DOI) https://doi.org/10.25549/usctheses-c16-448786

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Identifier 3196854.pdf (filename),usctheses-c16-448786 (legacy record id)

Legacy Identifier 3196854.pdf

Dmrecord 448786

Document Type Dissertation

Rights McGeehan, John Edward

Type texts

Source University of Southern California (contributing entity), University of Southern California Dissertations and Theses (collection)

Access Conditions The author retains rights to his/her dissertation, thesis or other graduate work according to U.S. copyright law. Electronic access is being provided by the USC Libraries in agreement with the au...

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Repository Location USC Digital Library, University of Southern California, University Park Campus, Los Angeles, California 90089, USA