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Integration of assembly planning and scheduling in electronics manufacturing operations
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Integration of assembly planning and scheduling in electronics manufacturing operations
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INFORMATION TO USERS This manuscript has been reproduced from the microfilm master. UMI films the text directly from the original or copy submitted. Ihus, some thesis and dissertation copies are in typewriter face, while others may be from aiy type of conq)uter printer. The qnaliQr of this reproduction is détendait upon the qnali^ of the copy submitted. Broken or indistinct print, colored or poor quality illustrations and photographs, print bleedthrough, substandard margins, and inçroper alignment can adversefy affect reproduction. In the unlikely event that the author did not send UMI a complete manuscript and there are missing pages, these will be noted. Also, if unauthorized copyright material had to be removed, a note will indicate the deletion. Oversize materials (e.g., maps, drawings, charts) are reproduced by sectioning the original, beginning at the upper left-hand comer and continuing from left to right in equal sections with small overlaps. Each original is also photographed in one exposure and is included in reduced form at the back of the book. Photogrs^hs included in the original manuscript have been reproduced xerographically in this copy. Higher quality 6 " x 9 " black and white photograq>hic prints are available for aigr photographs or illustrations ^jpearing in this copy for an additional charge. Contact UMI direct^ to order. UMI A Bell & Howell Information Company 300 North Z ee b Road. Ann Arbor. M l 48106-1346 USA 313.'761-4700 800/521-0600 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. INTEGRATION OF ASSEMBLY PLANNING AND SCHEDULING IN ELECTRONICS MANUFACTURING OPERATIONS by Alireza Azmandian A Dissertation Presented to the FACULTY OF THE GRADUATE SCHOOL UNIVERSITY OF SOUTHERN CALIFORNIA In Partial Fulfillment of the Requirements of the Degree DOCTOR OF PHILOSOPHY (Industrial and Systems Engineering) August 1995 Copyright 1995 Alireza Azmandian Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. UMI Number: 9614008 UMI Microform 9614008 Copyright 1996, by UMI Company. All rights reserved. This microform edition is protected against unauthorized copying under Title 17, United States Code. UMI 300 North Zeeb Road Ann Arbor, MI 48103 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Acknowledgements I would like to start with the name of God, who is the greatest, and who I believe is the one that made this work possible. I would like to express my deepest, heartfelt thanks to Professor Behrokh Khoshnevis, who acted not only as a superb thesis advisor, but also as a warm and caring friend and confidant. His constant encouragement and concern helped me overcome many obstacles and persevere in my research. I feel very fortunate to have been given the gift of his guidance. I would like to express my sincere gratitude to my committee members. Professor Maged Dessouky and Professor Massoud Pedram for their valuable inputs and participation in this work. Thanks also, to Professor G. Nadler, Professor A. Ghafarian, Professor G. Bekey and Professor D. Belson for their insightful comments and recommendations. I am also indebted to Professor Geza Botthk and his colleagues in the Xerox Corporation who participated in this research and familiarized me with the advanced technology used in the electronics manufacturing industry. His guidance and input in this research is greatly appreciated. Special thanks to my friend, Professor Najmedin Meshkati who greatly encouraged me to persevere in my efforts in accomplishing this research. Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. I would also like to give thanks to the Ministry of Culture and Higher Education of Iran for giving me a scholarship to continue my education. Furthermore, I would like to thank Dr. Behrokh Khoshnevis for offering me a research fellowship which was financially supported by the Institute for Manufacturing and Automation Research (IMAR) and the National Science Foundation. I would also like to thank the d^artment of Industrial and Systems Engineering at USC for their financial assistance. These contributions are greatly appreciated and invaluable to my research. Ill Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Dedication This book is dedicated to the people of my country, IRAN, who sacrificed their lives during the revolution and the imposed war. They endured the worst circumstances while exemplifying perseverance, patience, and faith in God. This work is also dedicated to their children, some of whom are now fatherless. This resilience and endurance has always inspired me. I always look for the opportunity to go back and serve my people. To Dr. Azam Bakhtiarian Azmandian, my wife, companion, and friend. Without her dedication and encouragement, I could have never reached my goal. To my children Fatemeh and Mahdi, who have helped us understand the meaning of love and the spirit of giving. To my father, Abbas Azmandian, who always believed in a good education and a strong moral character. To my mother, Fatemeh Azmandian, who devoted her life towards raising her children as moral individuals. To my brothers, Mohammad Taghi and Kazem, and my sisters, Esmat, Effat, and Azam who always loved and believed in me. I would like to recognize my father-in-law and mother-in-law, Mohammad Hussein Bakhtiarian and Nayereh Hashemi for their support. Also to my cousin Alireza Tabesh who provided me much needed support when I first arrived in the United States. His guidance made my life in America easier. I will always be indebted to him. IV Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table of Contents Acknowledgements....................................................................................................ü D edication.............................................................................................................. iv Abstract......................................................................................................................xii INTRODUCTION....................................................................................................1 1.1 Problem Statement ............................................................................... 3 1.2 Contributions..........................................................................................5 1.3 Organization of Dissertation ................................................................ 6 1.4 The Research Plan ............................................................................... 7 BACKGROUND...................................................................................................... 8 2.1 Process Planning.................................................................................... 8 2.1.1 Variant Approach.................................................................. 9 2.1.2 Generative Approach...........................................................11 2.1.3 Automatic Approach..............................................................13 2.1.4 Existing Intelligent Process Planning Systems ..................14 2.2 Scheduling............................................................................ 17 2.2.1 Existing Intelligent Scheduling Systems............................ 19 2.3 Assembly Planning........................................................................22 2.4 Concurrent Engineering.................................................................... 22 2.5................Summary ............................................................................23 ELECTRONICS MANUFACTURING................................................................25 3.1 Introduction......................................................................................... 25 3.2 Characteristics of Electronics Manufacturing....................................26 3.2.1 Component Types.................................................................. 27 3.2.2 Automatic Insertion................................................................27 3.2.3 Parts Insertion Machines.......................................................28 3.2.4 Machine Characteristics and Layout ...................................29 3.2.5 Universal Technological Constraints...................................31 3.2.6 Automated Assembly in Electronics Manufacturing 32 3.3 Assembly Planning in Electronics Assem bly....................................33 3.3.1 Computer Aided Assembly Planning in Electronics Assembly ............................................................................................34 3.3.2 Surface Mount Technology (SMT) ....................................35 3.4 Artificial Intelligence and Expert Systems in Electronics Manufacturing .........................................................................................................35 3.5 Summary ............................................................................................ 37 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. DESIGN OF THE INTEGRATED SYSTEM ........................................................ 39 4.1 Introduction............................................................................................ 39 4.2 Comparison of the Current Planning and Scheduling Approach with the Integrated System .............................................................................40 4.3 Specification of the Focused Factory Plan............................................42 4.4 Methodology......................................................................................... 42 4.5 System Description............................................................................... 44 4.5.1 Knowledge Representation in the Proposed System .... 46 4.6 Simultaneous Planning and Scheduling (SPS) Algorithm ................48 4.7 Measure of Performance ...................................................................49 4.8 An Example ......................................................................................... 50 4.9 Evaluation of Preliminary Results........................................................ 55 4.10 Summary ......................................................................................... 59 MATHEMATICAL MODEL OF THE INTEGRATED PLANNING SYSTEM 60 5.1 Vector Characterization of the Planning System ..............................60 5.1.1 Kroncker Product of Two Boolean Vectors; ........................62 5.1.2 Definition of "Break Point" in Boolean Vector of Bd: . . . 63 5.1.3 "Norms" of Defined Boolean Vectors:..................................63 5.1.4 Other Definitions:................................................................ 65 5.1.5 Definition and Properties of Suggested Function (Î:...........65 5.2 Mathematical Definition of Qualifying Factor : Q F .............................66 5.3 Generation of Basic Assembly Plans Using p * Function..................... 66 5.4 Properties of the Integrated System .................................................67 5.6 Summary ..............................................................................................68 SIMULTANEOUS PLANNING AND SCHEDULING SYSTEM USING A MATHEMATICAL MODEL ..................................................................... 69 6.1 Introduction............................................................................................ 69 6.2 Overall System Description...................................................................70 6.2.1 Preplanning Operations ........................................................ 71 6.2.2 Scheduling Operations...........................................................72 6.3 System Capabilities and Functions ......................................................72 6.3.1 Random Job Generation in the SAPS System.......................73 6.4 Implementation of the Simultaneous Planning and Scheduling Concept Using the SAPS System ................................................................ 74 6.5 Summary ...............................................................................................88 CONCURRENT CONSIDERATION OF PLANNING AND SCHEDULING COST ATTRIBUTES IN THE INTEGRATED SYSTEM.....................................89 7.1 Introduction............................................................................................89 VI Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 7.2 A Cost Model for the Integrated System............................................ 90 7.3 Conversion of Qualifying Factor (QF) into a Compatible Cost Factor ..........................................................................................................91 7.4 A Heuristic Solution for the Opportunistic Planning Approach .... 92 7.5 The Graph Theory and its Application in a Scheduling Problem . . . 94 7.5.1 Terminology................................................... 94 7.5.2 Hamiltonian Graphs ............................................................95 7.5.3 Application of Graph Theory in Sequence Dependent Scheduling Problem s................................................................................96 7.6 Graph Representation of the Integrated System Using the Cost Model ............................................................................................................ 96 7.7 Formation of the Cost Matrix ......................................................... 100 7.8 The Shortest Hamiltonian Path Algorithm for the Integrated System 101 7.8.1 Minimum Spanning Tree Algorithm ................................ 102 7.8.2 Minimum Cost Perfect Matching .................................... 104 7.9 Implementation of Simultaneous Planning and Scheduling Concept Using the Cost Model (C-SAPS)................................................ : . . . . 104 7.9.1 Results of Simulation in C-SAPS .................................... 105 7.9.2 The Role of Lateness Cost with Respect to Other Costs 112 7.10.1 The Window S iz e ........................................................... 113 7.10.2 The Concurrent Assignment Algorithm within the Time Window............................................................................. 116 7.11 Implementation of Simultaneous Assembly Planning and Scheduling 118 7.12 The Effect of Window Size........................................................... 124 7.13 Comparison of the Time Window and the Opportunistic Planning Approach ..................................................................................... 131 7.14 Summary ....................................................................................... 137 CONCLUSION.................................................................................................... 139 8.1 Summary of Work ........................................................................... 139 8.2 Contributions..................................................................................... 141 8.3 Recommendations for Future Research............................................ 142 APPENDIX A ....................................................................................................... 144 APPENDIX B ....................................................................................................... 164 APPENDIX C ....................................................................................................... 185 REFERENCES.................................................................................................... 209 vu Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. List of Figures Figure 1.1 Research P lan .......................................................................................7 Figure 3.1 Machine Layout ................................................................................ 30 Figure 3.2 Alternative Routing for a Specific O rder.......................................... 32 Figure 4.1 Organization of Traditional and Integrated Approach......................41 Figure 4.2 Simultaneous Planning and Scheduling System .................................46 Figure 4.3 The Result of Simulation Runs for Average Tardiness ................... 56 Figure 4.4 The Result of Simulation Runs for Average Flow Time .................57 Figure 4.5 The Result of Simulation Runs for Makespan................................... 58 Figure 4.6 The Result of Simulation Runs for Average Machine Utilization . 58 Figure 6.1 Simulation Planning and Scheduling System...................................... 71 Figure 6,2 Makespan in Basic and Integrated System ......................................84 Figure 6.3 Average Tardiness in Basic and Integrated System.........................85 Figure 6.4 Average Flow Time in Basic and Integrated System.........................86 Figure 6.5 Average Utilization in Basic and Integrated S ystem .........................87 Figure 7.1 Graph Representation of J o b s ............................................................ 98 Figure 7.2 Graph Representation of Jobs Arrangements......................................99 Figure 7.3 A Complete Graph Representation of Job M atrix.............................100 Figure 7.4 Makespan in Basic and Integrated System in a Cost-Based Model 107 Figure 7.5 Average Line Utilization in Basic and Integrated System in a Cost-Based M o d el........................................................................ 108 viu Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Figure 7.6 Average Tardiness in Basic and Integrated System in a Cost-Based M o d el........................................................................ 109 Figure 7.7 Average Flow Time in Basic and Integrated System in a Cost-Based M o d el........................................................................ 110 Figure 7.8 Average Cost in Basic and Integrated System in a Cost-Based M o d el........................................................................ I l l Figure 7.9 Comparison of the Traditional and Integrated System (Insignificant Tardiness Cost) .................................................... 112 Figure 7.10 Illustration of a Time Window Before a New Assignment .... 114 Figure 7.11 New Assignments in a Time Window ........................................ 115 Figure 7.12 Average Flow Time in Basic and Integrated System Using a Time Window................................................................................ 119 Figure 7.13 Average Tardiness in Basic and Integrated System Using a Time Window................................................................................ 120 Figure 7.14 Average Line Utilization in a Cost-Based Model Using a Time Window................................................................................ 121 Figure 7.15 Makespan in a Cost-Based Model Using a Time Window . . . 122 Figure 7.16 Average Cost in a Cost-Based Model Using the Time Window Concept................................................................. 123 Figure 7.17 The Effect of Window Size on Average Flow T im e.......................125 Figure 7.18 The Effect of Window Size on Average Tardiness...................... 126 Figure 7.19 The Effect of Window Size on Average U tilization.......................127 Figure 7.20 The Effect of Window Size on Average C o s t.............................. 128 Figure 7.21 The Effect of Window Size on Makespan ................................... 129 Figure 7.22 The Effect of Window Size on Computation T im e..........................130 IX Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Figure 7.23 Comparison of Average Flow Time in Opportunistic Planning and the Time Window Approach................................................................ 132 Figure 7.24 Comparison of Makespan in the Opportunistic Planning and the Time Window Approach.............................................................. 133 Figure 7.25 Comparison of Average Tardiness in the Opportunistic Planning and the Time Window Approach ...................................................... 134 Figure 7.26 Comparison of Average Line Utilization in the Opportunistic Planning and the Time Window Approach ............................................... 135 Figure 7.27 Comparison of Cost in the Opportunistic Planning and the Time Window Approach ..................................................................... 136 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 4.1 Table 4.2 List of Tables Job List ........................................................................ ____50 Assembly Components List (Part L is t) ............................... 51 Table 4.3 Basic Assembly Plan ........................................................... 51 Table 4.4 Line Configuration .............................................................. 52 Table 4.5 Flow Time and Tardiness for Conventional S ystem ........... 53 Table 4.6 Line and Machine Utilization for the Conventional System . . . . 53 Table 4.7 Flow Time and Tardiness for Integrated S ystem ................ 54 Table 4.8 Line and Machine Utilization for the Integrated System . . 54 Table 6.1 Product Requirements for 60 Items .................................... 75 Table 6.2 Basic Assembly Plan for 60 Products.................................. 78 Table 6.3 Comparison of Average Flow Time in Basic and Integrated System79 Table 6.4 Average Tardiness in Basic and Integrated System............. 80 Table 6.5 Makespan in Basic and Integrated S y stem .......................... 81 Table 6.6 Average Line Utilization in Basic and Integrated System . . 82 Table 7.1 A Job M atrix .................................................................................. 99 XI Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Abstract This dissertation addresses the potential benefits of simultaneous generation of assembly planning and scheduling in electronics assembly operations. Assembly planning and scheduling are two major functions in circuit board manufacturing. Currently, assembly plans are developed in the absence of information about the state of the shop floor at the execution time of the assembly operations. As a result, these assembly plans may impose unnecessary restrictions on scheduling. Consequently, scheduling conflicts, bottlenecks, imbalance in assembly lines, machine congestion that lead to lateness, and excessive production and shipping costs are inevitable. This research compares the performance of the traditional method of isolated planning and scheduling, with a proposed method of simultaneous generation of assembly plans and schedules in electronic assembly operations. Simulated scenarios indicate the potential superiority of the integrated system. A software system, SAPS, is developed as an environment not only to test the idea of integration, but to generate all the plans and schedules simultaneously for any scenario for electronics assembly operations. This research shows the benefit of one of the aspects of concurrent engineering in electronics manufacturing and demonstrates a methodology and the potential advantage of integration in manufacturing functions. xii Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 1 INTRODUCTION Integration of the two functions of assembly planning and scheduling can potentially introduce significant improvements in a manufacturing system. These improvements can usually be measured in terms of increased machine utilization, which generally translates to better return on investments, reduction in flow time, reduction in inventories, and reduction in lateness in deliveries. These improvements are mainly due to the reduction of unnecessary conflicts in scheduling. Traditionally, assembly planning and scheduling have been considered as two separate functions which are performed in isolated stages (i.e. the ouQiut of assembly planning serves as a data base from which, in conjunction with orders, a master schedule is generated. Daily schedules are produced from the same assembly plans and the state of the floor). Assembly planning is the process of preparing a detailed sequence of operations to transform a set of disjoint components into a final part specified by an engineering design. A detailed plan in circuit board assembly contains the routings, processes, process parameters, machines, and tools required for production. Scheduling is a manufacturing function that assigns manufacturing resources to the operations indicated in the assembly plan in such a way that some relevant criteria, 1 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. such as due dates or minimum number of late jobs, are met. Efficiency, with respect to several measures and near optimality of a schedule, is critical in obtaining competitive performance. The efficiency of a schedule is quantified by several measures of performance. Some examples are due date, makespan, average waiting time, flow time, number of late jobs, average machine utilization, and idle time. Most of the reported research considers either process planning or scheduling and treats them as two independent functions. Concurrent consideration of the two manufacturing functions has been suggested by a few researchers in the form of scheduling with alternate process plans. Kusiak and Chen (1988) suggested a rule-based scheduling system that considers alternate machines and alternate sequences. Watson and Eqbelu (1989) suggested a set of alternate machines for each process indicated in the process plan. This approach, however, does not assume a flexible sequence for the process. Concurrent generation of process planning and scheduling has been suggested by Khoshnevis and Chen (1990) who showed that the impact of the new production planning philosophy on enhancing the due date performance is very pronounced. Most of the previous research in process planning and scheduling, concern the metal processing environments. Electronics assembly operations, which have a specific machine layout, along with other unique characteristics such as material preparation specific to machines, have not been addressed by the reported research. In this industry, machines are configured in a special manner. Some of the machines are interconnected in assembly lines while others stand alone. This configuration is usually based on the prediction of the future job requirements. The other characteristics of this industry is the material provision which is machine dependent, i.e., the component kits 2 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. for a specific product may be prepared differently for each alternative machine capable of performing the same assembly. The objective of this research is to show that the integration of the assembly planning and scheduling functions in electronics assembly is possible and results in enhancing system performance. This study is based on the observation of the current management methods of operations in an electronics manufacturing plant. Simplified data from this firm are used for the evaluation and comparison of the new integrated model. 1.1 Problem Statement Currently, the assembly planning and scheduling functions in electronics assembly operations are performed separately. On one hand, when the part is designed and released to the manufacturing floor, manufacturing engineers create the assembly plan regardless of the status of the shop floor, and sometimes even the availability of manufacturing resources. On the other hand, the scheduling system assumes the process plan to be fixed and attempts to allocate resources and sequences to the operations such that the directed plan is not violated. This can cause an imbalance in machine loading, congestion in some areas of the factory, and other scheduling complications. Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The objective of this research is to resolve this problem by introducing a new system which integrates the two manufacturing functions of assembly planning and scheduling. The proposed system is expected to improve the performance of manufacturing operations by reducing the average tardiness, flow time, and makespan, and by increasing the machine utilization. The integrated problem presented in this research can be formulated as the following: Givp.n: - A set of jobs - A list of product design specifications - Shop floor configuration - Current state of shop floor Find: - Assembly plan for each job - Schedule for each job This is a planning and scheduling problem which is technically a NP-hard problem. This problem will be solved using a heuristic method. The main question is that how could the assembly planning and scheduling functions be structurally integrated and what would be the characteristics of the integrated system. This research addresses the following issues: Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Development of a mathematical model for the planning system Investigation of different methods of integration Development of a basic algorithm and enhancement of the performance of the integrated system using better heuristics Evaluation of the new methodology using simulation 1.2 Contributions This research presents a mathematical model as well as a methodology and algorithm to present the integration paradigm for planning and scheduling. The assembly planning and scheduling functions are integrated without generating all possible assembly plans in advance. Assembly plans are determined on the basis of design requirements and the status of the shop floor. This is a new approach which is very promising for system performance. This new approach of planning and scheduling is an application of the concept of concurrent engineering in electronics manufacturing environments. The problem of job shop scheduling is known as NP-hard. The integration problem is even harder due to the combination of planning and scheduling. Usually this type of problem is solved using the priority dispatching rule method. The problem with this method is that optimization is done locally and there is no vision into the future in decision-making. In this research a new approach has been suggested. The appropriateness of a job-line assignment is evaluated using a qualifying factor. This factor is used to alleviate the shortcomings of priority dispatching rules. A 5 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. mathematical model has been developed to calculate the qualifying factor for each job- line assignment. In traditional planning and scheduling operations there are not many choices for the scheduling function. In the integrated system, planning is combined with the scheduling function which gives more choices for scheduling decisions. The outcome of this decision-making strategy is the increase in machine utilization and the reduction of average tardiness, makespan and average flow time. Simulation is used to show the impact of the proposed integrated system. In the later phases of this research, a cost model has been developed. This model controls all cost attributes in the manufacturing processes. A sequence-dependent scheduling problem has been solved using the mathematical programming model. A graph representation for the integration of planning and scheduling functions has been suggested. This representation leads us to use a 3/2 approximation algorithm for the integrated system. 1.3 Organization of Dissertation This dissertation is organized into eight chapters followed by a bibliography. Chapter 2 describes the background and related work in process planning, assembly planning, scheduling, and concurrent engineering. Electronics manufacturing and its characteristics are described in chapter 3. Chapter 4 investigates the potential benefits of the integrated system and the design of the integrated paradigm. The preliminary 6 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. results are also presented in chapter 4. A generic integrated system optimizing some performance measures such as average tardiness, average flow time, average machine utilization and make span, has been developed in chapter 5. Chapter 6 explains the design and implementation of the Simultaneous Planning and Scheduling system. Chapter 7 incorporates all the manufacturing costs attributes into a general cost model and presents an algorithm to optimize the total cost. Finally, chapter 8 presents the conclusions and recommendations for future research. 1.4 The Research Plan Backgroimd S tu (b ^ Assembly Planning and Scheduling in Electronics Manufacturing Design o f the Megraîed System Development o f a Mathematical Model for the Integrated System I ruiqg DnsertatiDn - SAPS, C-SAPS, T- SAPS Process Planning, Assembly Planning, and Scheduling Traditional Planning and Scheduling Systems Existing Intelligent Planning and Sicheduling Systems Study of an Electronic Assembly Facttny Plant Characteristics of Electronics hhnu&cturing Factory L ^ u t, Universal Technological Constraint Computer Aided Assemb^ Planning in Electronics Manuficturing Artificial InteUigence and Expert Systmns in Electronics MFO Organization of the Traditional and Integrated Systems System Description and Specifications Supporting Files Simultaneous Planning and Scheduling Algorithm (SPS) Introducing foe Measures of Performance Simulation and Testing foe System Evaluation of foe Integrated System and Comparison wifo foeTraditioral System Vector Characterization o f foe Job-Line Assignment Definition of Function p and Mathematical Definition of QF Autonurtic Generation of Basic Assembly Plans Automatic Calculation of Qualifying Factor (QF) b e s i^ of %e Aêw'vëisrôns ô^K e Intêgâtëd System .......... System Description, Prqrlanning Modiue, Simultaneous P & S Module Implementation of foe Kew Versicm of SAPS & Conmarison of Results Development of a New Algorithm Using the Graph Theory Design & hnplementatiui of foe Cost-Based Model C-SAPS (Grqrh) Design & hnplementaion of the hitegrated System Using the Time Window Concept Comparison o f CSAPS wifo T-SAPS Evaluation of foe Role of fi* L e n ^ o f theTime Window Figure 1.1; The Research Plan Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 2 BACKGROUND This research encompasses three major concepts, namely, assembly planning, scheduling, and concurrent engineering notions. Since assembly planning shares a great deal of commonality with process planning, most of the researches related to assembly planning are found under the title of "process planning". 2.1 Process Planning Process planning is a manufacturing function which translates the design data into the best possible method of manufacturing. Process planning is a systematic determination of methods by which a part or a system is manufactured. Process planning functions may involve several or all of the following activities: - Selection of machine operations - Sequencing of machine operations - Selection of processing tools - Determining setup requirements - Determining machine parameters - Design of jigs and fixtures Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Process planning requires two major pieces of information: part design and shop floor configuration. A process planner follows some main objectives like: routing, machine selections, tool selections, and other process parameters. A process planner should also watch the technological and precedence constraints. The sequence of operations is also a major objective in process planning. A process planner should not only look for a feasible sequence, but also, the best possible sequence which minimizes the operation costs and other manufacturing criteria. Process planning can be performed using a computer. This is called Computer Aided Process Planning. There are three basic approaches to automated process planning: -Variant approach -Generative approach -Automatic approach 2.1.1 Variant Approach In the variant approach, each part is classified based on a number of attributes coded using a classification and coding system. The codes and process plans for each part are stored in a data base. When a process plan for a new part is required, the part is coded and a process plan for a part similar to the new part is retrieved. The retrieved process plan is modified if necessary. The variant approach might be useful when there is a great deal of similarity between parts. Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The basic idea of variant process planning is to group parts as families, make a standard plan for each family, code them, and store them in a computer system. Parts are grouped according to their geometric characteristics. The parts that have similar geometric characteristics are grouped as a family. Common manufacturing methods can then be identified for each family. Standard plans are made to represent those methods. The part femilies are coded and the standard plans are stored into the system. For planning a new part, a part family is identified and associated, a standard plan is retrieved, then the standard plan is modified to produce a plan for the new part. The modification is done by a human planner. In a variant process planning system, the computer assists the planner by providing an efficient system for data management, retrieval, editing, and high speed printing of process plans. The standard process plan of each part family should be complete. The standard plan should include all the information that is needed, such as the processing sequence, the process machine, the tools, and a collection of detailed manufacturing data. During the planning phase of a new part, major modification difficulties could be encountered when adding a new feature and/or changing facilities in the shop floor. Sometimes a minor change may lead to a plan that is totally different from the standard plan. In summary, the variant process planning approach increases information management capacity. However, major planning work has to be done by human experts to modify the retrieved plans. Computer systems are actually tools to assist in the manual process planning. 10 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The variant approach is a popular approach in industry today. Most working systems such as MIPLAN (Schaffer, 1980) and AUTOPLAN (Tempelhof, 1980) of Metcut Research Associates are of this type. 2.1.2 Generative Approach In a generative process planning system, process plans are created from the information available in a manufacturing data base without human intervention. Upon receiving design information, the system can generate the required operations and operation sequences for the design. Manufacturing knowledge must be captured and encoded into an efficient software. By applying decision logic, a process planner's decision-making process can be imitated. Other planning functions, such as machine selection and process optimization, also can be automated using generative planning techniques. In process planning, parts are usually represented as a set of technological features, such as straight holes, countersink holes, notches, faces, etc. Each of these features is a working element in which its machining requires one or several successive cuts. Production rules and frames are usually used to represent the planning knowledge. Hierarchical planning and non-hierarchical planning are the two major control strategies in planning systems. The distinction between them is that hierarchical planners generate a hierarchy of representations of a plan in which the highest level is a simplification of the plan and the lowest one is a detailed plan. In terms of process 11 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. planning activities, determining process sequence of features in a part could be the top level in a hierarchical planning system. Selection of machining operations could be in another level of planning. When the plan expands into more detail, the planner moves to the lower level of the hierarchy. Non-hierarchical planners have only one level of representation for the entire plan. All planning activities are performed at the same time. Whenever a plan is expanded, selection of machining operations, sequencing the operations, and selection of tools are considered. The method of hierarchical planning is to first sketch a plan that is complete, but vague, and then to refine the vague parts of the plan into more detail. The advantage of this approach is that the plan is first developed at a level in which the details are not computationally overwhelming. In contrast, non-hierarchical planning develops a sequence of actions to achieve each of its goals. The major disadvantage of it is that it does not distinguish between problem-solving actions that are critical to the success of a plan and those that are less significant details. As a result, plans developed by non-hierarchical planners get bogged down in unimportant details. Some process planning systems use the hierarchical planning approach, such as Hi- Mapp (Berenji and Khoshnevis, 1986) and TOLTEC (Descotte and Latombe, 1985). Hi-Mapp starts with an initial abstraction of a correct plan and then tries to expand it to include more details. TOLTEC also starts with a complete, correct plan that expands in details later, adding in every step a complete, correct sub-plan. TOLTEC uses its knowledge best, by avoiding backtracking and/or creating and investigating unnecessary paths. 12 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The non-hierarchical planning approach is used in GARI (Descotte and Latombe, 1985), It plans by iteratively constraining a loosely constrained, nonlinear, initial plan using expert-type knowledge. Each iteration produces new assertions that apply to the set of potential processes. At each particular instance, the assertions define a set of plans and imply a partial order on the set of potential processes. 2.1.3 Automatic Approach The automatic approach denotes process planning that can generate a complete process plan directly from and an engineering design model (CAD data). In geometric reasoning, parts are represented by a boundary or a solid model. The process planning is based on feature representation. Since the representation of a part is different in geometric reasoning and process planning reasoning, some automatic process planning systems try to develop an interface to recognize the manufacturing features from the CAD model and then use generative process planning logic. However, feature recognition is a serious problem as it is extremely hard to recognize complex features. To overcome the above problem, another approach uses feature based CAD models. The representation of such models limits the designer to the available manufacturing features. One of the disadvantages of this approach is that the technology developed for CAD models, such as solid models, cannot be used. Another limitation of this approach is that features used in design must be functional shapes for the design task, instead of manufacturing shapes. 13 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The difficulties of transforming one representation to another, leads to the idea of the hybrid approach. In this approach parts are represented in both the boundary model and feature based model. Pointers are used to link the two models. Since geometric reasoning can be performed on the boundary model, it reduces constraints that a designer has to obey during the design stage. One obvious disadvantage of this approach is that it needs more storage space for objective parts. 2.1.4 Existing Intelligent Process Planning Systems TOM (Matsushima, Okada and Sada, 1982), the Technostructure of Machining, is a knowledge-based expert system that is applicable only in the domain of hole-making. Given a finished geometry, TOM can generate a process plan. PROPLAN (Phillips, Zhou and Mouleeswaram, 1984) is an expert process planning system suitable for symmetric rotational parts. It uses a CAD system data base as a primary source of data input. To generate a process plan, PROPLAN employs a graph search strategy. It is quite obvious that as the complexity of the part increases, the graph becomes bigger and the search required to generate a process plan becomes tedious. This is why PROPLAN is not suitable for complex parts. GARI (Descotte and Latombe, 1985) consists of two basic components: a knowledge base and a planner. Information regarding parts and machines is described in GARI in a convenient manner. The planner generates a process plan based on the part and machine description. Then it performs two steps iteratively. The first step consists of 14 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. constraining the current solution by applying a selected piece of advice. The second step consists of propagating the constraint through the current solution to determine whether there are any contradictions or conflicts between two or more pieces of advice. EXCAP (Davis and Darbyshire, 1984). The Expert Computer Aided Process planning (EXCAP) has been designed to generate process plans for rotational parts. It can not be used to generate process plans for complex parts because of the way in which the part geometry is described and not because of the way in which the rules are defined. EXCAP can produce more than one process plan. The user may accept or reject any of the process plans generated. CUTTECH (Barkocy and Zdeblick, 1984) developed a system for the planning of machining operations, i.e., for selecting cutting tools, operation sequence, and speed/feed parameters for a user-defined part that requires machining. The system gathers the required information regarding the part features and machines from the user. Using the knowledge base of machining rules and the data base, it generates an output that lists the appropriate machines, machining parameters, depth of cut, etc. SIPP (Nau and Chang, 1985) is an expert process planning system for parts that require metal removal operations. It consists of: 1. A knowledge base that includes the information about the characteristics of different machinable surfaces and the capabilities of the various machining processes. 15 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 2. A control system that uses a least-cost-first search strategy. The knowledge in SIPP is represented using hierarchical frames. Hi-Mapp (Khoshnevis and Berenji, 1985), Hierarchical and Intelligent Manufacturing Automated Process Plaimer, is similar to GARI (discussed earlier) with respect to part representation. However, it differs from GARI in two ways: 1. Hi-Mapp initially generates an abstract of a correct plan, whereas GARI initially generates a loosely constrained plan; hence, the refinement process in GARI is longer than in Hi-Mapp (Kusiak, 1990). 2. Unlike GARI, Hi-Mapp performs hierarchical planning by specifying priorities for processing the features of a part. Hi-Mapp consists of a knowledge-base and a planner. The knowledge-base includes 45 production rules. The planner converges to a solution (process plan) using a backward chaining strategy. SAPT (Milacic, 1985) consists of three modules: technological pattern recognition, manufacturing process logic, and manufacturing economy, which are linked by a common manufacturing knowledge-base. CIMS (Iwata and Sugimura, 1985) is an expert system for process planning that consists of: 1. An interactive modeling subsystem that constructs three-dimensional solid models of parts and includes geometrical and technological information such as material, surface roughness, and accuracy data. 16 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 2. A process planning subsystem that generates a machining plan based on the models of the finished part and the blank. 3. A knowledge base that consists of production rules. The production rules represent the know-how of process planners. DYNACAPP (Khoshnevis and Chen, 1990) is the most recent related research done by B. Khoshnevis and Q. Chen in concurrent process planning and scheduling. In this research, integration is implemented by embedding the process planning module into the scheduling function. A concurrent assignment algorithm is developed. In each assignment stage, the optimal assignment algorithm is used to make selections among competing candidate operations. Simulation is used as a mechanism to evaluate the impact of the proposed model of production. A software system, DYNACAPP, is presented as a prototype environment that supports the integration mechanism. 2.2 Scheduling Scheduling is one of the most difficult problems in manufacturing systems, which concerns both fabrication and assembly. There are basically three approaches to solve scheduling problems: 1. Analytical approach 2. Exhaustive approach 3. Heuristic approach 17 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. In the analytical approach, scheduling problems are abstracted from the real world into formal mathematical models and are solved mathematically. The problem with this approach is that it is not always easy to structure the scheduling problems into mathematical models. In this approach, in order to ease the representation task, usually a large number of assumptions are made during the model building, which rarely hold true in the real situations. In the exhaustive approach, all possible combinations of task sequence are tried and the best combination is chosen. Although this approach can always find an optimal solution, practically, it is rarely used because of the tremendous amount of time and computational efforts required. In the heuristic approach, algorithms are developed to solve the problem by finding good solutions in a reasonable computing time. A good solution means that the solution is not necessarily optimal, but it is good enough for the application domain. Most scheduling systems are based on the heuristic approach. In general, scheduling in manufacturing systems include both fabrication and assemblies. Most scheduling papers consider these two cases. For instance, Hildebrant (1980) analyzed scheduling in a flexible manufacturing system in which machines are prone to failures. He developed three mathematical programming models to minimize the expected time to produce a given number of parts. Kusiak and Finke (1987) developed an integer programming formulation for scheduling a flexible forging machine. A hierarchical approach linking the machining and assembly system was published by Kusiak (1986) where the overall FMS scheduling problem was structured as an aggregate scheduling (upper level) problem and real time scheduling (lower level) problem. At the aggregate level, the scheduling problem was modeled as the 18 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. two-machine flow-shop problem and solved by Johnson's algorithm (Johnson, 1954). To solve the real time scheduling problem, a heuristic algorithm was developed. Akella, Choong and Gershwin (1985) developed a few models for an automated assembly line and tested them using a hierarchical scheduling framework. Pinedo, Wolf and McCormick (1986) examined the scheduling problem for an assembly Une with serial stations, each with a finite capacity buffer. Recently, artificial intelligence has been used to solve the scheduling problem. In this approach, the compiled scheduling knowledge and various heuristics are used. Some of the existing intelligent scheduling systems are discussed in the next section. 2.2.1 Existing Intelligent Scheduling Systems Numerical algorithms have traditionally been used for solving scheduUng problems. The knowledge-based system approach not only uses algorithm, but also declarative and procedural knowledge and an inference engine which are aU implemented in the knowledge-base. The knowledge-based scheduling system has the following features (Kusiak, 1990): 1. It uses knowledge elicited from different sources including human experts, a designer, and the literature. 19 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 2. It is based on the tandem architecture presented in Kusiak (1987), which integrates the optimization and knowledge-based approach. 3. It has been developed for an automated manufacturing environment. The scheduling problem of any type requires a number of different resources, such as machines, tools, fixtures, grippers, material handling carriers and constraints such as precedences, due dates, and so on. Some of the existing intelligent scheduling systems are as follows; ISIS (Fox and Smith, 1984), the Intelligent Scheduling and Information System, is a knowledge-based job-shop scheduling system which constructs schedules to satisfy as many constraints as possible in near real time. To achieve this, ISIS uses constraints to bound, guide, and analyze the scheduling/search process. ISIS performs a hierarchical constraint-directed search in the space of alternative schedulers. Beam search is used in ISIS. From all the alternatives only "n" best states are selected for extension of the next search step. Two strategies are used in the resource assignment: "eager reserve" and "wait and see". The "eager reserve" chooses the earlier possible reservation for required resource of the operation, and "wait and see" tentatively reserves as much time as available, leaving the final decision to reservation selection level in which the reservation is made to minimize the work-in-process time. KBSS (Kusiak and Chen, 1988), a Knowledge-Base Scheduling System, uses the heuristic algorithm. The declarative knowledge related to scheduling problems, parts, operations, and the generated schedules are represented by frames in the system. Production rules are also used to make selections of alternative plans and evaluation 20 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. of generated schedules. The heuristic algorithm which is embedded into the knowledge-based system separates operations into two sets. One is a set of operations which can be scheduled at a current stage, and the other set is the rest of the operations. Resource selection operation is performed according to priority rules. Alternative plans are also considered in the algorithm if they are provided by the plan. The algorithm is built to solve scheduling problems with due dates. SONIA (Collinot, Pape and Pinoteau, 1988) is another knowledge-based scheduling system which is designed to detect and react to inconsistencies between a scheduling plan and the actual course of events on a shop floor. Knowledge is represented by the production rules. SONIA has four major components: the schedule management system, predictive components, reactive components, and analysis component. The schedule management system is designed to update schedule descriptions in a constant fashion as scheduling decisions are made and events happen on the shop floor. In the predictive component, a set of operations are chosen to perform and resources are assigned to them. When an operation is selected, its schedule status is modified and relevant constraints are created by the management system. A reactive component is used when inconsistencies are detected. It can solve inconsistency problems by rejecting operations, by rescheduling part of the manufacturing order, or by a global rescheduler which processes and modifies the whole plan for the current date. The analysis component provides information about resource loading and proposes a way to solve contemplated conflicts. Overviews of other related work about process planning and scheduling can be found in Khoshnevis and Berenji (1985), Chang, Wysk and Davis (1982), Dunn and Mann (1978), Phillips, Zhou and Mouleeswaran (1984), Tonshoff et al. (1987), Lui (1988), and Vere (1977). 21 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 2.3 Assembly Planning Assembly planning is a manufacturing function that establishes which manufacturing processes and parameters are to be used, as well as which machines are capable of performing those processes to join components and parts into an assembly product. The assembly planner selects an assembly sequence and resources which satisfy economic, functional, and operational constraints. Assembly planning is divided into two major categories: mechanical parts assembly planning and electronics assembly planning. 2.4 Concurrent Engineering Concurrent engineering refers to the practice of incorporating various values of a product into the design at its early stage of development. These values address the entire life-cycle of the product and include not only its primary functionality but also producibility, assemblability, testability, serviceability, and even recyclability. In the past decade, many researches have sought to identify knowledge used by experienced engineers to accomplish a life-cycle design, establish a methodology to utilize the life cycle knowledge during the early design stage, and develop computer-tools for life cycle design and manufacturing. Concurrent engineering is largely an organizational and managerial challenge which involves a lot of communications between different parties. The process of design is reviewed concurrently by the development team. Other manufacturing functions are considered simultaneously. The rapid advancing of the field of computer-aided 22 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. engineering and design opens an opportunity to use computers to promote concurrent engineering effectively. Integration of different manufacturing functions is a part of the concurrent engineering concept. Assembly planning and scheduling are two manufacturing functions that can be integrated for better performance in terms of manufacturing productivity. This concept has been addressed in this research. 2.5 Summary In this chapter, we surveyed the current work in automated process planning, assembly planning, and scheduling. Different methods of process planning and scheduling have been discussed. In terms of process planning, three major approaches in computer aided process planning have been presented. These approaches are: the variant approach, generative approach, and automatic approach. The existing intelligent process planning and scheduling systems have been outlined. Three major approaches in scheduling, the analytical, exhaustive, and heuristic approach have been discussed. The major knowledge-based planning and scheduling systems have been explained and compared. Since most of the planning and scheduling systems operate separately, integration of these two manufacturing functions are not considered in almost all of the previous researches. The most recent related research is done by Khoshnevis and Chen in concurrent process planning and scheduling. Concurrent assembly planning and scheduling, especially in electronics manufacturing operations, is not available in the literature. Concurrent engineering is the most related topic to our research. We 23 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. emphasized that the integration of assembly planning and scheduling functions is a part of the concurrent engineering notion. We concluded that assembly planning and scheduling are two manufacturing functions that can be integrated for better performance in terms of manufacturing productivity. 24 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 3 ELECTRONICS MANUFACTURING 3.1 Introduction Electronics manufacturing, as a separate and somewhat indistinct subset of electrical manufacturing, includes that segment of the industry which deals with electronic parts. The heart of all modem electronic systems is the semiconductor device. The assembly of that device into or onto the large unit generally progresses from the Printed Wiring Board (PWB), to a backplane which appears in various forms to a card cage, then to a unit, and eventually to a system. Electronics assembly can be categorized by the specific technology of the components being assembled and their attendant processes. The printed wiring board (PWB) is an important component of electronics assemblies. Historically, it has been regarded more as a mounting medium for electrical components; a platform through which they could be interconnected. In the evolution of electronic circuits, however, other considerations such as faster operation, higher reliability, and intense completion require the components to be closer together, more densely populated, and to provide a greater number of input/output (I/O) connections. Higher frequencies and narrower line widths soon require greater attention to board parameters such as line capacitance, controlled impedance, and heat dissipation. 25 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Competitive electronics manufacturing depends on a fast and accurate assembly process, one which involves more than merely putting things together. From the beginning, design for manufacturability and testability (DFM/T) should aim towards an efficient, cost-effective, and reliable process, determining components parts, and the buildup sequence on the production line. Some of the assembly processes are manual, involving the human resources of judgment and manipulation through complex physical movement. Increasingly, high technology industries are using computer-aided design and manufacturing systems. When a product is specifically designed to be assembled, there are many factors which determine how it will be accomplished. Assembly planning plays a major role towards the most cost-effective process. Scheduling is the next step to actually execute the assembly following the assembly planning. 3.2 Characteristics of Electronics Manufacturing To familiarize the reader with the characteristics of electronics manufacturing systems, this section presents a brief explanation of the types of components, machines, and plant layouts that are common in most printed wiring board (PWB) assembly plants. 26 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 3.2.1 Component Types The electronic components that are assembled onto circuit boards consist of integrated circuits (ICs), resistors, capacitors, transistors, diodes, etc. Basically, two different assembly technologies are used in this industry. The components can be either inserted or surface mounted on the PWBs. Inserted components are mounted on a PWB by inserting the leads of the components into the holes in a PWB or into a socket. This is called Through-Hole Technology. There are four different types of inserted components, namely, DIP (Dual In-line Package), Axial, Radial, and Pin. To obtain more functions per unit area at a lower cost, electronic circuit designers use another technology which is called Surface Mounted Technology (SMT). By this relatively new technique, surface mounted components are attached directly to the surface of a PWB using a dispensed adhesive before they are soldered, in order to be retained on the board. The components used in a surface mounted assembly are known as Surface Mounted Components (SMCs). There are two different types of SMT machines: SMT Wave Soldering (SMTW) and SMT Reflow (SMTR). 3.2.2 Automatic Insertion Component insertion refers to that process in which the leads are inserted into drilled holes in a printed wiring board. Automatic insertion generally refers to the through hole packages, where as automatic component placement is associated with surface mount technology (SMT) packages. 27 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The insertion sequence of parts on a PWB is recommended to be in the following order: 1. SMT reflow 2. DIP 3. AXIAL 4. RADIAL 5. PIN 6. SMT wave soldering Robots are also used to insert odd-form components which can not be handled by other automatic assembly equipment. The speed of insertion is 1000 to 2000 components per hour depending on package configurations. 3.2.3 Parts Insertion Machines The universal medium for the mounting of electronic components is the printed wiring board (PWB). Machinery is built to place and insert components automatically into the drilled holes of the PWB. This discussion assumes a single-layer or multilayer PWB with a through-hole drilled completely through from top to bottom. The parts fed into the insertion machine have their lead bent, inserted, cut, and clinched in sequence. A bending-tool-and-press shapes the leads for the proper insertion angle into a waiting board bellow the feed head. Although there is generally one head per board, several boards may simultaneously undergo parts insertion on the same machine. This implies, 28 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. therefore, that there exist several (usually two) heads per machine. The board is underneath the insertion head traveling either on a XY table or platform, or a rotary index device. The insertion head is automatically programmed over the previously drilled holes and inserts the bent leads (usually at right angles to the body of the component) down into the board until the body of the component nearly touches the surface of the board. Certain critical components are mounted with special clearances to the board. A resistor, for example, might be mounted with clearance to allow thermal dissipation. As the leads protrude from the underside, cutting devices clip the leads and either spread them or bend them over (the "clinching" operation) to prevent the parts from falling out. Advanced forms of the insertion machines also check or electrically test for the presence of the lead coming through the hole. Verification for a successful insertion, at the point of insertion, results in higher quality of assembly and much lower final costs. If, for example, the faulty assembly operations were found farther down on the production line after soldering took place, an expensive disassembly would have to be performed. 3.2.4 Machine Characteristics and Layout The characteristics of machines and the type of layout in circuit board assembly impact the scheduling problem. There are two types of layouts on the shop floor. These two are the connected and the individual machines. Due to the frequency of using a fixed series of machines for the majority of boards, machines may be laid out in one distinctive assembly line. However, the same types of machines may be located individually in different locations on the shop floor. In other words, some identical 29 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. machines are laid out in different configurations (interconnectedly or individually) on the basis of the volume of orders and their assembly requirements, ease of material handling, and the speed of assembly. The following figure shows a sample of machine layout in a shop floor. LlNEl DIP mm LINE2 i » i m i L1NE3 n m i n LINE 4 mm , .A X I AX I — BAD L IN ES LINES SMIXR)— : « ! m m iüi DIP m m _ Æ _ Figure 3.1: Machine Layout One of the major pieces of information that is needed for planning and scheduling is the machine information which specifies the characteristics of the machines and their capabilities. All of the necessary information about the machines is organized in a file called the machine definition file. Machines are distinguished on the basis of their 30 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. capabilities and their type of layout. Components, regardless of their type (resistors, capacitors,...) are classified by the type of machines or processes that can assemble them (radial, axial, manual, etc.). This information is stored in the manufacturing component library file. 3.2.5 Universal Technological Constraints An important characteristic of scheduling in the electronics industry is a universal order in which the operations must be performed. If a job requires operations on any combination of SMT(R), DIP, AXIAL, RADIAL, PIN, and SMT(W) machines, then all of these operations must be performed exactly in this order. For example, if an order needs AXIAL, DIP, and RADIAL operations, then operations should be performed in the following order: First DIP, then AXIAL, then RADIAL. This universal order is called the universal technological constraint. Figure 3.2 shows the technological constraints as well as alternative routings for a specific order. The technological constraints reduce the scheduling search space. These constraints are also used to arrange the machines in each assembly line. 31 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. INDIVIDUAL MACHINES O rder##* LINES DSP K A i> n . AX AX mm .A X m m mm # DIP RAD Figure 3.2: Alternative Routing for a Special Order 3.2.6 Automated Assembly in Electronics Manufacturing Automated assembly machines are generally fast, precise, and accurate. They are also less adaptable, usually inflexible, and almost devoid of judgment. In addition, after considering the high initial capital expenses of automated machines, a lower-cost hand assembly (especially for low-volume rates) may prove to be a more viable alternative. In the computer-integrated factory, a communications and control system is devised to automatically integrate the many functions of the factory. Communications provide the means for monitoring and distributing the data pertinent to manufacturing 32 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. functions. The data may be derived from sensory equipments which monitor assembly functions, and they may include: 1. Optical character reading or recognition (OCR) equipment 2. Bar code readers 3. Radio frequency identification (RFID) "tag" systems 4. Fiber optics devices 5. Photoelectric switches 6. Pneumatic switches 7. Strain gages 8. Magnetic switches 9. Touch sensors 10. Manual data entry, from a keyboard 11. Voice data entry 3.3 Assembly Planning in Electronics Assembly In the current electronic assembly environments, the printed circuit board assembly manufacture is often required to produce a wide variety of circuit board assemblies while minimizing production time and cost. Assembly automation in this field has become very expensive in terms of both initial investments and operating costs. Thus, optimizing assembly processes to achieve high levels of utilization and production, with minimal work-in-process inventory, is increasingly important. Assembly planning plays an important role in achieving these objectives. 33 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Often, assembly planning for printed circuit board assembly is a manual operation performed by an assembly planner. An assembly planner evaluates the parts list and layout for an assembly, considers the performance characteristics of the available assembly lines (machines), determines the allocation of components to machines, the assignment of components (material) to feeders, and the sequence of component placements for each machine. 3.3.1 Computer Aided Assembly Planning in Electronics Assembly Diversity of electronic products, lack of human expertise, and inconsistency among manually generated assembly plans increase the necessity of Computer Aided Assembly Planning (CAAP) systems for electronics assembly. Artificial Intelligence offers a few techniques to develop the CAAP systems. In a research reported by Srinivasan and Sanii (1988) two rule-based CAAP systems, a backward-chaining system developed in M-1 shell, a forward-chaining system developed in OPS-5, and an object-oriented system developed in Objective-C are suggested. Development of other computer aided assembly planning systems in printed circuit board assembly are reported by other researchers (Ammons, Carlyle, Depuy, Ellis, McGinnis, Tovey and Xu, 1992). 34 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 3.3.2 Surface Mount Technology (SMT) Surface mount technology (SMT) represents a progressive step in packaging and interconnecting (P/I) techniques. When an integrated circuit (IC) carrier, such as a dual in-line package DIP, is modified so that its input/output (I/O) connections are made by surface contact only on the substrate etch, it is known as an SMT component. One criterion for pick-and-place machine performance is the speed which components can be retrieved from the feeder mechanism and placed in the proper location accurately. The speed, or "placement rate" as it is sometimes called, is measured in components per hour (cph); it is also called throughput. The component placement speed for SMT begins at approximately 1000 cph. Mass placement equipment, however, with simultaneous feeds and heads, can place as many as several hundred thousands cph. 3.4 Artificial Intelligence and Expert Systems in Electronics Manufacturing Artificial Intelligence (AI) and expert systems have rapidly developed to assist in the automation of electronics manufacturing, testing, diagnosis, and repair. The systems have received much attention as the competitive environment forces industry to examine new disciplines. They are far from being a panacea, however, and the manufacturing and test engineer should seek help in determining the applicability of AI to an industrial operation. This help is available in the form of seminars, AI symposia, universities, and knowledge engineering groups of larger corporations. 35 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Artificial intelligence is a branch of computer science which attempts to emulate the human reasoning process. The emulation is programmed into a computer, which, given a set of rules, appears to think like a human. Outside the boundaries of the programmed rules, however, the computer cannot make those judgements or decisions which are associated with human intelligence. Thus, a rule-driven computer acts intelligent until the rules are insufficient for an unexpected situation. At this point, it becomes apparent that "artificial intelligence" is probably more "artificial" than it is "intelligent". AI systems, however, can be fast, accurate, and untiring in the performance of their duties, as long as the built-in decision strategies are programmed to deal with the problem at hand. The form for a rule-based system closely resembles a structured description of a "finite state machine" or "production system". A "set of specific conditions" defines the "state of the machine" where the machine in this case is the implemented system. The specific set of "actions", when implemented, modifies this "state" by invoking changes in an order of decisions that previously were determined by inference. The inference method must first recognize that all conditions of the rules haven been met. If there are conflicts arising from those conditions as a result of multiple rules being satisfied simultaneously, it approaches a process which must emulate human reasoning. Then, it becomes important that a working memory or selection of facts about the current state of the system become accumulated. Looking at an example in the manufacturing environment, suppose a rule is needed which said; "If failure is detected in Test Step No. 2 and Test Step No. 1 was successful, then IC No. E-7 is defective." This rule may be formulated as follows: 36 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. ((determine defective part (failed Test Step No. 2 ) (passed Test Step No. 1) (IC No. E-7 is defective)) The rules as stated above declare that, from past experience, E-7 is probably the candidate for replacement, especially if it passed Test Step No. 1 and failed Test Step No. 2. This is an example of the use of heuristic. There may be other reasons why Test Step No. 2 failed and the exact cause might be found if a long path of deterministic procedures or decision trees were traversed. To save time and effort, however, the (human expert) rule is invoked as the most likely cause. A common computer language for the above formalism is 0PS5. It is also structured to deal with conflict resolution. By using such a language, the programmer is freed from worrying about the reasoning process and can instead concentrate on how to represent the knowledge about the decision to be made. 3.5 Summary The characteristics of electronics manufacturing have been explained in this chapter. We specified that competitive electronics manufacturing depends on a fast and accurate assembly process. Assembly planning plays a major role towards the most cost- effective process. Scheduling is the next step to accurately execute the assembly following assembly planning. 37 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Characteristics of electronics manufacturing have been detailed in this chapter. The component types and automatic insertion of those components have been explained. The machine characteristics and layout is an important issue in this industry. There are six major components and six different insertion machines. The components must be inserted in a specific order and the machines must be laid out in the same order in a line. This concept is designated as "the universal technological constraint". The assembly planning in electronics assembly operations is explained. The application of artificial intelligence and expert systems have been briefly mentioned. Recently, these two concepts play an important role in the automation of electronics manufacturing, testing, diagnosis and repair. 38 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 4. DESIGN OF THE INTEGRATED SYSTEM 4.1 Introduction The idea of integration is to build a mechanism to join the planning and scheduling functions in the decision-making of the manufacturing process. This model requires planning and scheduling functions to interact extensively in order to provide more choices for scheduling. Traditionally, manufacturing functions are performed separately and independently. Automation in manufacturing leads to better results if those functions are integrated. Computers play a major role to achieve this goal. The concept of concurrent engineering is developed on the basis of integration. This philosophy recommends the integration of design, process planning, assembly planning, scheduling, and control functions. The input to the integrated system is the material and the description of requirements, and the output of the integrated system is the final product. Assembly planning and scheduling are the two major manufacturing functions which are treated individually in traditional systems. In the integrated system these two functions are performed interactively. The problem with the traditional system is that 39 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. the planning is done prior to the scheduling. In the planning stage each part is planned separately, and in the scheduling stage, different parts are scheduled simultaneously. The main assumption of this approach is that there is no interaction between planning of different parts. In other words, shared resources are not considered in the planning stage. However, in the scheduling stage, jobs compete for machines, tools, operators, etc. By following dictated planning in the scheduling stage, scheduling conflicts, bottleneck, tardiness imbalance in different lines and machines, and other scheduling complications are created. In the integrated paradigm, planning and scheduling are performed in parallel. In this integrated system whenever a resource is available, a job is called with respect to its planning requirements. In other words, among all unfinished jobs, only those jobs which require the available resources are selected as candidates and among those candidates, according to the heuristic, one job is selected. Since this integration model is resource oriented, we will have a better machine utilization in the integrated system. 4.2 Comparison of the Current Planning and Scheduling Approach with the Integrated System In the existing planning and scheduling method, after the design process, the assembly planner chooses the most desirable lines or machines to perform the assembly without considering the availability of resources at the implementation stage. Assembly planners forecast loads on the resources and try to roughly balance these loads in advance, but since assembly planning is done long before the actual implementation 40 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. of plans, they cannot consider the real status of the shop floor in terms of the possibilities of machine break downs or congestion of particular lines. In the real situation, some of the lines are frequently overloaded and some machines break down. In effect, there may be some bottlenecks in the system which result in scheduling complications. The consequences are late jobs and extra costs due to inevitable overtime and air freight for rush delivery. Evidently, these extra costs could be avoided by better planning and scheduling of the production system. We will show that integration of planning and scheduling can improve the performance of the system by reducing the tardiness and increasing machine utilization. According to the integration paradigm, planning and scheduling are performed on the basis of the real situation of the shop floor and availability of resources. Figure 1 shows the traditional and integration paradigms. PLANNING SCHEDULING DESIGN PLANNING SCHEDULING a. Tiadidooal Appioadi b. bitqgnted Appioadhi Figure 4.1: Organization of Traditional and Integrated Approach 41 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 4.3 Specincation of the Focused Factory Plan In order to use real data and to observe the real planning and scheduling problems in an existing circuit board assembly operation, our study has been based on an existing electronics assembly plant. In this plant about 800,000 circuit boards with an average of about 275 components on each board are produced each year. On average, 70 different components (with different part numbers) are used on each board. There are about 350 different assemblies, of which 250 are active in any given month. Planned work-in-process (WIP), ranges from 4 to 15 days which includes insertion, soldering and testing of a board. There are 33 machines on the shop floor: 8 DIP machines, 8 axial machines, 5 radial machines, 2 pin machines, 4 SMTW and 6 SMTR machines. We have considered 15 different assembly lines in this factory. Each line has at least one machine. Some of the lines have up to 6 machines. In our scheduling problem we are only dealing with lines and not individual machines. In other words, we look at each line as a single resource. Individual machines are treated as lines with only one machine. Our study excludes soldering and testing. Figure 3.2 shows the actual layout of the shop floor under study. 4.4 Methodology A heuristic approach, based on simulation, has been developed to show the potential impact of the integrated system of planning and scheduling. The simulator schedules a series of jobs on the basis of a fixed assembly plan and a specific dispatching rule. 42 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. During scheduling, all necessary statistics are collected. These statistics include tardiness, flow time, machine utilization and makespan. The simulator runs the same set of jobs in a concurrent manner of planning and scheduling using a simultaneous assignment algorithm. The same statistics are collected for the integrated system. This process is repeated for different sets of jobs under different scenarios. The comparison of the two results indicates the degree of superiority of the proposed system. The integrated paradigm is designed on the basis of the simultaneous planning and scheduling algorithm, which will be discussed later, and a rule-based system to plan the job-to-assembly line assignment with an appropriate Qualifying Factor (QF). The qualifying factor is a measure that shows the degree of appropriateness of assigning a job to a particular line. No predefined assembly plan is required for the integrated system. The Initial Assembly Plan module analyzes the requirements of each job and configuration of each assembly line and suggests the job-to-assembly line assignment along with a qualifying factor (QF). Determination of the QF is on the basis of flring certain rules in a rule-based system. The final decision is made by the Simultaneous Assembly Planner/Scheduler module. In the later stage of this research we have developed a mathematical model to substitute the rule-base mechanism to calculate the qualifying factors. This mathematical model also has a mechanism to generate the basic assembly plans without any need of the assembly planner. The mathematical model has been explained in the next chapter. 43 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 4.5 System Description The system consists of two major modules: The initial planning module and the simultaneous assembly planner/scheduler module. The initial planning module evaluates the requirements of each job at any moment and specifies the qualified lines for that specific job. Obviously, all the qualified lines are not equally appropriate for each job. The degree of appropriateness is determined by using the knowledge about the appropriateness of a given line or machine for a specific job, such as set up time, assembly cost, and throughput time. This knowledge is transcribed into rules in the context of a rule-based system. The other major module of the system is the simultaneous assembly planner/scheduler. This module determines the final assembly plan and schedule, which would be executed on the shop floor. This module receives the initial assembly plans as suggested by the initial assembly plan module. According to the status of the shop floor in terms of the availability of the lines (machines), this module assigns the most appropriate job to an available line. The major files that provide the necessary data for the two modules are: 1. The order file consists of all orders that the factory has received either from the customer or from the sales department on the basis of sales forecast for the next 6 months. Each order includes an order number, product identification number, batch size, and delivery date. This file shows the commitment of the factory for the next planning horizon. 44 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 2. The job file which is generated from the order file is a list of jobs derived from the order file using the master schedule. These jobs must be processed in the current planning horizon. Again, each job in the job file consists of a job number, product ID number, batch size, and due date. 3. The parts list file provides the type and quantity of the components which constitute an assembly. For each assembly board which is identified by an ID, all the necessary components and their quantities are given in this file. 4. The manufacturing component library file provides the information about each component including length, diameter, number of pins, and type. The types of components in use are SMT(R), DIP, AXIAL, RADIAL, PIN, and SMT(W). 5. The assembly planning file (basic routing) shows the basic assembly plan which is usually the most desirable assembly plan for each PWBA. This file consists of the assembly ID number and the basic assembly plan. 6. The layout file (lines layout) shows the current layout of the factory. This file shows the configuration of all the lines in terms of machine types and number of each machine type in one line. Each line has a line ID number and each machine has a machine identification number. 7. The information about the machines is obtained from a machine definition file which is built using the machine manufacturers' specifications. Figure 4.2 illustrates the modules and components of the integration system. 45 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. MASTER SCHEDULE ORDER FILE JOB LIST PART USX UNES LAYOUT BASIC ROUTING MFG. COMPON. LIBRARY MACHINE DEFINITION SIMULTANEOUS PLANNER/SCHEDULER MODULE UNFINISHED JOBS FINISHED JOBS SHOP FLOOR STATUS DISPATCH LIST Figure 4.2: Simultaneous Assembly Planning and Scheduling System (SAPS) 4.5.1 Knowledge Representation in the Proposed System Effective representation of knowledge is one of the key issues in knowledge-based systems. Domain knowledge typically has many forms, including descriptive definitions of domain-specific terms, description of individual objects and their interrelationships, and criteria for decision-making. There are different knowledge representation schemes like logic, fiâmes, production rules, and etc. The suggested system uses the production-rule scheme. These rules are written on the basis of the 46 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. knowledge regarding the capability of each line and requirement of each order. Determination of the qualifying factor (QF) is on the basis of firing the appropriate rule. The following are some sample rules that have been used in the rule-based system. IF all the required machines are available on the line AND the number of unused machines on that line is zero THEN QF=100 IF all the required machines are available on the line AND the number of unused machines in that line is 1 THEN QF=90 IF the number of required operations of a job is 6 AND only 4 operations can be performed on the line THEN QF=80 IF the number of required operations of a job is greater than 4 AND only one operation can be performed on the line THEN QF=10 47 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 4.6 Simultaneous Planning and Scheduling (SPS) Algorithm The SPS algorithm works on the basis of an opportunistic planning approach which assigns the jobs to the machines on the basis of availability of the machines and requirements of the unfinished jobs. This algorithm has the following steps: 1. Construct a set of unfinished jobs listed in the job list, J={j%, j 2 ,...jj, and specify aU the required operations of each job in the set. 2. Construct a set of all of the available assembly lines, L={lj, l;,...!^,}. For each element of this set, construct a subset including all of the jobs which can be processed completely or partially by that line, for example, L3 ={ji, js, j?, j,}. 3. For each L;, calculate the corresponding QF and construct a new set including pairs of each job and its corresponding QF and call it QFL;, for example, for L3 we wUl have QFL3={{j„100},{j5,90},{j7.100},{j9,75}} 4. For each available line, according to the selection strategy, select a job with the highest value of selection criterion. Immediately assign that job on that line and delete that job from all QFL; sets. This means that the job is not available for other lines at this time. The selection criteria considers the qualifying factor and priority dispatching rule. For example, a selection criterion may apply a rule which recommends to choose a job with the highest QF among the first three jobs with the Earliest Due Dates. 48 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 5. When a line has completed processing a job, check the status of that job. If all the required operations of that job are completed, record the completion time of that job and immediately delete that job from the job list. Otherwise, send it back to the jobs list for further operations and go to step 1. 6. Repeat this process until all of the QFLjS are empty. 4.7 Measure of Performance The performance objective of meeting job due dates is the scheduling criterion which is frequently used in practical problems. While meeting due dates is the main goal, it usually implies that time-dependent penalties are assessed on late jobs but no benefit is gained from early completion of jobs. Thus, mean tardiness can be a good performance measure. The difficulty of dealing with mean tardiness and with most other tardiness-based performance measures arises from the fact that tardiness is not a linear function of completion time. This means that to find optimal solutions to such problems, it is usually necessary to rely on the concept of combinatorial optimization (Baker, 1974). Because of the complexities of combinatorial methods, more attention is paid to efficient techniques that result in a suboptimal outcome. Problems based on average tardiness are well known to be NP-complete (see Lawler, 1977). Hence, optimal solution algorithms, such as branch and bound or dynamic programming, can only be used for small problems. Several heuristic approaches have been suggested for solving larger problems. Schild and Fredman (1961) proposed ordering the jobs first according to the Shortest Processing Time (SPT) and then conducting pairwise 49 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. comparisons of early and late jobs in the resulting sequence. Wilkerson and Irwin (1971) suggested a similar procedure, but they recommend to generate the initial sequence according to the Earliest Due Date (EDD). In order to obtain our preliminary results in our SPS algorithm we have used the EDD priority dispatching rule. However, the Wilkerson and Irwin algorithm may be used to achieve better results in the integrated system. This algorithm, which is more involved, will be used in the further stages of our research. 4.8 An Example In order to illustrate the superior performance of the integrated system using the SPS algorithm the following example is presented: Consider a series of 20 batches of jobs with different due dates. The information about these twenty batches of jobs are given in Table 4.1. Table 4.1: Job List lob# Product ID Batch Size Due Date Job# Product ID Batch Size Due Date 1 107 576 37.5 1 1 107 116 0.6 2 105 782 23.1 12 109 552 2.4 3 111 900 5.6 13 107 616 35.6 4 109 186 31.1 14 109 102 18.2 5 103 848 28 15 103 316 15.8 6 109 822 30.8 16 109 282 14.7 7 111 520 8.3 17 103 416 18.1 8 109 322 28.6 18 101 686 3.1 9 111 520 32.8 19 107 780 20.8 10 109 30 17.8 20 105 866 23 50 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The information regarding the component types and quantities of each circuit board is shown in Table 4.2. This table shows the list of components required for each specific circuit board design with a unique assembly ID. Table 4.2: Assembly Components List (Part List) Product ID SMTR DIP AX RAD PIN SMTW 101 0 100 45 55 25 45 102 100 85 80 45 80 40 103 0 193 0 0 85 0 104 0 190 45 90 50 0 105 185 92 94 13 52 62 106 220 80 80 90 0 25 107 0 180 95 88 0 0 108 120 0 0 0 0 132 109 110 60 70 73 0 60 110 0 1 6 7 3 4 111 0 87 59 71 0 67 112 0 164 18 139 0 0 Table 4.3: Bask Assembly Plan Product ID Assembly Plan Product Assembly Plan 101 1 107 3 102 6,1 108 5 103 8,15 109 7,2 104 3,15 110 1 105 7,1 111 2 106 6,2 112 4 The basic assembly plan shows the required set of assembly lines for each board. 51 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. These lines are chosen by the human assembly planner. The basic assembly plan is the best plan with respect to processing cost for each assembly provided that the required resources are available as soon as the job becomes ready. Table 4.4: Line Configuration Line# SMTR DIP AX RAD FIN SMTW 1 0 I 2 1 1 t 2 0 t Z '1 0 t 3 0 z i 1 0 0 4 0 ‘ â– 'i. . . . . . . . . . . . . . . 1 t 0 0 5 2 0 0 0 0 1 6 z 0 0 0 0 0 7 z 0 0 0 0 0 8 0 1 0 0 0 0 9 0 1 0 0 0 0 10 0 t 0 0 0 0 11 0 0 1 0 0 0 12 0 0 0 1 0 0 14 0 0 0 0 0 15 0 0 0 0 0 The simulation software is able to simulate any set of jobs in two different ways. First, the system simulates the jobs according to the basic assembly plan (conventional way) and then it simulates the same set of jobs using the SPS algorithm (integrated way). The two sets of results for this example are shown in Table 4.5, 4.6, 4.7 and 4.8. 52 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 4.5: Flow Time and Tardiness for the Conventional System Job# Flow Tardiness 1 Job# Flow Tardiness 1 52.4 14.94 â– H 11 2.95 2.39 2 61.26 38.15 H B 12 32.42 28.09 3 21.78 16.16 H 1 13 37.95 2.32 4 92.95 61.9 B 14 58.11 39.9 5 95.59 67.62 H H 15 24.58 5.01 6 89.82 59.07 B H 16 55.85 41.13 7 51.12 42.86 H H 17 44.56 26.42 8 76.1 47.45 H H 18 19.09 16 9 70.7 37.92 B H 19 22.5 1.65 10 56.38 38.54 â– H 20 41.24 18.24 Table 4.6: Line and Machine Utilization for the Conventional System Line# SMTR DIP AX RAD PIN SMTW LineUtiliz 1 Û.64 043 00^ 015 i ü t i n É 0.64 2 i i i i i i i '::<k47ü.:\: 0.97 3 "oJ55 ... 0.55 4 i ü S É i i i i W 0 5 0 i i ü i i i i i i 0 6 0 7 0.4...! " 0.4 8 i l S t e i i i 0.9 9 i i l i É i i 0 10 . ,b ; â– 0 11 a 0 12 0 13 0 14 0 15 i i i i i i i 0.2 Table 4.5 and 4.6 show the tardiness and machine utilization for 20 jobs and 15 lines. The average tardiness in the conventional planning and scheduling system for this example is 30.29 hours. The makespan in this example is 95.59 hours. 53 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The performance results of the integrated system are shown in Table 4.7 and 4.8. The average tardiness in the integrated system for this example is 12.93 hours which shows a 57% improvement over the conventional method. The makespan in the integrated system is 73.06 hours which shows a 23% improvement over the conventional method. Table 4.7: flow Time and Tardiness for the Integrated System Job# Flow Time Tardiness Job# Flow Time Tardiness 1 69.07 31.62 11 5.83 5.27 2 40.52 17.42 12 14.55 12.14 3 19.41 13.78 13 40.99 5.37 4 30.88 0 14 17.12 0 5 73.06 45.09 15 20.85 5.01 6 41.18 10.42 16 16.27 1.55 7 28.54 20.28 17 28.14 10 8 24.46 0 18 27.52 24.44 9 37.06 4.27 19 58.83 37.98 10 14.8 0 20 36.97 13.96 Table 4.8: Line and Machine Utilization for the Integrated System Line# SMTR DIP AX RAD PIN SMTW utilization 1 0,5 0,12 0,11 3.09 0.51 2 0,51 0.08 :0d'- K ..\ ' 0.51 3 0.$4 r : : : : 0.41 ; 0.56 4 0,47 0 " " ' ' 0 .# 0.57 5 liÜ ig iÉ üüteiü 0.24 6 b.17 0.17 7 0.19 0.19 8 0% 0.86 9 " 0 5 ................. 0.75 10 Oj» 0.53 1 1 0.13 12 0.16 0.16 13 0.29 0.29 14 0.14 15 iü ii 0.37 54 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. This example demonstrates the evaluation results of a single scenario in which 20 jobs are to be delivered at the specified due dates. Since reliable statistical inferences may not be made using a simple sample point, more extensive simulations have been performed. In this simulation, the method of independent replications is used. In each replication a certain number of jobs with random due dates within a plaiming horizon is generated. Each job is assigned a random size (order quantity) between 1 and K X M ) units. Also, the number of type of components needed in each job are randomly selected. The number of components are distributed uniformly between 1 to 200. A component type can be either of SMT(R), DIP, AXIAL, RADIAL, PIN, or SMT(W). The total number of replications used in this simulation is 30. In other simulation runs, we have randomly generated different sets of jobs and to each set of jobs we have applied both the conventional and integrated approaches. The results of the corresponding simulation runs are summarized in Figures 4.5, 4.6, 4.7, and 4.8. In each figure the comparison of the two approaches in terms of one particular performance measure is shown. The performance measures are: average tardiness, machine utilization, makespan, and average flow time. Obviously, the integrated system requires more computation time for each simulation run. 4.9 Evaluation of Preliminary Results In the conventional approach, where the scheduling function is isolated from assembly planning, the optimization priority is given to the assembly planning criteria. The output of assembly planning then sets a class of constraints on the solution space of the 55 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. scheduling problem. The second stage of optimization takes place at the time of scheduling, where an attempt is made to allocate production resources to various processes as dictated by the assembly plans. Obviously, the scheduling function can generate less costly schedules if the constraints on its solution space are relaxed. In other words, the trade-off here is between the cost of having less than optimal assembly plans versus having less than optimal schedules. to o . System! Integrated System 90 80 I 70 60 50 t — w 30 20 lO IC O 90 80 70 60 50 40 30 2 0 lO Figure 4.3: The Result of Simulation Runs for Average Tardiness Simulation experiments have shown that the performance of the integrated approach is significantly better than that of the traditional approach, especially when a relatively large number of urgent jobs with early due dates must be processed within the planning horizon. We have compared the performance of the conventional and integrated systems in terms of four types of measures. The results of different simulation runs have been shown in Figures 4.3, 4.4, 4.5, and 4.6. The simulation runs show that the integrated system is undesirable when due dates are in the distant future and the shop is not committed to processing too many jobs within a limited time frame. This approach results in intense machine and operator utilization. 56 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. When due dates are in the distant future this intense utilization period may be followed by idle time euid excessive accumulation of finished part inventories to be shipped to customers at the due dates. This serves to explain that there is a need for the establishment of a criterion for selection of either the traditional model or the integrated model in a given production scenario. The SPS algorithm benefits from the advantage of converting the complicated scheduling problem of "n jobs and m machines" into a "single machine" problem which is much easier to handle and has algorithms available for optimal or suboptimal sequencing of jobs. However, SPS lacks two major properties, namely, global assignment and vision into the future. Notice that in each assignment stage only one available line is considered for the available jobs and, at the line level, the assignment is done locally without considering the possibility of other lines which may be more favorable for those jobs. The other shortcoming of this algorithm is that it does not consider the upcoming machine availabilities and the possibility of more favorable assignments, that is, it looks at the status of lines at each epoch of time rather than in an interval of time. 200 â– +â– T i ^ â d i ü o n a l S y s t e m ! Integrated System 180 160 140 120 IC O 80 f 60 40 20 lO 2 0 30 40 S O 60 70 80 90 lO O Figure 4.4: The Result of Simulation Runs for Average Flow Time 57 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Our recent modiilcations of the algorithm have resulted in some progress. The modifications are primarily based on penalizing inappropriate assignments. Introducing the Qualifying Factor, which shows the degree of appropriateness of each assignment, has played a major role in the improvement process. A relatively low QF indicates a possible chance of a better assignment in the near future. Incorporation of QF into the assignment algorithm has partially alleviated the problem of local assignments and lack of vision into the future. 600 500 400 i 300 2. 00 lO O 20 6 0 7 0 ID 30 50 8 0 90 lO O Number of Jobs Figure 4.5: The Result of Simulation Runs for Makespaii 70 + Ti * In aditiona « g r a t e d System] System | 60 50 I 40 30 f 20 lO lO 20 30 40 50 60 70 80 90 lO O Figure 4.6: The Result of Simulation Runs for Average Machine Utilization 58 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 4.10 Summary In this chapter, the idea of integration of manufacturing functions is explained and compared with the traditional way of planning and scheduling. The philosophy of concurrent engineering rests on the basis of integration. Traditionally, assembly planning and scheduling as two manufacturing functions are treated individually. In our integration paradigm, however, planning and scheduling are performed in parallel. The designed system works on the basis of the opportunistic planrting approach. Since this integration model is resource oriented, we will have better machine utilization in the integrated system. In another section of this chapter, the organization of the traditional and integrated approaches are illustrated. On the basis of this organization, our integration system has been developed. This system consist of two major modules. The initial planning module performs the preplanning without any real assignment. The scheduling module determines the final assembly plan and schedule. Each assignment is evaluated by a factor called "Qualifying Factor". The qualifying factor in this state of research is found though a rule-based table. This factor will be calculated mathematically in the later stage of this research. The Simultaneous Planning and Scheduling algorithm (SPS) is developed. This algorithm is developed on the basis of the opportunistic planning approach. Four measures of performance are defined for the evaluation of the system performance. The performance of the system is tested by running an example by the system and comparing the results with the traditional approach. The results of simulation show that the performance of the integrated system is much better than the basic system. 59 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 5 MATHEMATICAL MODEL OF THE INTEGRATED PLANNING SYSTEM During the proÅ“ss of this research, we realized that we needed to formulate some of the planning concepts and generate some mathematical tools and mechanisms in order to develop an improved version of the integrated system. By thoroughly studying the characteristics of products and lines, we discovered that the fundamental concepts of Boolean vectors and Boolean matrices can be used to generate mathematical formulas for assembly planning concepts. In order to develop and use the theory of Boolean matrices, we started with the concept of Boolean algebra. Boolean algebra is named after the British mathematician George Boole (1813-1864). For properties of Boolean algebra, the reader is referred to S. Rudeanu, F.E. Hohn and A. Abian. For an application of Boolean algebra for operations research, see P.L. Hammer and S. Rudeanu. 5.1 Vector Characterization of the Planning System An electronic wiring board product with inserted components can be characterized by a vector with "n" number of entries. Each entry is a numeric value (integer) which 60 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. shows the number of a specific type of component used in that product. A product p can be shown as a vector P in the following form: P = (Ci, C 2 , C3,...,cJ C ; e N lik n For every vector P of product p, a characteristic Boolean vector, BP, can be defined in such a way that each entry of this vector is defined as follows: B P . . V Otherwise A line can be characterized as a vector with "n" number of entries. Each entry is a numeric value (integer) which represents the number of particular machine m ^, in that line. A line 1 can be shown as a vector L in the following form: L = (mi, mj, m3,...,nO m, e N l^kn For every vector L of line 1, a characteristic Boolean vector, BL, can be defined in such a way that each entry of this vector is defined as follows: . I ' ^ [ 1 O t h e r w i s e The vector BL=(BL„ BLj, ..., BLJ is a Boolean vector which shows the existence of each machine type in each line. The entries of this vector are either 0, which means there is no such type of machine in that line, or 1 meaning there exist that particular type of machine in that line. 61 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The vector BPL is defined as a Boolean vector which represents the best line configuration for a specific product p. This means that line 1 has exactly the types of machines which are required for assembling product p so that when product p leaves line 1 , all of the necessary operations are performed without bypassing any unnecessary macMne, 5.1.1 Kroncker Product of Two Boolean Vectors: The two Boolean vectors, BP and BL have been defined. The former represents the existence of different component types in a product or a job and the latter represents the existence of different machine types in a line. In order to evaluate the functionality of a line with respect to a particular product, the following definitions are required: The Kroncker product of BP and BL is a Boolean vector Bd, which is formed by the product of corresponding elements of the two Boolean vectors of BP and BL: Bd = BP o BL In the Boolean vector of Bd, 1 means that the required machine for a particular component is available in the line, and zero will represent either of these three cases: one, the required machine for a particular component is not available in the line, two, there is a particular machine in the line which is not required by product p, and three, a particular type of component or machine needed for that component is not available neither in product p, nor in line 1 . 62 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 5.1.2 Definition of "Break Point" in Boolean Vector of Bd: The Technological Constraint phenomenon limits the utilization of some of the machines in the line. In other words, since the components must be inserted in a specific order, if a particular machine is not available in a line, the rest of the machines in that line cannot be utilized unless that type of component is inserted by other machines in other lines. This particular corresponding point in the Boolean vector is called "Breakpoint". Comparing the two vectors BP and Bd, if we move from left to right in BP, the first point that BP, is 1 and Bd; is zero, is the break point in Bd. The Boolean vector of Bd* is defined as follows: I rf, if i < Break point \ o if i ^ Break point 5.1.3 "Norms" of Defined Boolean Vectors: By definition, the Norm Vector of a vector V is defined as: IIVII = summation of all entries of vector V 63 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. If vector V is defined as ; y = (Vi,Vy...,v^ v^eN , l a i z M Then the norm vector of V is: I I 'I â– E " , /• I According to this definition, the following notations are defined: ||d*||: number of utilized machines in a line <& (p,l) = llBLi - l|B d*ll : number of unutilized machines in line 1 for product p 0(p,l) = IIB P II - ||Bd*|| : number of unserviced types of components in line 1 for product p Example: suppose: BP = (1,1,0,1,1) BL = (1,1,1,0,1) Then: Bd = (1,1,0^0,1) Break point Bd* = (1,1,0,0,0) ||d*ll= 1 + 1 =2 $(p,l) = IIB L I I - ||Bd*jj =4-2 = 2 0(p,l) = iBPjj - ||Bd*|| =4-2 = 2 64 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 5.1.4 Other Definitions: X; = The ratio of unutilized machines in one line to the total number of machines in that line. ^ _ < t > (P.Q ' " \BL\ X; = The ratio of unserviced component types to the total component types in product p. y _ e(p,/) ' " \BP\ 5.1.5 Definition and Properties of Suggested Function p : P is defined as a numerical value between zero and one which shows the inappropriateness of the process of product p on line 1 , When p is zero it indicates that the line is perfect for that particular product. In other words, all of the required operations are performed on the line without bypassing any unutilized machine. p = X, +Xz - X 1X 2 p(«/) = *0 ^ 0 + Q(p>0 _ \BL\ \BP\ \BL\.\BP\ 65 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. For each product p; we can calculate the value of p(Pi,lj) on each line Ij. The lowest value of p among all the lines indicates the best choice of planning for that particular product. We call this value : P*(pi,lj). This value will be later used to generate basic assembly plans for all the products. 5.2 Mathematical Dennition of Qualifying Factor : QF By definition, Qualifying Factor is the degree of appropriateness of a particular line for a particular product. This value can be defined as follows: QF(p^ip - } l î È Æ 1- P w ; Again, the Qualifying Factor is a numerical value between zero and one. 5.3 Generation of Basic Assembly Plans Using p* Function According to the definition of P*(pi,lj), basic assembly plans can be generated. For each product p; with respect to every single line of Ij, the value of p(p;,lj) is calculated. The minimum value of p(pj,^), shows the most appropriate line for that product. This value is again P*(p;,lj). 6 6 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 5.4 Properties of the Integrated System The designed integrated system has extensive flexibility by controlling the qualifying factor. By setting a limit on the value of the qualifying factor, different performances in the system can be achieved. For example, if we limit the qualifying factor to one i.e., one hundred percent, the best line selection with no compromise for machine utilization will always be achieved. This does not mean that this case is equivalent to the conventional method in which the basic assembly plan is selected. In fact this is another advantage of using the proposed system which automatically considers all the equivalent lines and assigns the jobs to equivalent lines upon availability. For example, in a shop floor which has some identical lines, in the conventional method, a job may be assigned to one of the identical lines without considering the availability of other identical lines. In the proposed integrated system, all identical lines are automatically considered and as soon as one of them is available, the assignment is performed. By controlling the limit on the qualifying factor, we can achieve different performances. Depending on which performance measure we are more concerned with, we may tune the level of the qualifying factor so as to optimize that particular measure. For each performance measure we can set different limits on the value of qualifying factor and gain a different performance. By simulating the system, using a range of qualifying factors between zero and one, we can achieve different performances. We will discuss this issue in the analysis of results in other chapters. 67 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 5.6 Summary In this chapter, we developed a mathematical model for the job-line assignment. Each line as well as each job is represented by a vector. By applying the Boolean vectors concept, we could define the p function which shows the degree of inappropriateness of a job-line assignment. By using the p function we could generate all the basic assembly plans as well as the qualifying factors automatically. 6 8 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 6 SIMULTANEOUS PLANNING AND SCHEDULING SYSTEM USING A MATHEMATICAL MODEL 6.1 Introduction In chapter 4 we explained the integrated paradigm and presented the initial results of simulation on the basis of limited scenarios and rule-based tables. The examples, as well as the simulation results in Chapter 4, show the superiority of the integrated system. However, the qualifying factors in the initial experiments were obtained using the rule-based tables which had no scientific base for those values. Also, in that chapter, the basic assembly plans were supposed to be given by an assembly planner and there was no mechanism to find out the assembly plans automatically. Another limitation in the initial integrated system was the specification of the designed system, which was based on a specific factory plan and layout. In this chapter we will try to alleviate all of the above shortcomings. A generic simultaneous planning and scheduling system is presented for use in any electronics assembly operations. This system, which is based on heuristics using a mathematical model, is called Simultaneous Assembly Planning and Scheduling system (SAPS). 69 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 6.2 Overall System Description SAPS is a computerized dispatching system which incorporates a mathematical model into a smart algorithm on the basis of the opportunistic planning concept. The SAPS system consists of two major modules; an initial planning module and a simultaneous planning and scheduling module. Different data files support and provide the necessary data and information for the SAPS system. The two major modules interact during the operation. The mathematical model is incorporated and used in the initial planning module. SAPS is a generic integrated system which receives the necessary data from different data files like: order file, lines layout, part list, and shop floor status. The system generates basic assembly plans and, using the mathematical model, calculates the qualifying factors for each job-line assignment. By processing the required data, the system produces the dispatch list and the complete schedule as well as the results of the performance measures of the system. SAPS is also capable of generating any job list scenario, simulating the jobs for a given shop floor configuration, and producing the results. Figure 6.1 demonstrates the flow of information in the system. 70 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. JO B LIST PA RT LIST LIN E CONFIG. SAPS SYSTEM O aA T tt MODELZ) IN m X L PLANNING MODULE ISHOP FLOO R 1 STATUS SIMULTANEOUS PLA N N IN G * SCHEDULING MODULE COM PLETE SCHEDULE RECORDED STATISTICS Figure 6.1 : Simultaneous Assembly Planning and Scheduling System (SAPS) 6.2.1 Preplanning Operations The initial planning module receives all the initial data from different files. Using mathematical formulas, it generates all the basic assembly plans for all unfinished jobs. No assignment is done at this stage. For each job in the job list, the initial planning module checks the manufacturing requirements of that particular job by retrieving the part list from the part list file. Considering the line configuration, the initial planning module places that particular job in front of all the lines which are capable of inserting all or part of the assembly requirements of that particular job. At the same time the qualifying factor, QF, is also calculated by the initial planning module and is registered as the attribute of each job-line assignment. This operation is called the preplanning operation. At the end of this operation all jobs are hypothetically queued in front of all the potential lines. 71 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 6.2.2 Scheduling Operations At the second stage of the SAPS system operations, the opportunistic planning concept is utilized. As soon as a line is available, the first job in the queue in front of that line is assigned to that particular available line and that job is immediately deleted from all other lines in the system. When the operations of a job in a line are completed, the status of that job is checked. If all the required operations of this job are completed, then the statistics are recorded and the job is tagged as a finished job and exits the SAPS system. Otherwise, as an incomplete or unfinished job, it will go back to the initial planning module for further operations. The unfinished job in this module is treated as a new job and all the procedures are applied on this job until it is tagged as complete. 6.3 System Capabilities and Functions The SAPS system is designed as a generic planning and scheduling system capable of processing any electronics assembly scenario. For any given situation, the system generates all the outputs including the dispatch list and the result of performance measures. The SAPS system is also capable of generating any random figures for random jobs, process them, and produce the corresponding results. In other words, this is a test bed for further research considering different scenarios and different algorithms. In terms of modularity, the SAPS system is designed in a complete modular way in such a manner that any change in terms of using a different algorithm or mathematical formula is possible without changing other modules in the system. 72 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The SAPS system has an editing environment for providing any changes or modifications in any file. For example, during the factory operations, should any line or machine break, the user can access the line configuration file, make all the necessary changes, and then run the system for the current shop floor situation. The SAPS system has the flexibility for the user to apply any priority dispatching rule such as. Earliest Due Date (EDD), Shortest Processing Time (SPT) or Longest Processing Time (LPT). However, if the user wants to apply any dispatching rule which is not already built in the system, he or she can simply add to the modules of the system without changing the system structure. After processing a given job shop scenario, the system automatically saves the results in the output files and also draws four graphs as illustrations of system performance. These four graphs are average tardiness, average flow time, average line utilization, and makespan. The system also shows the results in the form of tables in such a way, that the user can see them on the screen. 6.3.1 Random Job Generation in the SAPS System The SAPS system is capable of randomly generating any number of jobs. Each job has some specific attributes like job number, job ID, due date, and the batch size. There are 60 different products already built into the system as examples so that the system can choose any of them randomly upon random job generation. There is also a specific mechanism designed in the system to choose the due dates. This mechanism considers 73 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. the total processing time of all the jobs to be generated and on the basis of a uniform distribution between starting time and the summation of all processing times, a random number is picked up as a due date of each job. The batch size for each randomly generated job is a random number between one and 1000 with a uniform distribution. The product ID number is also randomly generated out of the 60 different products already built into the system. 6.4 Lnplementatlon of the Simultaneous Planning and Scheduling Concept Using the SAPS System In order to utilize the SAPS system and analyze the simulation results, different batches of jobs are randomly generated by SAPS. To consider the statistical analysis requirements, all jobs must randomly become generated with no biasness. For each population of job size, a sample is generated and processed by SAPS. For each particular sample size, this process has been repeated 30 times and the results of the performance measures have been averaged by the system. The average is one data point in the plot for each performance measure. In one particular experiment, different sample sizes are chosen between 5 to 100 and for each sample size, 30 different job scenarios have been experimented and simulated. The results of simulation in the SAPS system is shown in the following tables and graphs. This experiment shows the superiority of the integrated system with respect to the conventional system. 74 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.1 shows quantities of all elements required for each product. Table 6.1: Product Requirements for 60 Items ID SMTR DIP AX RA PIN SMTW 101 0 100 45 55 25 45 102 100 85 80 45 80 40 103 0 195 0 0 85 0 104 0 190 95 90 90 0 105 185 92 94 13 52 62 106 220 80 80 90 0 25 107 0 180 95 88 0 0 108 120 0 0 0 0 132 109 110 60 70 73 0 60 110 0 125 67 74 35 49 111 0 87 59 71 0 67 112 0 164 185 139 0 0 113 0 200 200 200 0 0 114 0 140 150 190 180 0 115 180 0 0 0 0 120 116 30 40 60 30 90 32 117 80 40 45 30 100 0 118 0 50 50 50 50 25 119 0 35 85 42 0 0 120 0 45 39 72 20 0 121 40 0 0 0 35 0 122 50 0 0 0 80 45 123 180 90 52 0 190 45 124 90 45 90 95 170 30 75 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.1: Product Requirements for 60 Items ID SMTR DIP AX RA PIN SMTW 125 0 72 0 0 0 0 126 0 90 80 0 0 0 127 0 0 45 38 0 0 128 0 0 55 45 100 0 129 0 0 0 90 84 0 130 0 100 0 0 120 0 131 0 120 0 0 40 0 132 10 5 15 18 13 8 133 0 100 0 90 108 0 134 0 120 100 0 180 0 135 20 105 85 43 70 10 136 30 0 60 65 95 0 137 45 95 0 0 85 32 138 75 95 38 42 100 60 139 0 0 100 0 120 0 140 0 0 0 0 180 0 141 0 100 20 0 100 0 142 10 0 0 0 0 0 143 0 0 0 0 0 110 144 0 30 30 30 50 0 145 0 180 0 0 200 50 146 10 100 120 110 250 12 147 12 50 60 70 0 0 148 140 0 0 0 100 0 149 1 0 0 80 85 0 0 150 0 60 70 35 100 0 151 40 0 0 0 0 50 152 0 0 0 0 0 60 76 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.1: Product Requirements for 60 Items ID SMTR DIP AX RA PIN SMTW 153 0 60 65 41 100 0 154 15 100 45 65 120 0 155 20 180 145 100 200 35 156 0 180 170 190 180 0 157 0 120 125 135 0 0 158 16 0 0 0 0 20 159 20 60 65 45 80 22 160 30 60 60 60 70 30 The above table shows the characteristics and requirements of 60 different products. There is at least one component type in each product. The maximum component type is six. Each product is identified by an identification number (ID). This table has been used to generate random jobs. 77 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.2: Basic Assembly Plan for 60 Products ID BASIC ID BASIC ID BASIC 101 1 102 6,1 103 8,15 104 1 105 6,1 106 6,2 107 3 108 5 109 6,2 110 1 111 2 112 3 113 3 114 1 115 5 116 6,1 117 6,1 118 1 119 3 120 1 121 6,15 122 6,15,13 123 6,1 124 6,1 125 8 126 3 127 3 128 1 129 12,15 130 8,15 131 8,15 132 6,1 133 1 134 1 135 6,1 136 6,1 137 6,1 138 6,1 139 11,15 140 15 141 1 142 6 143 13 144 1 145 1 146 6,1 147 6,3 148 6,15 149 6,3 150 1 151 5 152 13 153 1 154 6,1 155 6,1 156 1 157 3 158 5 159 6,1 160 6,1 The above table shows the basic assembly plan for each product. These assembly plans have been generated by the integrated system. This table has been used to compare the traditional assembly planning and scheduling system with the integrated system. 78 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.3: Comparison of Average Flow Time in Basic and In fla te d System Job Size Basic Integrated (QF=0) 5 16.64 13.63 10 20.65 16.41 15 31.02 22.03 20 40.71 27.01 25 43.83 30.65 30 46.83 34.57 35 57.61 41.70 40 64.88 44.79 45 72.76 50.86 50 85.18 59.22 55 79.94 58.60 60 90.76 66.88 65 97.22 70.43 70 101.21 70.94 75 116.52 84.36 80 117.83 83.98 85 119.54 84.55 90 129.22 93.66 95 138.06 100.33 100 152.48 107.77 This table shows the comparison of the integrated system with the traditional planning and schedule system in terms of average flow time. The results of simulation show that the integrated system performs better than the traditional system. This improvement can be seen in the above table. 79 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.4: Average Tardiness in Basic and Int^ated System Job Size Basic Integrated (QF = 0) 5 13.57 10.56 10 15.83 11.70 15 27.88 19.02 20 36.20 22.49 25 40.02 26.82 30 43.28 31.01 35 53.48 37.56 40 60.61 40.52 45 68.37 46.43 50 81.61 55.63 55 75.63 54.28 60 86.53 62.65 65 91.89 65.08 70 97.06 66.77 75 112.02 80.33 80 113.73 79.88 85 115.40 80.40 90 125.16 89.60 95 134.22 96.49 100 148.50 103.79 Table 6.4 shows the comparison of the integrated system with the traditional planning and scheduling system in terms of average tardiness. The results of simulation show that the proposed system is advantageous to the traditional planning and scheduling system. This improvement can be seen in the above table. 8 0 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.5: Makespan in Basic and Int^rated System Job Size Basic Integrateed (QF = 0) 5 29.64 26.80 10 45.80 36.19 15 69.84 53.09 20 101.65 65.54 25 112.67 73.77 30 126.34 82.60 35 157.58 99.30 40 173.68 104.46 45 200.65 121.55 50 231.58 138.25 55 220.21 136.17 60 262.77 161.81 65 281.47 170.20 70 291.57 168.74 75 333.53 202.09 80 345.60 204.67 85 359.18 205.67 90 376.47 223.97 95 412.61 240.89 100 443.96 258.26 As table 6.5 shows, the makespan in the integrated system is shorter than in the traditional system. The comparison of the performance of these two systems indicates that this improvement is very significant. 81 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Table 6.6: Average Line Utilization in Basic and Int^rated System Job Size Basic Integrated (QF = 0) 5 0.074 0.155 10 0.069 0.209 15 0.054 0.216 20 0.050 0.210 25 0.047 0.197 30 0.046 0.193 35 0.037 0.165 40 0.033 0.174 45 0.033 0.153 50 0.027 0.130 55 0.031 0.137 60 0.026 0.122 65 0.025 0.118 70 0.024 0.118 75 0.023 0.107 80 0.022 0.112 85 0.020 0.106 90 0.022 0.099 95 0.020 0.094 100 0.019 0.093 The above table shows that the average line utilization in the integrated system is more than the traditional system. This can be interpreted as the improvement of the system using the integrated paradigm. 8 2 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. In another experiment, the concept of the qualifying factor is examined. This particular experiment examines the impact of different limits on qualifying factors on the performance measures and are all compared with the results of the basic assembly plan. For all the performance measures, the results of the integrated system for any limit of qualifying factor is better than the basic assembly plan. For the integrated system, the results of performance measures depend on many factors including the batch size. For any job shop scenario, the SAPS system can experiment and simulate a range of QF limits and determine the optimum value of QF limits for the best performance in the integrated system. The results of this experiment are illustrated in the following figures. 83 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. M 2 k e s P a n 700 600 500 400 300 200 100 0 0 20 40 60 80 100 120 140 160 Job Size B asic QF-0.01 Q F-0.6 —■--------B-------- ---- QF=1 — * — Figure 6.2: Comparison of Makespan in Basic and Integrated System The results of simulation show that the makespan in the integrated system is shorter than in the basic. The simulation also shows that the more the level of the qualifying factor is relaxed, the shorter the makespan becomes. 84 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 250 A V 200 g- T 150 a r 100 d â– 50 n e 0 s s 60 80 100 Job Size Batte QM)A1 QMW Q F > 1 — â– ---------- B — — -------------- *— 120 140 160 Figure 6.3: Comparison of Average Tardiness in Basic and Integrated System The average tardiness in the basic planning system is more than in the integrated system. Although the graph shows that in the integrated system there are not much variations in different levels of qualifying factor, still, the more the level of QF is relaxed, the less the average tardiness becomes. 85 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. V 200 150 100 w m 100 120 140 160 Number of Jobs Q M 01 QML6 Q M Figure 6.4: Comparison of Average Flow Time in Basic and Integrated System The simulation shows that the integrated system works much better than the basic planning system in terms of average flow time. The simulation also shows that the more the level of QF is relaxed, the less the average flow time becomes. We note, however, that the variation in different levels of qualifying factor is very limited. 8 6 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. ^ 0.25 V g 0.2 U t 0.15 0.1 z a 0.05 t * 0 o 0 20 40 60 80 100 120 140 160 n Job Size B ade QF=0.01 QF=0.6 — B --------- B------------------ QF=1 — * — Figure 6.5; Comparison of Average Utilization in Basic and Integrated System The line utilization is a measure which has a direct relationship with the freedom on the level of qualifying factor in the integrated system. The more the freedom on the level of qualifying factor, the more the line utilization would be. The least amount of line utilization occurs in the basic planning system. 87 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 6.5 Summary In chapter 6, we applied the mathematical model that we generated in chapter 5 and developed the improved version of Simultaneous Assembly Planning and Scheduling system (SAPS). This system is capable of generating any job list scenario, simulate the jobs for a given shop floor configuration, and produce the results. The SAPS system consists of two major modules. The initial planning module receives all the initial data from different files and generates the basic assembly plans. All the qualifying factors are also calculated at this stage. In the second stage of the system operations, the opportunistic planning concept is utilized and the assignments are performed. For any given scenario, the system generates all the outputs including the dispatch list and the results of performance measures. In order to see the performance of the integrated system and compare it with the traditional system, certain experiments have been performed and some simulation runs have been executed. All the results are shown in the form of tables and graphs. The results of the simulation runs show that the performance of the integrated system is always better than the traditional planning and scheduling system. The qualifying factor plays an important role in the system. The more the level of the qualifying factor is relaxed, the better the performance of the system becomes. 8 8 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 7 CONCURRENT CONSIDERATION OF PLANNING AND SCHEDULING COST ATTRIBUTES IN THE INTEGRATED SYSTEM 7.1 Introduction This chapter describes a methodology that integrates planning and scheduling attributes into a cost model for final decision-making, focussing on manufacturing cost evaluation procedures. The integrated assembly planning and scheduling system requires simultaneous evaluation of several manufacturing attributes including set up cost, transfer cost, lateness or earliness cost, and processing cost. The interrelation between these attributes are not considered in the previous model. In this chapter the problem will be considered more realistically in terms of practicality of the integrated system in the real manufacturing environment. Consideration of set up cost, transfer cost, and speed of machine operations are the new assumptions in this chapter. The following are the assumptions in this stage of research: (a) Batches of orders arrive at random, (b) Lines with various machines and various layouts are available. 89 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. (c) Each machine type performs one type of insertion. (d) Machines of the same type may have different brands with different processing speeds. (e) Costs considered are: set up, material handling (transfer), processing, lateness and earliness (inventory) costs. In this chapter a cost model that considers the above cost factors is developed. The qualifying factor (QF) is converted to a measure compatible with the cost factor. Two different scenarios for planning and scheduling are considered. These are opportunistic and time window approaches. A heuristic solution approach for the above two cases is developed. A mathematical programming model is also developed for small problems and the results will be compared with those of the heuristic approach. Data for simulated scenarios are generated and the results of analysis are demonstrated in the form of tables and graphs. 7.2 A Cost Model for the Integrated System The following cost components are considered for each specific printed wiring board which has a specific design and requires certain manufacturing operations: C; : set up cost per batch on a specific line Cp : processing cost per batch on a specific line Cl : transfer cost per batch 90 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. c , : lateness cost per batch C g: earliness cost per batch The total cost for each board is the summation of costs as shown bellow: Ct = (C ,+ C p + Q + C, + Q / b where b is the batch size. 7.3 Conversion of Qualifying Factor (QF) into a Compatible Cost Factor The qualifying factor is a measure of the evaluation of appropriateness of a job-line assignment. This measure considers the functionality of each line for each job in each assignment. Two main factors are considered in this measure. First, the number of unutilized machines in the line for processing a job, and second, the number of component types which will be left undone after leaving the line. The qualifying factor has been formulated in chapter 4 as follows: QF = I'P i p - Let us refer to the cost based qualifying factor QF as CQF which is defined as follows: CQF = Excessive cost with respect to ideal cost due to inappropriateness of a job-line assignment 91 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. According to this definition the following formulation is presented: CQF â– E ( *... * » è c .,. ± c ,^ where: t, = total processing time of a job on a particular line mi, m2 , ... m ^ = unused machines in a particular line during the processing of a job C m i = cost of idleness of a machine per time unit C, = set up cost for further line operations Ct = transfer cost for further line operations r = the remaining steps to complete the process The cost based qualifying factor, CQF is formulated using three major factors. First, the excessive cost due to idleness of unused machines in the line. Second, the excessive set up costs during further operations due to incompleteness of a job in the current line. And finally, the transfer costs due to incompleteness of a job in the current line. These excessive costs are compared with the ideal situation in which all the required operations could be done in one process in that particular line. 7.4 A Heuristic Solution for the Opportunistic Planning Approach The main mechanism for decision-making in this approach is the "cost factor". In the opportunistic planning approach, whenever a line or machine is available, a job will be assigned to that resource. This method is fairly satisfactory as compared to other 92 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. methods of scheduling. However, this approach can be enhanced by choosing a smart heuristic in the job-line assignment. The major shortcoming of the opportunistic planning approach is that it does not have any vision into the future. The algorithm in this approach may choose a less desirable line for a job, while if it waits, a more deserving line for that job may become available. In a later development in this chapter, the concept of "time window" will be introduced in order to enhance the performance of the integrated system. In opportunistic planning, the assignment of jobs on lines are performed sequentially. A better approach is the one that performs multiple assignments concurrently and rearranges them to find the most efficient assignments. This objective can be achieved using the time window concept. In general, the scheduling problem in electronic assembly operation may be classified as a generalized job shop scheduling problem, which concerns "n" jobs and "m" machines. The major advantage of the opportunistic planning approach is that it converts the job shop scheduling problem to "n" jobs and one machine (resource) problem. This makes the problem easier to solve. There are some known algorithms based on several performance measures for this kind of scheduling problem. In the previous chapters, where the performance measures were tardiness, flow time, makespan and machine utilization, a simple heuristic like EDD (Earliest Due Date), or SPT (Shortest Processing Time) provided good results. In this new approach, where cost is the main measure of performance, all planning and scheduling costs have been considered and a new heuristic is developed. The objective in this heuristic is to minimize the total cost in each planning horizon. 93 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Since the total cost is a combination of all associated costs, an effectiveness matrix should be developed. This matrix is a mechanism to be used for the optimal assignment algorithm. In this matrix rows represent the available jobs in front of a line and columns represent the same jobs. Each entry in this matrix, Cij, is the total cost of "i"th job processed after "j"th job in that particular line. Note that i and j are local assignment indices and not the global job numbers. In the following section the graph theory and its application in this particular problem is reviewed. 7.5 The Graph Theory and its Application in a Scheduling Problem Graphs are mathematical objects that can be used to model networks, data structures, process scheduling, computations, and a variety of other systems where the relations between the objects in the system play a dominant role. The objective in this section is to introduce the terminology of graph theory, define some familiar classes of graphs, and to illustrate their role in modeling the Sequence Dependent Scheduling Problem. 7.5.1 Terminology A graph G(V,B) consists of a set V of elements called vertices and a set of E of unordered pairs of members of V called edges. When we wish to emphasize the order and size of the graph, we refer to a graph containing p vertices and q edges as a (p,q) graph. We say a vertex u in V(G) is adjacent to a vertex v in V(G) if {u,v} is an edge in E(G). 94 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. We define a path from a vertex u in G to a vertex v in G as an alternating sequence of vertices and edges like : Vi,e„ V;, e^, v„, e„. We say a pair of vertices u and v in a graph are connected if, and only if, there is a path from u to v. We say a graph G is connected if, and only if, every pair of vertices in G are connected. If we impose directions on the edges of a graph, interpreting the edges as ordered rather than unordered pairs of vertices, we call the corresponding structure a directed graph or a digraph. 7.5.2 Bamiitonian Graphs A graph that contains a cycle which spans its vertices is called a Hamiltonian graph. We caU a spanning cycle in a Hamiltonian graph a Hamltomm cycle, while a spanning path in a graph is called a Hamiltonian path. The problem of determining whether a graph has a Hamiltonian cycle is the Hamiltonian cycle problem. The related traveling salesman problem can be shown to be a Hamiltonian cycle. The Hamiltonian cycle is NP-Complete. In general, it is difficult to determine if a graph has a Hamiltonian cycle or Hamiltonian path, but there are some simple necessary and/or sufficient conditions for a graph to be Hamiltonian. For more details in graph theory please refer to "Algorithmic Graph Theory" by James A. Mchugh, 1990. 95 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 7.5.3 Application of Graph Theory in Sequence Dependent Scheduling Problems The following scheduling problem can be solved by finding the shortest Hamiltonian path in a weighted directed graph. Let {p;, i= l,.,.,n} be a set of n processes (jobs), all of which need a resource which they access sequentially. An ordered list of the processes constitute a process schedule. If a process P; is scheduled just prior to process Pj, a reset (set up) cost Cy is incurred in preparing the resource to run Pj. The cost of a schedule is defined as the total of reset (setup) costs summed over all other scheduling costs. We can model the scheduling of the set of processes and the reset costs as a weighted directed graph G, where the processes correspond to the vertices of the directed graph and the weight of an edge (i,j) equals the reset cost Cy. If we define an optimal schedule as a schedule of minimum cost, an optimal schedule corresponds to the shortest Hamiltonian path in graph G. 7.6 Graph Representation of the Integrated System Using the Cost Model Suppose that in the preplanning module using qualifying factors (QF), a set of jobs which are candidates for a particular line has been selected. For every job-line assignment, there exist various costs associated with that particular assignment in that particular moment. The objective of this problem is to find the best arrangement in such a way that the total cost is minimized. In this type of problem, the cost for each assignment depends on the previous job on the line. In other words, the cost is a relative figure depending on the situation of other 96 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. jobs. C g represents the total cost of processing "i"th job after "j"th job, Cy is infinity if i=j. Then there exists n^ numbers (entries) each identified by Cij. These numbers can be shown in the form of a [n x n] matrix so that the "ij"th entry is the total cost of the "i"th job processed after the "j"th job in that particular line. This matrix can be converted into a directed graph. Consider graph G(V, C) such that : V = {J,, J;, ..., Jg} C = Cti + Ct2 + ••• total processing cost of a set of jobs on a particular line Note that the total processing cost of the set of jobs on a particular line is order dependent. This means that for every order of jobs, a specific total cost is involved. Obviously there is at least one specific arrangement which gives the minimum total cost identified by C*. Suppose C* is the optimum total cost. Obviously, because of the NP-completeness of the problem, finding the optimal solution is not practical. Therefore, finding a good algorithm to generate a near optimum solution is the purpose of this research. Any algorithm which results in total cost of C can be compared with C* by a coefficient a , in such a way, that the following relation holds: C* C = etC* Then that algorithm is called alpha-approximation. 97 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. This concept can be interpreted in graph definition. Every simple path in a graph, which includes all nodes, represents an arrangement of a set of jobs for a particular line. Now, the best arrangement is a path which minimizes the total cost. Hamiltonian Path: By definition, a path which includes all the nodes is called a Hamiltonian path. A decision problem in the Hamiltonian path is known as a NP- Complete problem. The problem of Ending a minimum Hamiltonian path is a NP- complete problem (Garey and Johnson, 1979). On the basis of this definition, the following assumptions are considered: a) Every n x n matrix can be shown as a complete graph with n nodes and n arcs. For example, the following graph is represented for a three by three matrix: C12 €13 Figure 7.1: Graph Representation of Jobs The above graph cannot represent the real situation of the assignment of jobs to a particular line. This is because at the beginning of the time horizon the first job is not following any job. In order to represent this case in the graph, a dummy node must be 98 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. defined. The first assignment follows the dummy node in the graph. The following figure represent a possible path for the assignment of three jobs to a line. C23 Figure 7.2: Graph Representation of Jobs Arrangement Each node is a job number and each arc is the total cost of processing job j before job i. Evidently, the cost of processing the dummy job is zero and the job before the dummy job represents the last job that is processed by that line. The effectiveness matrix should also be modified by adding a dummy column and a dummy row. The following table shows the effectiveness matrix of all assignment possibilities of one line and three jobs: Table 7.1 A Job Matrix d J1 J2 J3 d C O Cl 02 €3 J 1 0 00 €12 €13 J2 0 €21 C O €23 J3 0 031 €32 O O 99 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The following picture is a complete graph representation of the previous matrix: C12 Cl C23 C13 Figure 7.3: A Complete Graph Representation of a Jobs Matrix Now the objective is finding the optimum arrangement in the Hamiltonian circuit. 7.7 Fonnation of the Cost Matrix There are two different types of costs in the cost function: absolute costs and relative costs. The absolute costs are the ones which do not depend on the order of processing jobs. For example, processing cost and lateness or earliness costs are absolute costs. The set up cost is order-dependent and plays a major role in the scheduling problem. The jobs which are not order-dependent are identical in each row of the cost matrix. The set up costs could be found by using a set up matrix. This matrix relates the set up cost of each job to the previous job processed by a line. 1 0 0 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. If the number of jobs in front of a specific line is n, then the cost matrix is a [(n+l)x(n+l)] matrix which includes the dummy jobs in each column and row. The entry C y in the matrix is calculated as follows: Cjj = C S jj + Cp + Q + aC, + pCe if: 1^ i, j^ n and i? ^ j Cy = 0 if: 1 ^ j ^ n, & i = dummy job C y = 0 0 if: i — j where: Csy is the set up cost of job j processed after job i, Cp is processing cost, C, is transfer cost, C, is lateness cost, and C, is earliness cost, a is earliness and p is lateness. Note that a and p cannot exist at the same time. The following formulation shows the role of a and p in a job-line assignment: Ô = due date - completion time Ô = due date - (current time + processing time) if 0^ 0 then : a = 0 & p = ô if Ô < 0 then : a = 1 ô | & p = 0 7.8 The Shortest Hamiltonian Path Algorithm for the Integrated System As we discussed earlier, by using the cost model we need to find a near optimum arrangement of machines in front of each available line. This can be achieved by utilizing an algorithm which provides the Shortest Hamiltonian Path for a graph. There 101 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. are different algorithms for solving this type of problem. The best known algorithm which guarantees the performance of 3/2 with respect to optimal result, is an algorithm which was developed by Christofide, 1976. This algorithm requires the property of triangle inequality which holds in this type of problem. This algorithm is explained in the following section and is used to find the shortest Hamiltonian path for the integrated system: 1. Compute the minimum spanning tree of the graph (m). 2. Compute the minimum cost perfect matching (u). 3. Add "m" to "u" and form a graph (O'). 4. Compute an Eulerian walk on m +u and form a Hamiltonian cycle. (Reference: " Algorithmic Graph Theory", J. A. McHugh, 1990) 7.8.1 Minimum Spanning Tree Algorithm The first step in implementing the Shortest Hamiltonian Path algorithm is finding the minimum spanning tree of the graph. A spanning tree for a graph, G = (V, E), is a subgraph of G that is a tree and contains all the vertices of G. In a weighted graph, the weight of a subgraph is the sum of the weights of the edges in the subgraph. A minimum spaming tree for a weighted graph is a spanning tree with minimum weight. There are many situations in which the minimum spanning tree must be found. For example, whenever one wants to find the cheapest way to connect a set of terminals, one possible solution is a minimum spanning tree for the graph with an edge for each possible connection weighted by the cost of that connection. Finding the minimum 102 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. spanning tree is also an important problem in various routing algorithms (i.e., algorithms for finding efficient paths through a graph that visits every vertex). For finding the minimum spanning tree in a connected graph, the Dijkstra/Prim algorithm begins by selecting an arbitrary starting vertex, and then "branches out" from the part of the tree constructed so far by choosing a new vertex and edge at each iteration. During the course of the algorithm, the vertices may be thought of as divided into three (disjoint) categories as follows: Tree vertices : in the tree connected thus far. Fringer vertices : not in the tree, but adjacent to some vertex in the tree. Unseen vertices : all others. The key step in the algorithm is the selection of a vertex from the fringe and an incident edge. Actually, since the weights are on the edges, the focus of the choice is on the edge, not the vertex. The Dijkstra/Prim algorithm always chooses an edge from a tree vertex to a fringe vertex of minimum weight. The general structure of the algorithm can be described as follows: Select an arbitrary vertex to start the tree; while there are fringe vertices do select an edge of minimum weight between a tree vertex and a fringe vertex; add the selected edge and the fringe vertex to the tree end 103 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Using special data structures like the binomial heap, the time complexity of this algorithm is 0(m+nlgn), when "m" rq)resents the number of edges and "n" represents the number of vertices in a graph. 7.8.2 Minimum Cost Perfect Matching The set of edges M in an undirected graph is a matching, if no edges in M share a common vertex. A matching is called "perfect" if M covers all vertices in G. Given an undirected graph G= (V, E). The problem of finding minimum weight perfect matching can be stated as finding a subset X of E, such that, M spans all the vertices of G and the total cost of M is minimized over all perfect matchings. min Cost(X) = £Ce Where: e e X 7.9 Implementation of Simultaneous Planning and Scheduling Concept Using the Cost Model (C-SAPS) Considering the cost model in the integrated system and applying the graph theory concept, we have developed a system which is able to simulate the integrated system. This system is able to generate random jobs. In this system the opportunistic planning concept has been applied. For each job in this system the potential line, which is 104 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. capable of processing that job partially or completely, is selected. That job is hypothetically located in front of that line. As soon as a line is available, the most appropriate job in front of that line is chosen and is assigned to that particular line. The defined algorithm is applied here to find the most cost effective arrangement of jobs in front of the lines. This arrangement is done constantly and dynamically. As soon as a job is selected for processing, that job is automatically deleted from other lines. The arrangement process is repeated for any available line. As soon as a job leaves a line, that job is evaluated for completion of the process. If that job is completed it is tagged as a complete job, all the statistics are recorded, and it exits the system. If the job is not yet completed, it is treated as a new job and is reentered into the system to follow all the procedures until it is completed. 7.9.1 Results of Simulation in C-SAPS In order to simulate the cost-based integrated system, a series of randomly generated jobs are entered into the system. The preplanning module evaluates each job and queues them in front of all potential lines. The planning and scheduling module sorts the jobs in front of each line according to the defined algorithm. Using the opportunistic planning approach, the system will simulate the processing of jobs and produce the results. Using the Cost-Based Simultaneous Planning and Scheduling system (C-SAPS), we have generated five different graphs. Five measures of performance, namely, makespan, average tardiness, flow time, line utilization and total cost have been 105 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. evaluated in the cost-based model. Different levels of qualifying factors have also been considered. The simulation of the integrated system in this model shows that the integrated system produces much better results than the conventional system. Different levels of qualifying factors in the integrated system have also been examined. The results show that there is a relation between the performance measures and the level of qualifying factor. This relationship is direct in terms of average tardiness, average flow time, makespan, and cost. In other words, the higher the level of qualifying factor, the more these performance measures become. In terms of average line utilization, however, this relationship is indirect. The higher the level of qualifying factor, the less the line utilization becomes. These conclusions are illustrated in the following graphs. 106 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 200 M 180 a 160 k 140 e 120 s 100 P 80 ® 60 " 40 40 Job Size Basic QF-0.001 QF-0.4 QF-0.8 —■------ ® --- *----- B — Figure 7.4: Makespan in Basic and Integrated System in a Cost-based Model The makespan in the integrated system is much less than the traditional model. In the integrated system, the makespan is shorter and depends on the level of QF. As the graph shows, we can see a relation between the makespan and level of qualifying factor. The more the level of qualifying factor is relaxed, the shorter the makespan becomes. 107 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. g 0.2 U t 0.15 i I * 0.1 z t 0.05 i o n 40 30 Job Size Basic QF=0.001 QF=0.4 QF=0,8 Figure 7.5: Average Line Utilization in Basic and Integrated System in a Cost-based Model The average line utilization in the integrated system is higher than in the traditional system. As the graph shows there is a direct relation between the average line utilization and the level of QF in the integrated system. The more the level of QF is relaxed, the more the line utilization becomes. This is the solid conclusion that we can draw by simulating the integrated system. 108 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A V g T a r d i n e s s 70 60 50 40 30 20 10 0 40 35 25 30 10 15 20 5 Job Size Basic QF-0.001 QF-0.4 QF-0.8 Figure 7.6: Average Tardiness in Basic & Integrated System in a Cost-based Model The result of simulation shows that the average tardiness in the integrated system is less than in the traditional system. The performance of the system in the integrated model depends on the level of QF. When the system is more relaxed in terms of the level of QF, the average tardiness decreases. This relation can be seen in the graph. 109 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A 80 V g 70 F 60 1 o 50 w 40 T i 30 m e 20 10 1 10 15 20 25 Job size 30 Basic QF-0.001 Q F-0.4 QF-0.8 —■------ Ô - ---*--- —-B — 35 40 Figure 7.7: Average Flow Time in Basic and Integrated System in a Cost-based Model The performance of the integrated system in terms of average flow time is better than the performance of the traditional system. The level of qualifying factor matters in the integrated system. The average flow time decreases by relaxing the level of QF. When the QF is equal to 1, the system still performs better than the traditional system. The reason is that it gives the system the opportunity to choose the identical lines while in the basic planning system the jobs are assigned only the specific lines which are decided in the planning stage. 1 1 0 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 3.000 A V 2,500 g 2.000 c o 1.500 s t 1,000 500 40 Job Size Basic QF-0.001 QF-0.4 QF-0.8 —■------ 6 --- *- ---B — Figure 7.8: Average Cost in Basic and Integrated System in a Cost-based Model The average cost in basic assembly planning and scheduling is generally lower than in the integrated system. However, the total cost depends on the weights of different costs, especially, the lateness penalty cost. In general, the result of simulation shows that the performance of the system depends on the level of qualifying factor. The less the level of QF, the less the average cost becomes. Ill Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 7.9.2 The Role of Lateness Cost with Respect to Other Costs The major difference between the traditional and integrated system is that in the traditional system, a minimum number of set up and transfer of jobs between lines is required. In the integrated system we have more set up costs and more transfer costs and usually a less lateness cost. The preference of these two systems as far as total cost depends on the weight of different cost factors. If the lateness cost is not significant with respect to other costs, then the total cost of the integrated system may exceed the total cost of the traditional system. In that case the integrated system is not desirable. Figure 7.9 illustrates this case. 10,000 . 8,000 A V g. 6,000 o 4,000 s * 2,000 70 Job Size BASIC QF=0.01 QF=0.4 QF=0.8 â– 0 ! Figure 7.9: Comparison of the Traditional and Integrated System (Insignificant Tardiness Cost) 1 1 2 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 7.10 Improvement of the Integrated System Using the Time Window Concept (T-SAPS) As we discussed earlier, the opportunistic planning approach simplifies the scheduling problem but also has some shortcomings. This approach applies local decision-making for the job-line assignments and does not provide any vision into the future. The advantage of this approach is that the scheduling problem lies in the category of "one machine and 'n' jobs" problem. In the opportunistic planning approach, the assignments of jobs on lines are performed sequentially. A better approach is the one that performs multiple assignments concurrently and rearranges them to find the best configuration. Considering all the lines at the same time alleviates the mentioned shortcomings, however, it makes the problem very difficult to solve. To find the best configuration, the performance of each assignment should be evaluated. There is a compromise for the solution of "n" jobs and "m" machines in the scheduling problem. Here is where the time window concept is very instrumental. Rather than solving the problem in the whole planning horizon, we can consider a time interval in which we solve the problem periodically. 7.10.1 The Window Size The existence of a time window that extends from the current point in time to some point in the future, allows for the examination of the performance of each assignment scenario with reference to the end of the time window. A time window controls the number of machines engaged in each assignment stage and also controls the goodness 113 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. of the solutions. The duration of the time window is a variable parameter that can be changed in different experiments. This parameter starts from the current time until a specific point of time in the future. We solve the problem in that period of time. As soon as a line is done with a job, we move the beginning of the time window to that specific point of time, in which that line releases the job. This process is done dynamically until all the jobs are processed. The following figures illustrate the concept of time window. Line 1 Line 2 Line 3 Line 4 Line 5 Line 6 Window t i ---- 4- i i i i g L _ J Figure 7.10: Illustration of a Time Window Before a New Assignment 114 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Window Line 1 Line 2 Line 3 Line 4 Line 5 Line 6 Figure 7.11: New Assignments in a Time Window There are two ways to perform the concurrent assignments during each time window period. One is to make the assignments as a small scaled scheduling problem, that is, every possible assignment in the time window is made. For example, if the process of an assignment is finished within the time window, another job is assigned to the same line. This type of assignment method provides more possible solutions and needs a complicated algorithmic method. There is another assignment method in which only one assignment is allowed for each line within a time window. This is the method that we have used in our research. In this research a "priority dispatching rule" has been used to sort the jobs in front of each line. At each assignment stage, each line can accept one job within the time window. In each time window, the problem of "n" jobs and "m" lines must be solved. 115 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. The worst case scenario is usually associated with the initial state in which all lines are assumed to be available at the beginning. 7.10.2 The Concurrent Assignment Algorithm within the Time Window The integration problem within a time window can be solved as a search problem. During each time window, "n" jobs exist. Each job can be processed by one or more lines. Each job on each line may be processed partially or completely and it may cost differently. The objective of assigning "n" jobs on "m" lines within each time v/indow is to minimize the total cost. This is a "classical optimal assignment" problem. We have used the "Hungarian method" to solve this optimal assignment problem. 7.10.3 The Hungarian Method to Solve an Optimal Assignment Problem Suppose that we have n lines which are or will be available within a time window. In front of each line there is one job which has the highest priority to be processed. Note that in this assignment problem the number of jobs and lines are equal. We will consider dummy jobs if there is no job in front of a line. Now we can calculate the effectiveness matrix which shows the cost of processing each job on each line. Using the effectiveness matrix we follow the following steps to find an optimum assignment solution. 116 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. STEP 1: Begin by finding the minimum element in each row of the m x m cost matrix. Construct a new matrix by subtracting from each cost the minimum cost in its row. For this new matrix, find the minimum cost in each column. Construct a new matrix (called the reduced cost matrix) by substituting from each cost the minimum cost in each column. STEP 2: Draw the minimum number of lines (horizontal and/or vertical) that are needed to cover all the zeros in the reduced cost matrix. If m lines are required to cover all the zeros, an optimal solution is available among the covered zeros in the matrix. If fewer than m lines are needed to cover all the zeros, proceed to Step 3. STEP 3: Find the smallest nonzero element (call its value k) in the reduced cost matrix that is uncovered by the line drawn in step 2. Now subtract k from each uncovered element of the reduced cost matrix and add k to each element of the reduced cost matrix that is covered by two lines. Return to Step 2. 7.10.4 Evaluation of Cost in the Integrated System One of the motivations to study the integration system is that the integration model can accomplish lower cost solutions. As it is shown in the simulation results, lower tardiness and flow time correspond to higher line utilization. It can be concluded, therefore, that the integrated system may not be beneficial if the tardiness cost is much lower than other costs. Note that we usually have more set up activities in the integration system. As a result, the total cost in the integrated system may exceed the 117 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. total cost in the traditional system. However, the fact is, usually the tardiness cost is very substantial in this industry. Therefore, the motivation for choosing the integrated system is still legitimate. 7.11 Implementation of Simultaneous Assembly Planning and Scheduling System Based on the Time Window Concept (T-SAPS) Based on the Hungarian method we have developed an integrated system which can simulate the jobs in time windows. In certain experiments we have simulated some random jobs. For these experiments the results for different measures of performance have been recorded. The results show that in this approach, once again, the integrated system is better than the basic system. In this examination we have inspected the performance of different levels of qualifying factor. In terms of all four measures of performance, we concluded a relation between the value of performance measures and the level of QF. The following graphs illustrate the results of simulation in different experiments. 118 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Time Window (15 Min.) A 100 80 60 w 40 20 m e 0 0 10 20 30 40 50 60 70 Job Size Basic QF=0.001 QF=0.4 OF=0.8 — ■— — e— — * --------------B — Figure 7.12: Average Flow Time in Basic and Integrated System Using a Time Window The result of simulation shows that the performance of the integrated system is better than the performance of the traditional system. The average flow time in the integrated system depends on the level of qualifying factor. The more you relax the QF, the shorter the average flow time becomes. This direct relationship can be seen in the graph. 119 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A V g T a r d i n e s s Time Window (15 Min.) 100 60 40 1 50 70 40 Job Size Basic QF-0.001 QF-0.4 QF-O.B — â– ------------ ô- ------ * ----------------B — Figure 7.13: Average Tardiness in Basic and Integrated System Using a Time Window The results of simulation shows that like the other approach, the integrated system performs better than the traditional system. There is a direct relation between the average tardiness and the level of qualifying factor. This is the same conclusion that we made in the opportunistic planning approach. This approach also shows that the freedom on the level of qualifying factor increases the performance of the system. 1 2 0 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Time W indow (15 Min.) 0.25 V 0.2 U t 0.15 i I 0.1 * 0.05 a t 0 10 70 20 30 40 50 60 o n Job Size Basic QF-0.001 QF-0.4 QF-0.8 —m — — e — — + --------B — Figure 7,14: Average Line Utilization in Traditional and Integrated System Using a Time Window As the graph shows, the line utilization in a cost-based model using the time window concept produces the same results as the opportunistic planning approach. The line utilization in the integrated system is more than the traditional system. There is a direct relationship between the line utilization and the qualifying factor. The more the level of QF is relaxed, the more line utilization is obtained. 121 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Tim e W indow (15 Min.) M a 250 g 200 s 150 P a 100 n 50 Job Size Basic QF=0.001 QF=0.4 QF=0.8 —■--- 0 — *- ---B— Figure 7.15: Makespan in the Traditional and Integrated System Using the Time Window Concept As it is shown in the graph, the makespan is shorter in the integrated system. There is also a direct relation between the makespan and the level of qualifying factor. Freedom on the level of qualifying factor provides an opportunity to select any possible line and provides better results. The conclusion in this approach is the same as the opportunistic planning approach. The performance of the system depends on the freedom on the level of qualifying factor. 1 2 2 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Time Window (15 Min.) 10,000 A V 8,000 g. 6,000 ^ 4,000 0 S 2,000 10 20 30 40 Job Size 50 60 70 Basic Q F = 0 .0 0 1 Q F = 0 .4 Q F = 0 .8 Figure 7.16: Average Cost in the Traditional and Integrated System Using the Time Window Concept As the graph shows, the average cost in the integrated system using the time window concept has the same results as the opportunistic planning approach. In the integrated system, the average cost is less than the basic planning system. Even when the qualifying factor is limited to one, the result is still better than the traditional system. As we lower the qualifying factor, the results show an improvement in the performance of the integrated system. The more the level of QF is relaxed, the lower the cost becomes. 123 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 7.12 The Effect of Window Size The window size dictates the number of possible assignments in each stage and also determines the goodness of the solutions. It is generally true that a large window size allows for a concurrent assignment of a large number of jobs and lines, therefore, one would expect to obtain better results with larger windows at the cost of increased computation time. However, there is a limit for this improvement process as far as the window size. Since by increasing the window size we include more lines, as soon as we reach the number of total lines in the system, there is no reason to increase the size of the time window. At this point we call the length of the window "optimal window size". In this research we have performed more simulations to study the effect of window size on the quality of the solutions. The relationship between the widow size and computation time is also examined. The following graphs show the results of this study. 124 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 29 A V 28 g 27 F 26 1 o 25 w 24 T 23 i m 22 e 21 \ 10 20 30 Size off Time Window(Mlnutes) 40 50 Figure 7.17: The Effect of Window Size on Average Flow Time The above figure shows the effect of window size on average flow time. As the graph shows, the optimum window size is between 20 to 30 minutes. In this range almost all the lines are considered during the optimization process. The computation time in this range is between 140 to 211 minutes. 125 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A V T a r d î n e s s 23 22 20 i 40 Size of Tim e Window (Minutes) Figure 7.18: The Effect of Window Size on Average Tardiness This graph shows a major improvement in average tardiness occurs in the range of 20 to 30 minutes. The progress of the performance after the window size of 30 minutes is not very significant. The computation time in this range is between 140 and 211 minutes. 126 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A V g- I i z a t I o n 0.19 0.18 0.17 0.10 0.15 0.14 0.13 0.12 1 10 20 30 Size of Time Window (Minutes) 40 50 Figure 7.19: The Effect of Window Size on Average Line Utilization The above figure shows that the line utilization increases with the increasing of the time window. However, after the window size of 30 minutes, the progress of the performance in the average line utilization is not significant. During the range of 20 to 30 minutes, most of the lines have become available in each time window. 127 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 1,800 1,600 A g. 1.400 o ^'200 S t 1,000 800 0 10 20 30 40 50 Size of Time Window (Minutes) Figure 7,20: The Effect of Window Size on the Average Cost The average total cost in the integrated system decreases with the time window size. However, this improvement stops after a specific range of time window. The optimum window size occurs between 20 to 30 minutes. The computation time in this range is from 140 to 211 minutes. 128 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. M a e s P a n 72 68 66 64 62 60 58 0 10 20 30 40 50 Size of Time Window (Minutes) Figure 7.21: The Effect of Window Size on Makespan The effect of window size on makespan is like other performance measures. There is a limit for improvement of makespan with respect to the size of the time window. The optimum window size occurs between 20 to 30 minutes. After the window size of 30 minutes, no improvement is gained in the system. 129 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. c o m P u t a t î 0 n T 1 m e 500 400 300 200 100 0 0 5 10 20 30 40 50 Size of Time Window (Minutes) Figure 7.21: The Effect of Window Size on the Computation Time As it is expected, the computation time increases with the increasing of the time window. However, there is a limit for the length of computation time. When the system reaches the point in which all the lines become available in the time window, increasing the length of the time window does not increase the number of processing jobs. In this experiment the maximum computation time is around 250 minutes. 130 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 7.13 Comparison of the Time Window and the Opportunistic Planning Approach As we discussed earlier, the opportunistic planning approach, which has some shortcomings, can be improved by concurrent consideration of all available lines in a period of time applying the time window concept. The reason that we need to use the concept of time window is the complexity of the problem and the computation time. In this approach we consider the problem globally rather than locally. Consideration of this problem in the whole time horizon is very difficult to solve and requires a great deal of time for computation. Here is where the time window is very instrumental. We consider the lines which are or will be available in a specific period of time. By changing the length of the time window, we can find a feasible time period in which the problem is solvable in a reasonable computation time. In order to compare the opportunistic planning approach and the time window planning and scheduling concept, we analyzed the results of simulation for the two approaches using the same series of data. This experiment shows that the time window approach is a better way of planning and scheduling for the integrated system. The shortcomings of the opportunistic planning approach can be reduced by global consideration of available lines in a period of time. The following graphs demonstrate the results of this comparison. 131 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A V g T 20 î m e Job Size OP HmeWIndownSMn.) Figure 7.22: Comparison of Average Flow Time in Opportunistic Planning and the Time Window Approach As it is shown in this graph, in terms of average flow time, the time window approach is better than the opportunistic planning approach. However, the graph shows that for small-sized jobs, the opportunistic planning approach shows a better performance. This, by itself, shows that we can not make a solid conclusion for all the cases that one approach is always better than the other. The reason is that, in both approaches, some approximation has been used. This results in superiority of one case over the other. 132 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 160 ' 140 a k 120 ® 100 80 60 40 20 0 10 20 30 40 50 60 70 Job Size OP T1meWindcw(15Mln.) Figure 7.23: Comparison of Makespan in Opportunistic Planning and Time Window Approach As the graph shows, the makespan in the time window approach is always better than the opportunistic planning approach. We have to note that the computation time for the time window approach is much more than the opportunistic planning approach. This computation time depends on the period of the time window. In the later experiments we show the relation between the time window period and the measure of performance. Also, the computation time with respect to different time windows will be examined. 133 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A 60 V g 50 T 40 a r 30 d 1 20 n e 10 s s 0 10 20 30 40 Jo b Size OP T i m * W in d o w (1 6 M n .) 50 60 70 Figure 7.24: Comparison of Average Tardiness in Opportunistic Planning and Time Window Approach This graph also shows that in terms of average tardiness, the time window approach performs better than the opportunistic planning approach. As we said earlier, some of the shortcomings of the opportunistic planning approach is fixed in the time window concept. Global consideration of job-line assignment is the main one. This results in a better performance in average tardiness. The performance measure of average tardiness is the most costly parameter in this industry. Improving this measure results in a great deal of saving in lateness penalty and delivery ( i.e., air fare) costs. 134 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. ^ 0.24 I 0.22 u 0.2 f 0.18 I 0.16 z 0.14 t 0.12 i o n 0.1 Job Size OP Tims W indow (15 W n.) —a— — 0— Figure 7.25; Comparison of Average Line Utilization in the Opportunistic Planning and the Time Window Approach As it is expected, the average line utilization in the opportunistic planning approach is higher than the time window approach. The reason is that in opportunistic planning, whenever a line is available, a job is assigned to that line. If that assignment is not very appropriate with a high qualifying factor, then the line utilization may go up while all of the machines in that line may not be completely utilized. This will increase the line utilization with less machine utilization. In the time window approach, the assignment is done more carefully which might result in lower line utilization. 135 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A V g- C 0 s t 4,000 3,500 3,000 2,500 1,500 30 40 Job size OP Time Window(15 M in.) Figure 7.26: Comparison of Cost in the Opportunistic Planning and the Time Window Approach The result of simulation shows that the average cost in the time window approach is less than the opportunistic planning approach. Since all the parameters have been transcribed into cost, this shows that in general, considering all the performance measures, the time window concept performs well and is a mechanism to improve the performance of the system in a reasonable computation time. 136 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 7.14 Summary This chapter presents a cost-based system that integrates planning and scheduling attributes into a cost model for final decision-making. The set up cost, processing cost, earliness or lateness cost, and transfer cost have been incorporated into the cost model. The qualifying factor which shows the level of appropriateness of each assignment is converted into a cost factor. A heuristic solution, on the basis of the opportunistic planning approach, is presented. The graph theory and its application in scheduling problems is employed. By considering the set up cost we need to solve a class of scheduling problem called: "sequence dependent scheduling problem". By applying the graph theory we defined our scheduling problem as a special case of a traveling salesman problem. We found an efficient algorithm in the literature which guarantees 3/2 of optimum solution. This algorithm has been applied and the results of the simulation are shown in the form of tables and graphs. This new version of the Simultaneous Assembly Planning and Scheduling system, which is developed on the basis of cost factors, is called C-SAPS. The results of simulation by this system confirms the results obtained from other previous versions of the integrated system. The simulation shows that with respect to all the performance measures, the integrated system works better than the traditional system. Freedom on the level of qualifying factor results in a better performance in the system. This new version of the system is still based on the opportunistic planning approach. In the last stage of this research, the concept of time window is applied. In this approach, rather than applying the opportunistic planning strategy, we developed a 137 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. time window and performed all the assignments in that period of time. As soon as one line becomes available, we advance the beginning of the time window to that point. This new version of the integrated system is called T-SAPS. The results of the simulation in this system also show that the integration system works better than the traditional system. In the later development of this research we compared the performance of the opportunistic planning approach with the time window approach. Different experiments on the basis of all four performance measures as well as the cost are performed. The results show that the time window approach is better than the opportunistic planning approach in the cost of excessive computation time. 138 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. CHAPTER 8 CONCLUSION In this chapter a summary of the work in this dissertation, an outline of the contributions of the work, suggestions for future work, and some concluding remarks are provided. 8.1 Summary of Work This research started with the investigation of integration of assembly planning and scheduling functions in electronics assembly operations. A preliminary study showed that this integration is possible and it results in a better performance. In order to do this preliminary study, we thoroughly examined a large, sophisticated, and well known electronics assembly operations facility in Elsegondo, California. An analysis of the planning problems and scheduling complications demonstrated increasing costs and excessive delays in deliveries. In this factory, the planning and the scheduling functions are independent and performed in sequence. We later designed an integration model to do the planning and scheduling simultaneously. The SPS algorithm has been developed and incorporated into the 139 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. integration system. During the process of simulation we used real data collected from the factory in order to produce more reliable results. An integration system software, SAPS (Simultaneous Assembly Planning and Scheduling system), has been developed as a test bed and a mechanism to generate all the plans and schedules concurrently. This system evolved by incorporating a mathematical model into the integration paradigm. We have selected four measures of performance: makespan, average tardiness, average flow time, and average machine utilization. Based on these measures, many simulation experiments have been performed. The results showed that the performance of the integration system is much better than the traditional method of planning and scheduling. This significant improvement results in reduction of scheduling conflicts, reduction of human intervention, and increase of system productivity. In the next stage of this research, we developed a cost model and transcribed all the planning and scheduling activities into cost factors. As a result, the C-SAPS (Cost- based Simultaneous Assembly Planning and Scheduling system) is developed. In this system we considered the set up costs which categorized our scheduling problem as a "sequence dependent scheduling problem". To solve this type of scheduling problem, we used the concept of graph theory and its application in scheduling . We ended up with a special case of a transportation problem and discovered a good algorithm to solve this sequence dependent scheduling problem. The lack of vision into the future and local assignment in scheduling were introduced as two major shortcomings in the opportunistic planning approach. These two 140 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. shortcomings are alleviated using the time window concept in the context of the optimal assignment problem. This improved version of the system is called T-SAPS. Conducting different experiments in this system indicated that the performance of the system using the time window concept is better than the opportunistic planning approach. 8.2 Contributions The primary contributions of this work are summarized as follows: • Introducing the concept of integration of assembly planning and scheduling functions in electronics assembly operations • The development of the SPS algorithm to integrate the planning and scheduling functions • The development of a mathematical model for the integrated system • Design and implementation of the integration model o The development of the Simultaneous Assembly Planning and Scheduling system (SAPS) • Incorporation of the cost factors into the integrated system (C-SAPS) • Introduction and implementation of the "Time Window" concept to enhance the system performance (T-SAPS) 141 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 8.3 Recommendations for Future Research One area of extension and improvement of the system is implementing the concept of "line partitioning". This means that according to the requirements of jobs, the lines can be partitioned in order to fully utilize all or most of the machines installed in one line. This concept can increase the machine utilization and improve the productivity of the system. Implementation of this concept in the integration system can also lead to recommendations of better line configuration. Furthermore, the frequent necessity of partitioning a line implies the demand for reconfiguration of that line. In this research, the average line utilization has been used as a performance measure because it was easier to evaluate the problem. This measure can be substituted by "machine utilization" which leads to a better judgment of system performance. While a line with many machines can be considered as being utilized, some of the machines in that line may be idle. In this research, manual insertion was excluded in system operations. There are many occasions that one operation requires just a few elements to be inserted. Since the set up process in automation insertion is costly and time consuming, it is more efficient and faster to perform the insertion of a few items manually. Manual insertion can be considered in the future to include all the realities in the system operations. Soldering and testing operations are also required to be considered in the future in order to include all the system functions. 142 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. This method of system improvement as an aspect of concurrent engineering philosophy enhances the productivity and increases the system performance. The outcome of this research can be applied to all electronics manufacturing industries. As a result, electronics assembly operations can function efficiently. Therefore, the excessive cost due to scheduling complications and late deliveries can be reduced significantly. 143 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. APPENDIX A The Routines of the Engine of the SAPS System In this appendix we provide the main engine of the SAPS system. Other supported routines like file handling, menu handling, and many others are excluded from these codes. The following program is the library of routines for the SAPS system. */ y************************************************ 1. The Global Constants, Structures, and Variables ************************************************/ /* 1. Global Constants: 1.1.1. The following variables are used to denote the type of algorithm used for the scheduling and planning in the system: * 1 ^define EDD 0 // earliest due date ^define SPT 1 // shortest processing time ^define BASIC 2 // basic planning ^define INTO 3 // integrated planning // 1.1.2. Shop floor and production control constants: ^define MAXPRD 80 // maximum number of products ^define MAXPART 6 // maximum number of distinct machines per line as well as, distinct parts // per each product ^define _MAXLINES 15 // maximum number of lines in the shop floor ^define MAXJOBS // maximum number of jobs that can be handled by the system per execution // 1.1.3. Constants used in the comparisons: #definf GREATERTHAN 0 jMefinfLESSTHAN 1 jMefine EQUAL 2 // 1.1.4. The constant offset of job numbers: #define PRD INX DIV 144 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. I* 1.2. Global Structures: 1.2.1. The following structure denotes the data structure for the current algorithm being used by the system: * 1 typedef struct { int sch ; // the scheduling algorithm (EDD or SPT, see 1.1.1.) int plan ; // planning algorithm (BASIC or INTG, see 1.1.1.); } algorithm type; /* 1.2.2. The following structure represents the data structure used to keep the information of each product: *f typdef struct { int prd id; // the ID number of the product int part [_MAXPART] ; // the array in which represents the number of components of each // type (See 1.1.2.) }product_record; /* 1.2.3. The following stmcture represents the data structure used to keep the information of each assembly line in terms of the type of machines in the line: */ typedef struct { int machin[_MAXPART]; // the array in which represents the structure of each line (See 1.1.2.) } line record; /* 1.2.4. The following structure represents the data structure used to keep the information of the basic assembly plan for each product: * ! typedef struct { int prd id; // the ID number of the product int line|_MAXPART] ; // the array which represents the line numbers should be used by the } bassplan record; // product in the basic assembly plan (see 1.1.2.) /* 1.2.5. The following structure represents the data stmcture used to keep the information of each job in the system: * 1 typedef stmct { int prd id; // product type of the batch long size; // number of jobs per batch float due; // due time of the batch (minutes) long parts remained [_MAXPRD] ; // number of parts of each type needed to be served 145 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. float completetion_time; // total time to serve the batch } job_record; /• 1.2.6. The following structure is the data structure which will be used to keep track of events during the simulation. Each record corresponds to a batch and denotes the unique position of the job in the simulation system: * 1 typedef struct { int job_No; // represents the unique job for the event int lin no; // represents the line number job is assigned to int event time; // the time in which event is going to happen float total_proces_time; //the total processing time of job on this line event rec *next; // if the job is in the waiting queue, point to the next job in the queue } event rec; /* 1.2.7. The basic type for representing the characteristic vector of a line or product: */ short vector[_MAXPART] ; // see 1.1.2. /* 1.2.8. The following data structure is used to represent the vector data type in the qualifying computation module: */ typedef short vector[_MAXPART]; /* /* 1.2.9. The following data structure is used to record different evaluation factors for each round of simulation: * 1 typedef struct { float av tard; // average tardiness of simulation float mak span; II makespan float av flow; // average flow time float av util; // average utilization } stat rec; /* 1.3. Global Variables: 1.3.1. For keeping track of events which are going to happen (a batch will finish its service on a line), we will construct an event queue and the following variable will point to the top of this list: * 1 event rec *event_qjptr; // (See 1.2.6. for event rec) I* 1.3.2. For each line there is a list of batches waiting to receive service from the line. Corresponding to each one of these lines we have a queue, as a linked list, and for each queue we keep a pointer: 146 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. *1 event rec *line_q_ptr[_MAXLINES]; // (See 1.2.6. and 1.1.2.) /* 1.3.3. The following variable denotes the type of algorithm at the current execution of the system: */ algorithmjype algorithm; // (See 1.2.1.) I* 1.3.4. The following variable represents the simulation clock of the system: */ float current time; /* 1.3.5. The following array keeps the information of all products in the system: */ product record product[_MAXPRD]; // (See 1.2.2.) /* 1.3.6. The following array keeps the information of all assembly lines in the system: */ line record lineI_MAXLINES]; // (See 1.2.3.) /* 1.3.7. The following array keeps the information of the basic assembly plan for each product: */ bassplan record bassplan[_MAXPRD]; // (See 1.2.4.) /* 1.3.8. The following array keeps the information of different batches in each execution of the system: */ job_record Job[_MAXJOBS]; // (See 1.2.5.) I* 1.3.9. The following array keeps the information of the processing time of each part for different types of machines in the shop floor: */ float machine_unit_time[_MAXPART]; /* 1.3.10. The following array keeps the total utilization time of each machine in the shop floor: * 1 float machine_utilizationL_MAXLINES][_MAXPART]; 147 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /* 1.3.11. The following variables are used to calculate the total utilization of the shop floor, and also the total utilization of each assembly line: ♦/ float tot util; // these two variables are used to compute the total utilization of the system float ut_period; int util eval; float linejusagejtimeLMAXLINES]; // these two arrays are used to compute the total utilization for float last_line_usage[_MAXLINES]; // each assembly line 2. The Qualifying Computation Functions ****************************************/ /• 2.1. The following procedure is used to find the optimal vector for a job: */ void optvec(event_rec j, vector *opt) { short i for (i= 1; i< = MAXPART; i+ +) if (job|j .jobno] .parts_Remained[i] 1=0) *opt[i] =1; else *opt[i] =0; } I* 2.2. The following procedure finds the characteristic vector of a specific assembly line: * 1 void linevec(short 1 , vector *lv) { short i; for (i= 1; i< =_MAXPART; i+ +) if (line[l].machin[i] ! = 0) lv[i] = 1; else lv[i] = 0; ) /* 2.3. The following routine is used to compute the multiplication of two vectors: */ void multvec (vector *vl, vector *v2, vector v3) { short i; for (i= 1; i< = MAXPART; i+ +) 148 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. v3[i] = vl[i]*v2[il; ) I* 2.4. The following routine is used to compute the subtraction of two vectors: *1 void subvec (vector *vl, vector *v2, vector v3) { short I; for (i= 1; i< =_MAXPART; i+ +) v3[i] = vl[i]-v2[i]; } /* 2.5. The following routine calculates the norm of a vector: *1 short norm(vector v) { short s,i; s=0 ; for (i= 1; i< =_MAXPART; i+ +) s = 8+ v[i]; return s; } /* 2.6. The following routine is used to find the break point of a product with respect to a line: I* short breakpoint(vector vl, vector v2) { short i,tmp; vector *vm; int ne; multvec(v 1, v2, vm) ; tmp =_MAXPART ; 1= 1; ne = 0; while ((! ne) and (I< = MAXPART) { if ((Vl[i] !=0) && (Vm[i]= =0)) { tmp=i; ne= 1; } i+ + ; } } /* 149 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 2.7. The following routine returns the characteristic vectors of the machines used by a product with respect to a line: */ void usagevec (vector opt, vector Iv, vector v) { vector *vm; short i,b multvec(opt,lv,vm); for (i=l; i< = MAXPART; i+ +) V[i]=0; b=breakpoint(opt,lv); for (i=l; i< =b; i+ + ) v[i] = vm[i]; } /* 2.8. The following routine returns the number of used machines by a product with respect to a speciüc line: */ short usedmachins (vector opt, vector Iv) { vector *vm; usagevec(opt,lv,vm); return norm(vm); } /* 2.9. The following routine finds the number of unused machines by a product with respect to a line: /* short unusedmachins (vector opt, vector v) { vector ♦vm; usagevec(opt,lv,vm); subvec (lv,vm,vm); return norm(vm); } /♦ 2.10. The following routine finds the number of unserved parts of a job with respect to a line: * 1 short unservedparts (vector opt, vector Iv) { vector vm ; usagevec(opt,lv,vm); subvec(opt,vm,vm); return norm(vm); } 150 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /* 2.11. The following routine computes the Beta function: •/ float beta (vector opt, vector Iv) { float rl ,r2,r3; rl = (float) Unusedmachins(opt,lv); r2 = (float) norm (Iv); rl = rl/r2; r2 = (float) unservedparts (opt,lv); r3 = (float) norm (opt); r2 = r2/r3 ; r3 = rl*r2; return rl+r2-r3 ; } I* 2.12. The following routine finds the minimum value of the Beta function for a product among all the lines: */ short flndminbeta (vector opt) { int i; float min, bt; vector Iv; short bl; linevec(l,lv); min = beta (opt.Lv); bl = 1; for (i=2; i< =maxlines;i++) { linevec(i,lv); bT = beta (opt.lv); if (bt < min) { min = bt; bl = i ; ) } return (bl); } I* 2.13. The following routine computes the qualifying factor of a job for a given line: * 1 void quf(short 1 , event rec j, float *qq) { short 1st; vector lvst.lv,opt; float bl.b2.qquf; *qq=0 ; 151 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. optvec(j,opt); 1st = fîndminbeta(o[>t); linevec(lst,lvst); if(l != 1st) { linevec(l,lv); bl = beta(opt,lv); b2 = beta(opt,lvst); *qq = (l.-bl)/(l.-b2); } else *qq = 1; } /**************************** 3. The Simulation Procedures *****$***********************/ I* 3.1. The following macros are used to check if there is no event in the event list, or if a job is waiting for a specific line: */ #definf is_event_q_empty ((event_q_ptr= =NULL)? 1 :0) Alefine is_line_q_empty(l)((Line_Q_ptr[(l)]= =NULL)? 1:0): boolean; /* 3.2. The following function returns the next event from the event queue: * 1 int get next event (event rec *e) { event rec *p; int res; res= 0 ; if (! is_event_q_empty) { p= event_q_ptr; *e:= *event q ptr; event_q_ptr : = e- > next; e- > next = NULL ; free(p); res=l; } return res; } /* 3.3. The following function returns 1 if all the lines in the shop floor are serving, otherwise it returns 0: */ int all_lines_are_workingO { 152 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. event rec *q; int res, i; res= 0; if ( ! is_event_q_empty) { i= l; q=event_q_ptr; while (q->next != nil) { i+ + ; q=q->next; } if (i = = MAXLINES) res =1; } return res; } I* 3.4. The following function adds a new event to the Ust of events; */ void add event (event rec e); { event rec ♦p,*q,*r; int done; int 1 ; /* saving the time that jobs enters for starting the service */ last_line_usage[e.lin_no] = current time ; if (is_event_q_empty) { event_q_ptr = malloc(sizeof(event_rec)); "event q ptr = e; event_q_ptr- > next = NULL; event q ptr-> event time = current_time+ e.total_proces_time; ) else { e.eventtime = e.total_proces_time+current_time; p= malloc(sizeof(event_rec)) ; *p= e ; if (e.event time < = event_q_ptr-> event time) { p- > next= event_q_ptr; event_qjptr=p; } else { done=0; q=event_q_ptr; r= q->next; while (! done) 153 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. { if((r!= NULL)&& (r-> event time > = e.event time)) { p->next=r; q->next=p; done= 1 ; } else{ if((R!= NULL)&&(r- > next!= NULL)) { q=r; r=r->next; } else if ((r!=NULL) && (r->next= =NULL)) { r->next=p; p- > next= NULL; done=l; } else if (r= =NULL) { q->next=p; p-> next= NULL; done=l; } } } } } if (all_lines_are_working) { ut_period=current_time ; util_eval=l; } } /* 3.5. The following function checks to see if there is a job in which is getting service on a specific line; */ int there is no event from line (int lin) { event rec *P; int done ; p=event_q_ptr; done : = 0; while ((! done) && ( p! = NULL)) { if (p->If P*.lin_no = = lin) done=l; elsep= p->next; } 154 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. return l-done; } /* 3.6. The following function removes all occurrences of a specific job in the waiting list of all lines: * 1 void update all lines (event rec j) { int 1 ; event rec *p,*q; int done; for (1=1;1< =maxlines;l+ +) { if (! is_line_q_enqjly(l)) { if (line_qjptr[l]->Job_No != j.job_No) { p=line_qjptrD]; q=NULL ; done=0; while ((p->next !=NULL) && (! done)) { if (p- > next- >job no = = j.job_no) { q=p->next; p->next= p-> next-> next; free(q); done=l; } else p=p->next ; } } else{ q=line_q_ptr[l]; line_q_ptr[l]= q->next ; free(q); } } } } /* 3.7. The following function returns the next job from the waiting list of a specific line and removes the job from the waiting list of all other lines: * 1 event rec *get_next_Job (int 1 ) { event rec *p, *tmp; tmp= NULL; if (! is_line_q_empty(l)) { tmp=malloc(sizeof(event_rec)) ; *tmp= *Line_Q_ptr[l]; 155 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. tmp->next=NULL; p=Iine_q_ptr[l] ; line_q_ptr[l] = p- > next; free(p); npdate_all_lines(*tmp) ; } return tm p; } /* 3.8. The following function compares two jobs and, depending on the current algorithm, returns the appropriate constant: * 1 int compare_events(event_rec jl, event rec J2) { int tmp; tmp=-l; if (algorithm, sch = =EDD) { if (job[jl.Job_no].due > Job[j2.job_no].due) tmp=GREATHERTHAN; else if (job[j 1 .job no].due < job(]2.job_no].due) tmp=LESSTHAN; else tmp= EQUAL; } else if (algorithm.sch= =SPT) { if (jl.total_proces_time > j2.total_proces_time) tmp=GREATHERTHAN; else if (jl.total_proces_time < j2.total_proces_time) tmp= LESSTH AN ; else tmp=EQUAL; } return tmp; } I* 3.9. The following algorithm adds a new job to the waiting list of an assembly line, depending on the type of the algorithm: */ void addjob_to_line (event rec j, int 1 ) { event rec *p,*q; int done; p= malloc(sizeof(event_rec)); *p=j ; p-> next= NULL; p->lin_no=l; 156 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. if (is_line_q_empty(l)) Une_q_ptrD]= P; else{ if (compare_events(*line_q_ptr[l],*p)= =GREATHERTHAN) p-> next= line_q_ptr[l] ; line_q_ptrD]=P;- } else { q=Iiae_qj3tr[l]; done=0; while (! done) { if (q->next !=NULL) { if (compare_events(*(q->next),*P)= =GREATHERTHAN) { p-> next=q-> next; q->next=p; done=l; } else q= q->next; > else{ q->next=p; done=l; } } } } } /* 3.10. The following procedure computes the processing time of a job on a specific line: */ void calculate_processing_time (event rec *j , int 1 ) { float pt[_MAXPART], bn, ratio; int bni; int done, i; for (i= 1; i< = MAXPART; i+ +) pt[i]=0; 1= 1; done=0; while ((! done) && (i< = MAXPART)) { if ((! job[j->job_no].parts_renaained[i)) && (lmep].machin[i] < > 0)) { ratio=job[j->job_no].size / line[l].machin[i]; pt[i]=ratio*product[job|j->job_no].prd_id-PRD_INX_DrW].part[i]* 157 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. inachine_iinit_Time[i] ; if (ratio * Iine|l].inachin[i] != job[j->job_no].size) pt[i]= pt[i]+ machine_unit_time[i] ; i+ + ; } else if (((job[j->job_no].parts_remained[i]==0)&& (line[l].machin[i] = =0)) | | ((job(j-> jobno] .parts_remained[i] = = 0)&& (lineD] .macbin[i] ! =0))) i+ + ; else if ((job[j->job_no].parts_remained[i]!=0)&& (Une[l].niachin[i] = = 0)) done=1 ; } bn=0. ; bni=0 ; for (i=l; i<=MAXPART; i+ + ) { if ((line|1].machin[i]!=0) && (pt[i] > bn )) { bn=pt[i]; bni=i; } } j->total_proces_time = 0; for (i= l;i< =MAXPART;i+ +) { if ((line[l].machin[i] < >0) and (pt[i]!=0)&& (i! =bni)) { j- > total_proces_time=j- > total_proces_time+ (float)product[job[j- > job no].prd id- PRD_INX_DIV].part[i]*machine_unit time[i]; } } j- > totaljproces_time=j- > total_proces_time+bn; } /* 3.11. The following function checks to see if a job needs more services: * 1 int job_needs_more_services(event_rec j,int *s ) { int i, done; i= l; done=0; while ((! done) && (i< = MAXPART)) Do { if (job[j.job_no].paits_reniained[i]!=0) { ♦s=i; done= 1; 158 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. } else i+ +; } return done; } /* 3.12. The following procedure checks to make sure a specific line has a required machine: */ int line_has_machin(int 1 , int m) { int res; res=0; if (Line[l].machin[m] !=0) res=l; return res; } /* 3.13. The following procedure performs the planning step in which a job will be added to a line according to the planning algorithm: •/ void planning(event_rec *j, float qf, int initial) { int i, next lin, done; folat *qq; if (algorithm.plan= = BASIC) { i=l; done=0; while ((! done ) && (i < = _MAXPART)) { if (j->lin_no= =0) { next_lin=bassplan[job[j->job_no].prd_id-PRD_INX_DiV].line[l]; done=l; } else if (j->lin_no= =bassplan[job[j->job_no].prd_id-PRD_INX_DIV].line[i]) { next lin= bassplan[job[j->job_no].prd_id-PRD_INX_DIV].line[i+1]; done = 1 ; ) else i+ + ; } if (done) { calculatejprocessing_time(j ,next_lin) ; if (initial) addJob_to_line(*j,next_lin); else { 159 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. if ((! is_line_Q_empty(next_lin)) && (there_is_no_event_ffom_line(next_lin))) add_job_to_line(*j .nextlin) else { addJob_to_Iine(j ,next_Iin) ; done = !((j=get_next_Job (next_lin))==NULL); add_event(*j); } } } } else if (algorithm.plan= =INTG) { done=0; i=l; while ((! done) && (i < = _MAXLINES)) { quf(i.*j.qq); if (qq > = qf) { calculate_prccessing_time(j,i); if (initial) addJob_to_line(j,i); else { if ((! is_line_Q_empty(i)) && (there_is_no_event_ffom_line(i))) addJob_to_line(j ,i) else { addJob_to_line(j,i); done : = !((j=get_next_Job (i))==NULL); add_event(*j); } } } i+ + ; } } } /* 3.14. The following procedure processes the current event and keeps the statistics and required updates on the job status in the system: * / void process_current_event(event_rec *j, int sw, float qf) { float rl ,pr ; int i, *serv, done; { i=l; done =0; While ((i < = MAXPART)) && (! done) { 160 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. if ((job[j->job_no].paits_remained[i] != 0) && (line[j->lin_no].inachin[i] != 0)) { pr = job[j->job_no].paits_remained[i] ; machine_utilization[j- > lin_no] [i]= machine_utilization|j- > lin_no][i] + (pr*macbine_unit_Time[i)) ; job[j->job_no].parts_remamed[i]=0 ; t++; } else if (((job[j->job_no].parts_reinained[i] = = 0 ) && (Iine[j->Im_no].inachin[i] ===0)) 1 1 ((job[j->job_no].parts_reinained[i] = = 0) && (Iine[j->lin_no].machin[i] != 0))) i+ + ; else if ((job[j->job_no].parts_reniained[i] != 0) && (line(j->lin_no].inachin[i] = = 0 ) done = 1; } if (utileval) { ut_period = current time - ut_period; totutil = totutil + ut_period; util_eval= 0; } line_usage_time[j->lin_no] = line_usage_time[j->lin_no] + current_time-last_line_usage[j->lin_no] ; if (job_needs_more_services(j,serv)) planning(j,qf,sw); else job|j->job_no].completetion_time=current_time ; } /* 3. IS. The following routine will be used to compute the statistics for each round of simulation: * / void statistics (int w, int h, int c, int nr) { stat rec slat, srec; float rl; int i, divi; stat.mak_span= currenttime; rl:= 3600.; stat.mak_span= stat.makspan/rl; stat.av_tard= 0 ; stat.av_flow= 0 ; for (i= l;i< =_MAXJOBS; i+ +) { if (job[i].completetion_time > job[i].due) stat.avtard = stat.av_tard+(job[i].completetion_time-job[i].due ); stat.av_flow=stat.av_flow+job[i].completetion_time; } stat.av_util=0; 161 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. for (i= 1; i< = _MAXLINES; i+ +) stat.av_util= stat.av_util+(line_usage_time[i]/current tim e); rl= _MAXLINES ; stat.av util= (stat.av_utii/rl); rl = 3600.; rl = rl*_MAXJOBS; stat.avtard= stat.avtard/rl; stat.av_flow=stat.av_flow/rl; divi = (h-1) • w+ c+2; read_stat_file(divi,&srec); // this procedure reads a specific record from the statistics file rl=n; if (srec.mak_span= =0) srec=stat; else { srec.mak_span=((srec.mak_span*(rl-l))/rl)+ (stat.mak_span/rl); srec.av_tard=((srec.av_tard*(rl-l))/rl)+ (stat.av tard /rl); srec.av_flow=((srec.av_flow*(rl-l))/rl)+(stat.av_flow /rl); srec.av_util= ((srec.av_util*(rl-l))/rl)+(stat.av_util /rl); } write_rec(divi,srec); // after applying the new statistics to previous results, it restores them back to // the statistics file } /* 3.16. The following procedure is the main procedure for simulating the system: * 1 void simulator (float qf) { int i; event rec e , n event; int serv,curline, done; { for (i= 1; i< =_MAXJOBS;i+ +) { e.job_no= i; e.lin_no= 0; if (job_needs_more_services(e,serv)) planning(&e,qf,l); } for (i= 1; i< =MAXLINES; i+ +) if (!((e=*get_nextJob(i))= =NULL)) add_event(e); while (! is_event_q_empty) { if (get_next_event(&e)) { curline = e.linno; current_time=e.eventtime; 162 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. if (!((n_event= *get_nextJob(i)) = =NULL)) add_event(n_event) ; process_cuiTent_event(&e,0,qf); } } 163 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. APPENDIX B In this appendix we provide the routines of the main engine of the Cost-Based Simultaneous Assembly Planning and Scheduling system C-SAPS /*------------------------------------------------------------------------------------------- The following is the libraiy of routines and data structures for simulating the C-SAPS system. */ l.The Global Constants, Structures, and Variables * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * / /* 1. Global Constants; 1.1.1. The following variables are used to denote the type of algorithm used for the scheduling and planning in the system: * 1 ^define EDD 0 // earliest due date /^define SPT 1 // shortest processing time Adeline BASIC 2 I I basic planning ^define INTG 3 I I integrated planning //1.1.2. Shop floor and production control constants: Adeline _MAXPRD 80 // maximum number of products ^define _MAXPART 6 // maximum number of distinct machines per line as well as, distinct parts // per each product ^define _MAXLENES IS // maximum number of lines in the shop floor ^define _MAXJOBS 200 // maximum number of jobs that can be handled by the system per execution // 1.1.3. Constants used in the comparisons: ^define GREATERTHAN 0 #defme LESSTHAN 1 #defme EQUAL 2 //1.1.4. The constant offset of job numbers: #define PRD_INX_DIV I* 1.1.5. The constants used in defining the type of each vertex and its status in the Minimum Spanning Tree algorithm: */ iffdefine INTREE 0 #define FRINGE 1 ^define UNSEEN 2 164 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /* auxiliary variables */ jMefine MAXINT 65535 jMefine MAXREAL 1.7e38 /• 1.2. Global Structures; 1.2.1. The following structure denotes the data structure for the current algorithm being used by t h e system: * 1 typedef struct { int sch ; II the scheduling algorithm (EDD or SPT, see 1.1.1.) int plan ; // planning algorithm (BASIC or INTG, see 1.1.1.); } algorithm type; /* 1.2.2. The following stmcture represents the data structure used to keep the information of each product. */ typedef struct { int prd id; // the ID number of the product int part[_MAXPART] ; // the array in which represents the number of components of each // type (See 1.1.2.) }product_record; I* 1.2.3. The following structure represents the data structure used to keep the information of each assembly line, in terms of the type of machines in the line: * 1 typedef struct { int machinI_MAXPART]; II The array in which represents the structure of each line (See 1.1.2.) } line record; I* 1.2.4. The following structure represents the data structure used to keep the information of the basic assembly plan for each product: * 1 typedef struct { int prd id; II the ID number of the product int UneLMAXPART]; // the array which represents the line numbers should be used by the } bassplan record; // product in the basic assembly plan (see 1.1.2.) /* 1.2.5. The following structure represents the data structure used to keep the information of each job in the system: * 1 typedef struct { int prd id; // product type of the batch long size; // number of jobs per batch float due; // due time of the batch (minutes) long parts_remained]_MAXPRD] ; // number of parts of each type needed to be processed 165 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. float completetion_time; // total time to serve the batch float cost; // the estimated cost and completion cost } jobrecord; /* 1.2.6. The following structure is the data structure which will be used to keep track of events during the simulation. Each record corresponds to a batch and denotes the unique position of the job in the simulation system: * / typedef struct { int job no; // represents the unique job for the event int lin no; // represents the Une number the job is assigned to int event time; // the time in which the event is going to happen float total_proces_time; // the total processing time of job on this line float cost; / / the cost of the job event rec *next; // if the job is in the waiting queue, point to the next job in the queue } event rec; I* 1.2.7. The basic type for representing the characteristic vector of a line or product: * 1 short vector|_MAXPART]; // see 1.1.2. /* 1.2.8. The following data structure is used to represent the vector data type in the qualifying computation module: * 1 typedef short vector[_MAXPART]; /* 1.2.9. The following data structure is used to record different evaluation factors for each round of simulation: * 1 typedef struct { float av tard; // average tardiness of simulation float mak span; // makespan float av flow; // average flow time float av util; // average utilization float av cost; // average cost } stat rec; /* 1.2.10. The following data types are used to denote the type and status of each vertex in the Traveling Salesman algorithm: * 1 typedef int vertexdata[_MAXJOBS]; typedef short statustype; /* 1.3. Global Variables: 1.3.1. For keeping track of events which are going to happen (a batch will hnish its service on a line), we wiU construct a event queue, and the following variable will point to the top of this list: 166 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. ♦/ event rec *event_q_ptr; // (See 1.2.6. for event rec) /* 1.3.2. For each line there is a list of batches waiting to receive service from the line. Corresponding to each one of this lines we have a queue, as a linked list, and for each queue we keep a pointer: */ event rec *line_qj)trl_MAXLINES]; // (See 1.2.6 and 1.1.2.) /* 1.3.3. The following variable denotes the type of algorithm at the current execution of the system: *1 algorithm type algorithm; // (See 1.2.1.) /• 1.3.4. The following variable represents the simulation clock of the system: */ float current time; I * 1.3.5. The following array keeps the information of all the products in the system: * 1 product record product|_MAXPRD] ; // (See 1.2.2.) /♦ 1.3.6. The following array keeps the information of all assembly lines in the system: * 1 line record lineLMAXLINES]; // (See 1.2.3.) /* 1.3.7. The following array keeps the information of the basic assembly plan for each product: */ bassplan record bassplan[_MAXPRD]; // (See 1.2.4.) /♦ 1.3.8. The following array keeps the information of different batches in each execution of the system: *1 job record Job[_MAXJOBS]; // (See 1.2.5.) I* 1.3.9. The following array keeps the information of the processing time of each part for different types of machines in the shop floor: * 1 167 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. float inachme_unit_timeLMAXPART]; I* 1.3.10. The following array keeps the total utilization time of each machine in the shop floor: * 1 float machine_utilization|_M AXLINES] [_M AXPART] ; /* 1.3.11. The following variables are used to calculate the total utilization of the shop floor, and also the total utilization of each assembly line: * 1 float tot util; // these two variables are used to compute the total utilization of the system float utjperiod; int utileval; float line_usage_time[_MAXLINES]; // these two arrays are used to compute the total utilization for float last_line_usage[_MAXLINES]; // each assembly line I* 1.3.12. The following variables will be used to represent the indices graph of vertices in the Minimum Spanning Tree, the parent of each vertex in the minimum spanning tree, and the degree of each vertex in the minimum spanning tree. They will be used by the TSP algorithm: * 1 short g[_MAXJOBS]LMAXJOBS]; vertexdata parent; vertexdata degree; /* 1.3.13. The following variables are used to represent the cost matrix for the TSP algorithm: * / float grphLMAXJOBS]LMAXJOBS]; int pthLMAXJOBS]; short visited[_MAXJOBS]; int lastvisited, root; /* * * * * * * * * * * * * ************************** 2. The Qualifying Computation Functions * * * * * * * * * * * * * * **************************/ /* 2.1. The following procedure is used to And the optimal vector for a job: * / void optvec(event_rec j, vector *opt) { short i for (i= 1; i< =_MAXPART; i+ +) if (job[j.job_no].parts_remained[i] !=0) 168 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. ♦opt[i] =1; else *opt[i] =0; ) /* 2.2. The following procedure finds the characteristic vector of a specific assembly line: */ void linevec(short 1 , vector *lv) { short i; for (i= 1; i< =_MAXPART; i+ +) if (lineP].machin[i] != 0) lv[i] = 1; else lv[i] = 0; } /* 2.3. The following routine is used to compute the multiplication of two vectors: * 1 void multvec (vector *vl, vector *v2, vector v3) { short i; for (i= 1; i< =_MAXPART; i+ +) v3[i] = vl[i]*v2[i]; } /* 2.4. The following routine is used to compute the subtraction of two vectors: */ void subvec (vector *vl, vector *v2, vector v3) { short I; for (i=l; i< =_MAXPART; i+ + ) v3[i] = vl[i]-v2[i]; } /* 2.5. The following routine calculates the norm of a vector: */ short norm(vector v) { short s,i; s=0 ; for (i= 1; i< =_MAXPART; i+ +) s = s+ v[i]; return s; 169 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. } /* 2.6. The following routine is used to find the break point of a product with respect to a line; /* short brealqx)int(vector vl, vector v2) { short i,tmp; vector *vm; int ne; multvec(v 1 ,v2,vm) ; tmp =_MAXPART ; 1 = 1 ; ne = 0; while ((! ne) and (I< = _MAXPART) { if ((vl[i] ! =0) && (vm[i]= =0)) { tmp=i; ne=l; } i+ + ; } } /* 2.7. The following routine returns the characteristic vectors of the machines used by a product with respect to a line: */ void usagevec (vector opt, vector Iv, vector v) { vector *vm; short i,b multvec(opt,lv,vm); for (i=l; i< = MAXPART; i+ + ) V[i]=0; b=breakpoint(opt,lv); for (i=l; i< =b; i+ + ) v[i] = vm[i]; > /* 2.8. The following routine returns the number of used machines by a product with respect to a specific line: */ short usedmachins (vector opt, vector Iv) { vector *vm; 170 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. usagevec(opt,lv,vm); return norm(vm); } /* 2.9. The following routine finds the number of unused machines by a product with respect to a line: /* short unusedmachins (vector opt, vector v) { vector *vm; usagevec(opt,lv,vm); subvec (Iv,vm,vm); return norm(vm); } /* 2.10. The following routine finds the number of unserved parts of a job with respect to a line: * 1 short unservedparts (vector opt, vector Iv) { vector vm ; usagevec(opt,lv,vm); subvec(opt,vm,vm); return norm(vm); } /* 2.11. The following routine computes the Beta function: */ float beta (vector opt, vector Iv) { float rl,r2,r3; rl = (float) Unusedmachins(opt,lv); r2 = (float) norm (Iv); rl = rl/r2; r2 = (float) unservedparts (opt,lv); r3 = (float) norm (opt); r2 = r2/r3 ; r3 = rl*r2; return rl+r2-r3 ; } /* 2.12. The following routine finds the minimum value of the Beta function for a product among all the lines: */ short findminbeta (vector opt) { int i; float min, bt; 171 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. vector Iv; short bl; linevec(l,lv); min = beta (opt,lv); bl = 1 ; for (i=2; i< = MAXLINES;I++) { linevec(i,lv); bt = beta (opt.Iv); if (bt < min) { min = bt; bl = i; } } return (bl); } /* 2.13. The following routine computes the qualifying factor of a job for a given line: * 1 void que(short 1 , event rec j, float *qq) { short 1st; vector lvst,lv,opt; float bl,b2,qquf; *qq=0 ; optvec(j,opt); 1st = findniinbeta(opt) ; linevec(lst,lvst); if (1 ! = 1st) { linevecO.lv); bl = beta(opt,lv); b2 = beta(opt,lvst); *qq = (1.- bl)/(l.-b2); } else *qq = 1; } /**************************** 3. The Scheduling Procedures * * * **************************/ /* 3.4. The following procedure initiates the cost matrix, then by using the TSP routine, finds the approximate optimal sequence for the jobs: */ void reorder (int 1 ) 172 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. { event rec *p, *q, *tmpI_MAXJOBS]; int i, j, row, col,n; float r; n =1 ; p = line_qjptr[l]; whUe(p!= NULL) { tmp[n]=p ; p=p->next; n+ + ; } for(i=0;i< =n;i+ + , grph[i+ +][i]=MAXREAL); for(col=2;col< =n;col+ +) { q= tmp[col-l]; i = job[q->job_no].prd_id-PRD_INX_DIV ; read_graph_file(i,&r); // returns the corresponding cost from the cost file giph[l][col]=r ; grph[col][l]=r ; } for(row=2; row< =n; row++) { q=tmp[row-l]; i = job[q- > job no] .prd id-PRD ID INX ; for (col=row+1; coK =n; col+ +) { q=tmp[col-l]; j = job[q- > job no] .prd id-PRD INX DIV ; read_graph_file(i*61+j,&r); // returns the corresponding cost grph[row,col] =r ; grph[col,row] =r ; } } tsp(n); i= i; j=pth[i]; p=tmp[j-l]; line_q_ptr[l]=p; p->cost=grph[i][j]; while (pthQ] != 0) { >=j; j= p th [j]; p->next=tmp[j-l]; p=p->next; p->cost=grph[i][j]; } p- > next= NULL; for(i=l;i<=n;i++) free(tmp[i]>; 173 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. free(p); free(q); } /* * * * * *********************** 4. The Simulation Procedures /* 4.1. The following macros are used to check if there is no event in the event list, or if a job is waiting for a specific line: * 1 ^define is_event_q_empty ((event q ptr==NULL)? 1 :0) ^define is_line_q_empty(l)((line_q_ptr[(l)]==NULL)? 1:0) /* 4.2. The following function returns the next event from the event queue: * 1 int get next event (event rec *e) { event rec *p; int res; res= 0 ; if (! is_event_q_empty) { p= event_q_ptr; *e:= *event_q_ptr; event qjjtr := e->next; e->next = NULL ; free(p); res=l; } return res; } /* 4.3. The following function returns 1 if all the lines in the shop floor are serving, otherwise it returns 0: */ int all_lines_are_workingO { event rec *q; int res, i; res= 0; if ( ! is_event_q_empty) { i= l; q=event_q_ptr; while (q->next 1= nil) { «++; q=q->next; 174 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. } if(i = = MAXLINES) res =1; ) return res; } /* 4.4. The following function adds a new event to the list of events: * 1 void add event (event rec e); { event rec *p,*q,*r; int done; int 1 ; /* saving the time that jobs enters for starting the service */ last_line_usage[e.lin_no] = current time ; if (is_event_q_empty) { event_q_ptr = malloc(sizeof(event_rec)); *event_qj5tr = e; event_qjptr->next= NULL; event q ptr-> event time = current_time+ e.total_proces_time; } else { e.eventtime = e.total_proces_time+current_time; p= malloc(sizeof(event_rec)) ; ♦p= e ; if (e.event time < = event_q_ptr->event_time) { p- > next= event_q_ptr; event_q_ptr=p; } else { done=0; q=event_q_ptr; r= q->next; while (! done) { if((r != NULL) && (r- > event tims > = e.event time)) { p->next=r; q->next=p; done=l; } else{ if((R! = NULL)&&(r- > next!= NULL)) { 175 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. q=r; r=r->next; } else if ((rl=NULL) && (r->next= =NULL)) { r->next=p; p-> next= NULL; done=l; } else if (r = =NULL) { q->next=p; p-> next= NULL; done= 1; } } ) } } if (all_lines_are_working) { ut_period=current_time ; util_eval=l; } } /* 4.5. The following Auction checks to see if there is a job in which is getting service on a specific line: * 1 int there is no event from line (int lin) { event rec *P; int done ; p=event_q_ptr; done : = 0; while ((! done) && ( p! = NULL)) { if (p->If P“.lin_no = = lin) done=l; else p= p->next; } return 1-done; } /* 4.6. The following function removes all occurrences of a specific job in the waiting list of all lines: * 1 void update_all_lines (event rec j) { in t 1 ; event rec *p,*q; int done; 176 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. for (1= 1;1< =maxlines;l+ +) { if (! is_Une_q_emp»y(l)) { if (line_q_ptrDl->job_no != j.job no) { p=line_q_ptrD]; q=NULL; done=0; while ((p- > next != NULL) && (! done)) ^ { if (p- > next- > jobno = = j.jobno) { q=p->next; p->next= p-> next-> next; free(q); done= 1; } else p=p->next ; } } else{ q=Iine_q_ptr[l]; line_q_ptr[I]= q->next ; free(q); } } } } I* 4.7. The following function returns the next job from the waiting list of a specific line and removes the job from the waiting U st of all other lines: */ event rec *get_next_job (int 1 ) { event rec *p, *tmp; tmp=NULL; if (! is_line_q_empty(l)) { tmp= malloc(sizeof(event_rec)) ; *tmp=*line_qjptr[ll; tmp- > next=NULL; p=line_q_ptr[l] ; line_q__ptr[l}= p->next; free(p); update_all_lmes(*tmp); ) return tmp; } 177 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /* 4.8. The following function compares two jobs and, depending on the current algorithm, returns the appropriate constant: */ int compare_events(event_rec jl, event rec j2) { int tmp; tmp=-l; if (algorithm.sch= =EDD) { if (job{j 1 .job noj.due > job[j2.job_no].due) tmp=GREATHERTHAN; else if (job[j 1 .job no].due < job[|2.job_no].due) tmp=LESSTHAN; else tmp= EQUAL; } else if (algorithm.sch= =SPT) { if (jl.total_proces_time > j2.total_proces_time) tmp=GREATHERTHAN; else if (jl.total_proces_time < j2.total_proces_time) tmp= LESSTHAN; else tmp=EQUAL; } return tmp; } /* 4.9. The following algorithm adds a new job to the waiting list of an assembly line, depending on the type of the algorithm: * / void addjob to line (event rec j, int 1 ) { event rec *p,*q; int done; p= malloc(sizeof(event_rec)); *P=j ; p- > next= NULL; p->lin_no=l; if (is_line_q_empty(l)) line_q_ptrP]= P; else{ p->next= line_q_ptr[l]; line_q_ptr[l]= p; reorder(l); } } 178 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /* 4.10. The following procedure computes the processing time of a job on a specific line; */ void calculate_processing_time (event rec *j , int 1 ) { float pt[_MAXPART], bn, ratio; int bni; int done, i; for (i= l; i< = MAXPART; i+ +) pt[i]=0; i=l; done=0; while ((! done) && (i< = MAXPART)) { if ((! job[j->job_no].parts_remained[i]) && (line[l].machin[i] < > 0)) { ratio=job[j->job_no].size / line[l].niachin[i]; pt[i]=ratio*product[job[j->job_no].prd_id-PRD_INX_DIV].part[i]* machine_unit_Time[i] ; if (ratio * line[l].niachin[i] != job[j->job_no].size) pt[i]=pt[i]+machine_unit_time[i] ; i++; } else if (((job[j-> job_no].parts_remained[i] = =0)&& (line[l].machin[i]==0)) || ((joblj- > job_no].parts_remained[i] = =0)&& (linejl] .machin[i] ! = 0))) i++; else if ((job[j->job_no].parts_remained[i]!=0)&& (line[l] .machin[i] = = 0)) done=l; } bn=0. ; bni=0 ; for (i= 1; i< =MAXPART; i+ +) { if ((line[l].niachin[i]!=0) && (pt[i] > bn )) { bn=pt[i]; bni=i; } } j-> total_proces_time = 0; for (i= l;i< =_MAXPART;i+ +) { if ((lineP].machin[i] < >0) and (pt[i]!=0)&& (i! =bni)) { 179 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. j- > total_proces_time=j- > totaI_proces_time+ (float)product[job[j- > job_no].prd_id- PRD_INX_DIV].part[il*machine_unit_tinie[i]; } } j- > total_proces_time=j- > total_proces_time+bn; } /* 4.11. The following function checks to see if a job needs more services: */ int job needs more services(event_rec j,int *s ) { int i, done; i=i; done=0; while ((! done) && (i< = MAXPART)) Do { if (job[j.job_no].parts remained[i] 1=0) { *s=i; done=l; } else i+ + ; } return done; } /* 4.12. The following procedure checks to make sure a specific line has a required machine: */ int line_has_machin(int 1 , int m) { int res; res=0; if (Lined].machin[m] !=0) res=l; return res; } /* 4.13. The following procedure performs the planning step in which a job will be added to a line according to the planning algorithm: */ void planning(event_rec *j, float qf, int initial) { int i, next lin, done; float *qq; if (algorithm.plan= = BASIC) { i =1; done=0; while ((! done ) && (i < = MAXPART)) { 180 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. if (j-> lin_no= =0) { next_lin=bassplan[job[j->job_no].prd_id-PRD_INX_DIV].line[l]; done=l; } else if (j->lin_no==bassplan[job[j->job_no].prd_id-PRD_INX_DIV].Iine[i]) next_lin= bassplan[job[j->job_no].prd_id-PRD_INX_DIV].line[i+1]; done = 1; } else i+ + ; } if (done) { calculate_processing_time(j,next_lin); if (initial) add_job_to_line(*j,next_lin); else { if ((! is_line_q_empty(next_lin)) && (there_is_no_event_from_line(next_lin))) addJob_to_line(*j ,next_lin) else { addJob_to_line(j ,next_lin) ; done = ! ((j= get next Job (next_lin))==NULL); add_event(*j); } } } } else if (algorithm.plan= =INTG) { done=0; i=l; whUe ((! done) && (i < = MAXLINES)) { que(i,*j,qq); if (qq > = qf) { calculate_processing_time(j, i) ; if (initial) addjob_to_line(j,i); else { if ((! is_line_q_empty(i)) && (there_is_no_event_lTom_lme(i))) addJob_to_line(j ,i) else { addJob_to_line(j,i); done := !((j=get_nextJob (i))==NULL); add event(*j); ) } 181 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. } i++; } } } I* 4.14. The following procedure processes the current event and keeps the statistics and required iqxlates on the job status in the system: */ void process_current_event(event_rec *j, int sw, float ql) { float rl ,pr ; int i, *serv, done; i=l; done =0; While ((i < =_MAXPART)) && (! done) { if ((joblj- >job_no].parts_remained[i] != 0) && (line- > lin no] .machin[i] != 0)) { pr = job[j->job_no].parts_remained[i] ; machine_utilization[j- > lin_no][i|=machine_utilization|j- > Un_no][i] + (pr*machine_unit_time[i]) ; job[j->job_no].parts_remained[ij=0 ; i++; } else if (((job[j->job_no].parts_reniained[i] = = 0) && (line- > lin no] .machin[i] ==0)) 1 1 ((job[j->job_no].parts_remained[i] = = 0) && (line- > lin no] .nmchin[i] != 0))) i++; else if ((job|j->job_no].parts_remained[i] != 0) && (line->lin_no].machin[i] ==0) done =1; } if (util eval) { ut_period = current time - ut_period; totutil = totutil + utjperiod; util_eval= 0; } job[j.job no].cost := job[j.job_no].cost+ j.cost; line_usage_time[j->lin_no] = line_usage_time[j->lin_no] + current_time-last_line_usage[j- > lin no] ; if (job_needs_more_services(j,serv)) planning(j,qf,sw); else job[j- >job no].completetion time= current time ; } 182 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. I * 4.15. The following routine will be used to compute the statistics for each round of simulation: * / void statistics (int w, int h, int c, int nr) { stat rec stat, srec; float rl; int i, divi; stat.mak_span= currenttime; rl:= 3600.; stat.mak_span= stat.mak_span/rl; stat.av_taid= 0 ; stat.av_flow= 0 ; stat.av_cost= 0 ; for (i= l;i< =_MAXJOBS; i+ +) { if (job[i].completetion_time > job[i].due) stat.avtard = stat.av_tard+(job[i].completetion_time-job[i].due ); compute_cost(stat,&job[i]); // This routine computes the total cost of // current job stat.avflow= stat.av_flow+job[i] .completetiontime; stat.av_cost=stat.av_cost+job[i].cost; } stat.av_util=0; for (i=l; i< =_MAXLINES; i+ +) stat.av_util= stat.av_util+(line_usage_time[i]/current_time); rl= MAXLINES ; stat.av_util=(stat.av_util/rl); rl := MAXJOBS; stat.av_cost= stat.av cost /rl; rl = 3600.; rl = rl*_MAXJOBS; stat.avtard= stat.av_tard/rl; stat.avflow= stat.avflow/rl; divi= (h-l)*w+ c +2; read_stat_Ele(divi,&srec); // this procedure reads a specific record from the statistics file rl=n; if (srec.mak_span= =0) srec= stat; else { srec.mak_span=((srec.mak_span*(rl-l))/rl)+(stat.mak_span/rl); srec.av_tard=((srec.av_tard*(rl-l))/rl)+(stat.av_tard /rl); srec.av_flow=((srec.av_flow*(rl-l))/rl)+ (stat.av flow /rl); srec.av util= ((srec.av_util*(rl-1))/rl)+ (stat.av util /rl); srec.av cost := ((srec.av_cost*(rl-l))/rl)+(stat.av_cost/rl); } write_rec(divi,srec); // after applying the new statistics to previous results, it restores them back to // the statistics ftle } 183 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /♦ 4.16. The following procedure is the main procedure for simulating the system: * 1 void simulator (float qf) { int i; event rec e , n event; int serv,curline, done; { for (i= 1 ; i< =_MAXJOBS;i+ +) { e.job_no= i; e.lin no= 0; if (job_needs_more_services(e,serv)) planning(&e,qf,l); } for (i= 1; i< = MAXLINES; i+ +) if (!((e="‘ get_nextJob(i))= =NULL)) add_event(e); while (! is_event_q_empty) { if (get_next_event(&e)) { curline = e.linno; current time= e.event time; if (l((n_event=*get_nextJob(i))= =NULL)) add_event(n_event) ; process_current_event(&e,0 ,qf) ; } } } 184 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. APPENDIX C In this appendix we provide the main routines of the engine of the Simultaneous Assembly Planning and Scheduling system using the Time Window concept: (T- SAPS) The following program is the library of routines and data structures for simulating the T-SAPS system */ 1. The Global Constants, Structures, and Variables * * * * * * * * * * * * * * * * * * * *************#***************/ I* 1. Global Constants: 1.1.1. The following variables are used to denote the type of algorithm used for the scheduling and planning in the system. * 1 ^define EDD 0 //earliest due date fdelme SPT 1 // shortest processing time ^define BASIC 2 // basic plamiing ^define INTG 3 // integrated planning // 1.1.2. Shop floor and production control constants: ^define MAXPRD 80 // maximum number of products. #define MAXPART 6 // maximum number of distinct machines per line as well as, distinct parts // per each product #define MAXLINES 15 // maximum number of lines in the shop floor #define MAXJOBS 200 // maximum number of jobs that can be handled by the system per execution ^define WAIT // if a job is a waiting queue ^define ACTIVE // job is active and getting service from a line ^define _TW 15 // the constant value for the time window //1.1.3. Constants used in the comparisons: ^define GREATERTHAN 0 ^define LESSTHAN 1 ^define EQUAL 2 // 1.1.4. The constant offset of job numbers: ^define PRD INX DIV 185 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /* auxiliary variables */ iW efine MAXINT 65535 #define MAXREAL 1.7e38 /• 1.2. Global Structures: 1.2.1. The following structure denotes the data structure for the current algorithm being used by the system: * 1 typedef struct { int sch ; // the scheduling algorithm (EDD or SPT, see 1.1.1.) int plan ; // planning algorithm (BASIC or INTO, see 1.1.1.); } algorithm type; I* 1.2.2. The following structure represents the data structure used to keep the information of each product: * / typdef struct { int prd id; // the ID number of the product int part[_MAXPART] ; // the array in which represents the number of components of each // type (See 1.1.2.) }product_record ; /♦ 1.2.3. The following structure represents the data structure used to keep the information of each assembly line in terms of the type of machines in the line: */ typedef struct { int machin[_MAXPART]; // the array in which represents the structure of each line (See 1.1.2.) } line record; /* 1.2.4. The following structure represents the data structure used to keep the information of the basic assembly plan for each product: */ typedef struct { int prd id; // the ID number of the product int line[_MAXPART]; // the array which represents the line numbers should be used by the } bassplan record; // product in the basic assembly plan (see 1.1.2.) /* 1.2.5. The following structure represents the data stmcture used to keep the information of each job in the system: */ 186 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. typedef struct { int prd id; // product type of the batch long size; // number of jobs per batch float due; // due time of the batch (minutes) long parts_remainedI_MAXPRD]; II number of parts of each type needed to be served float completetion_time; // total time to serve the batch float cost; // the estimated cost of the completion cost int status; // denotes the current status of a job waiting for a line or getting service // from a line } jobrecord; /* 1.2.6. The following structure is the data structure which will be used to keep track of events during the simulation. Each record corresponds to a batch and denotes the unique position of the job in the simulation system: * 1 typedef struct { int job no; // represents the unique job for the event int lin no; // represents the line number the job is assigned to int event time; // the time in which the event is going to happen float total_proces_time; // the total processing time of job on this line float cost; // the cost of the job event rec *next; // if the job is in the waiting queue, point to the next job the in queue } event rec; I* 1.2.7. The basic type for representing the characteristic vector of a line or product: * 1 short vector[_MAXPART]; // see 1.1.2. /* 1.2.8. The following data structure is used to represent the vector data type in the qualifying computation module: */ typedef short vector[_MAXPARTj; /* 1.2.9. The following data structure is used to record different evaluation factors for each round of simulation: * 1 typedef stmct { float av tard; II average tardiness of simulation float mak span; // makespan float av flow; // average flow time float av util; // average utilization float av cost; // average cost } stat rec; /* 187 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 1.2.10. The following data types are used to denote the type and status of each vertex in the Traveling Salesman algorithm: */ typedef int vertexdata[_MAXJOBS]; typedef short statustype; /* 1.3. Global Variables: 1.3.1. For keeping track of events which are going to happen (a batch will finish its service on a Une), we wUl construct an event queue, and the following variable will point to the top of this list: */ event rec *event_q_j)tr; // (See 1.2.6. for event rec) I* 1.3.2. For each line there is a U st of batches waiting to receive service from the line. Corresponding to each one of these lines we have a queue, as a linked Ust, and for each queue we keep a pointer: ♦/ event rec *Une_q_ptr[_MAXLINES]; // (See 1.2.6. and 1.1.2.) /* 1.3.3. The following variable denotes the type of algorithm at the current execution of the system: */ algorithm type algorithm;/ / (See 1.2.1.) /* 1.3.4. The foUowing variable represents the simulation clock of the system: */ float current time; /* 1.3.5. The foUowing array keeps the information of aU the products in the system: * / product record productLMAXPRD]; // (See 1.2.2.) /* 1.3.6. The foUowing array keeps the information of aU the assembly lines in the system: */ line record line[_MAXLINES]; // (See 1.2.3.) I * 1.3.7. The foUowing array keeps the information of the basic assembly plan for each product: * 1 bassplan record bassplan[_MAXPRD]; // (See 1.2.4.) 188 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. /* 1.3.8. The following array keeps the information of different batches in each execution of the system: */ job record Job[_MAXJOBSl; // (See 1.2.5.) /* 1.3.9. The following array keeps the information of the assembly line of each part for different types of machines in the shop floor: */ float machine_unit_time|_MAXPART]; /* 1.3.10. The following array keeps the total utilization time of each machine in the shop floor: */ float machine_utilizationl_MAXLINES][_MAXPART]; /* 1.3.11. The following variables are used to calculate the total utilization of the shop floor, and also the total utilization of each assembly line : * 1 float tot util; // these two variables are used to compute the total utilization of the system float ut_period; int utileval; float line_usage_time[_MAXLINES]; I I these two arrays are used to compute the total utilization for float last_line_usageI_MAXLINES]; // each assembly line /* 1.3.12. The following variables are used to represent the cost matrix for the Hungarian algorithm: * 1 float grph[_MAXJOBS][_MAXJOBS]; int mate|_MAXJOBS]; float alpha[_MAXJOBS], betaLMAXJOBS]; int exposed[_MAXJOBS], slack[_MAXJOBS], label[_MAXJOBS], nhbor[_MAXJOBS]; short aLMAXJOBS][_MAXJOBS], qLMAXJOBS]; float line_event_time[_MAXLINES]; event rec line_event_ptr[_MAXLINES]; 2. The Qualifying Computation Functions ****************************************/ I* 2.1. The following procedure is used to find the optimal vector for a job: * 1 void optvec(event_rec j, vector *opt) 189 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. { short i for (i=l; i< =_MAXPART; i+ +) if (job[j.job_no].parts_reniained[i] !=0) *opt[i] =1; else *opt[i] =0; } I* 2.2. The following procedure finds the characteristic vector of a specific assembly line: ♦/ void linevec(short 1 , vector *lv) { short i; for (i= 1; i< =_MAXPART; i+ +) if (lineP].machin[i] != 0) lv[i] = 1; else lv[i] = 0; } /* 2.3. The following routine is used to compute the multiplication of two vectors: * 1 void multvec (vector *vl, vector *v2, vector v3) { short i; for (i=l; i< =_MAXPART; i+ +) v3[i] = vl[i]*v2[i]; } I* 2.4. The following routine is used to compute the subtraction of two vectors: * 1 void subvec (vector *vl, vector *v2, vector v3) { short I; for (i= 1; i< =_MAXPART; i+ +) v3[il = vlli]-v2li]; } I* 2.5. The following routine calculates the norm of a vector: */ short norm(vector v) { short s,i; 190 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. s=0 ; for (i= 1; i< =_MAXPART; i+ +) s = s+ v[i]; return s; } I* 2.6. The following routine is used to find the break point of a product with respect to a line: /* short brealq>oint(vector vl, vector v2) { short i,tmp; vector *vm; int ne; multvec(v 1, v2,vm) ; tmp =_MAXPART ; 1 = 1 ; ne = 0; while ((! ne) and (I< = MAXPART) { if((vl[i] !=0)&&(vi]==0)) { tmp=i; ne=l; } i+ + ; } } /* 2.7. The following routine returns the characteristic vectors of the machines used by a product with respect to a line: * 1 void usagevec (vector opt, vector Iv, vector v) { vector *vm; short i,b multvec(opt,lv,vm); for (i= 1; i< = MAXPART; i+ +) V[il=0; b =breakpoint(opt ,lv) ; for (i= l; i< =b; i+ + ) v[i] = vi); } I * 2.8. The following routine returns the num ber of used machines by a product with respect to a specific line: */ 191 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. short usedmachins (vector opt, vector Iv) { vector *vm; usagevec(opt,lv,vm); return norm(vm); } /* 2.9. The following routine finds the number of unused machines by a product with respect to a line: I* short unusedmachins (vector opt, vector v) { vector *vm; usagevec(opt,lv,vm); subvec (lv,vm,vm); return norm(vm); } I* 2.10. The following routine finds the number of unserved parts of a job with respect to a line: * 1 short unservedparts (vector opt, vector Iv) { vector vm ; usagevec(opt,lv,vm); subvec(opt,vm,vm); return norm(vm); } /* 2.11. The following routine computes the Beta function: */ float beta (vector opt, vector Iv) { float rl,r2,r3; rl = (float) Unusedmachins(opt,lv); r2 = (float) norm (Iv); rl = rl/r2; r2 — (float) unservedparts (opt,lv); r3 = (float) norm (opt); r2 = r2/r3 ; r3 = rl*r2; return rl+r2-r3 ; } /* 2.12. The following routine finds the minimum value of the Beta function for a product among all the lines: * 1 192 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. short fiodininbeta (vector opt) { int i; float min, ht; vector Iv; short bl; linevec(l,lv); min = beta (opt.lv); bl = 1; for (i=2; i< =_MAXLINES;i+ +) { linevec(i,lv); bT = beta (opt.lv); if (bt < min) { min = bt; bl = i; } } return (bl); } /* 2.13. The following routine computes the qualifying factor of a job for a given line: * / void quf(short 1 . event rec j. float *qq) { short 1st; vector lvst.lv.opt; float bl.b2.qquf; *qq=0 ; optvec(j.opt); 1st = findminbeta(opt); linevec(lst.lvst); if (1 != 1 st) { linevec(l.lv); bl = beta(opt.lv); b2 = beta(opt.lvst); *qq = (l.-b l)/(l.-b 2 ); } else *qq = 1; } /**************************** 3. The Scheduling Procedures *****************************/ /* 3.1. The following routines are used to implement the Hungarian method. The input structure consists of the number of vertices and cost matrix, and the output structure is a vector, mate, corresponding 193 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. to an assignment: * ! void modify(n) { float teta; int i j,k; for (j=2;j< =n/2;j++) teta=slack[l]; for(j=2;j < =n/2y + +) if (slack[j]<teta) teta=slack[j]; teta=teta/2; for (i=l;n/2;i++) if (label[i]!=0) alpha[i]= alpha[i] + teta; else alpha[i]= alpha[i]-teta; for (i=n/2+l;n;i++) if (slack[i] = =0) beta[i]=beta[i]-teta; else beta[i]= beta[i]+ teta; for (i=n/2+ l;n;i+ +) if (slack[i]>0) { slack[i]= slack[j]-2*teta; if (slack[i]= =0) exposed[nhbor[i]]= i; else { label[mate[i]]= nhbor[u] ; q[mate[i]] = l; a[nhbor[i]][mate[i]] = 1; } } } void hungarian(int n) { int i,j,k; for (i=0;i< =n;mate[i++]=0,label[i]=0); for (i=0;i< =n/2;alpha[i++]=0.); for (i=n/2+l;i< =n;i++) { beta[i]=grph[i][l]; for (j=2;j< =n/2;j+ +) if (grph[i][j] <beta[i]) beta[i]=grph[i][j]; } for(i=l;i< =n;i++) { for(j= l;j< = n ;j+ + ) 194 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. for (k=l;k< =n;k++) a[i][k]=0; for (i=0;i< =n/2;exposed[i++]=0.); for (i=n/2+l;i< =n;i+ +) slack[i]= MAXINT; for (i=l;i< =n/2;i++) for (j=n/2+l;i< =n;j++) if (alpha[i]+beta]=grph[i][j]) { if (mate] = =0) exposed] =j; else a[i][mate]=l; } for(j = I;j<=n;j + +) qül=0; for(i= l;i< =n;i+ +) { if (mate[i]= =0) { if (exposed]!=0) { modiiy(n); goto end stage; } q[il=i; label[i]=0; for (k=n/2+ l;k< =n;k+ +) if ((grph[i,k]-alphali]-beta(k]>0)&& (grph[i,k]-alpha[i]-beta[k] < slackjk]) { slack[k]=grph[i,k]-alpha[i]-beta[k]; nhbor[k]=i; } } done=0; j=0; for (i= l;i< = n ;i+ + ) if(q[i]!=0) { done=l; break; j=i; } »=j; while (! done) { q[i]=0; for(j=l;j<=n;j++) if ((a[i][j] = = !)&& (label] = =0)) { label]=i; if (exposed] !=0) { modiiy(n); 195 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. goto end stage; } for(k=n/2+ l;k< =n;k+ +) if ((grph[j][k]-alpha[i]-beta[k]>0)&& (grph[j][k]-alpha[j]-beta[k] < slack[k]) { slack[k]=grph[j][k]-alpha]-beta[kj; nhbor[k]=j; } } modify(n); for (i= l;i< =n;i+ +) if(q[i]!=0) { done=l; break; j=i; } i=j; end stage: ; } } } } void reorder(float TW) { job record *tmp[_MAXJOBS]; int i, j, row, cold; float r; n=0; for (i= l;i< =_MAXJOBS;i+ +); if (line_event_time[i]< =current_time+_TW) tmp[++n]=line_event_ptr[i]; ; for (i= l;i< =n;i+ +) update all lines (*tmp[i]); n=n*2; for(row= 1; row< =n/2;row+ +) for (col= l;col< =n/2;col+ +) { grph[row][col+n/2]= cost_ofJob(*tmp[row],col); // the cost of serving job[row] on line, col grph[col+ n/2] [row]= grph[ro w] [col+ n/2] ; } } bungarian(n); for(i= l;i< =n/2;i+ +) addJob_to_line(*tmp[i],mate[i]); for(i=l;i< =n/2;i++) free(tmp[i]); } 196 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. y**************************** 4. The Simulation Procedures ***$*************************/ /* 4.1. The following macros are used to check if there is no event in the event list, or if a job is waiting for a specific line: */ ^define is_event_q_empty ((event_q_ptr= =NULL)? 1 :0) #define is_line_q_empty(l)((line_q_ptr[(l)]==NULL)? 1:0) /* 4.2. The following function returns the next event from the event queue: */ int get next event (event rec *e) { event rec *p; int res; res= 0 ; if (! is_event_q_empty) { p= event_q_ptr; *e:= *event q ptr; event_q_ptr := e->next; e->next = NULL ; lree(p); res=l; } return res; } /* 4.3. The following function returns 1 if all the lines in the shop floor are serving, otherwise it returns 0: */ int all_lines_are_workingO { event rec *q; int res, i; res= 0; if ( ! is_event_q_empty) { i= l; q=event_q_ptr; while (q->next != nil) { i+ + ; q=q->next; } if (i = = MAXLINES) 197 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. res =1; } return res; } /• 4.4. The following function adds a new event to the list of events: * 1 void add event (event rec e); { event rec *p,*q,*r; int done; int 1 ; /* saving the time that jobs enters for starting the service */ last_line_usage[e.lin_no] = current time ; line_event_time[lin_no]=current_time+ e.total_proces_time; line_event_ptr [lin_no]= e; job[e- > jobno] .status= ACTIVE; if (is_event_q_empty) { event_q_ptr = malloc(sizeof(event_rec)); *event_q_ptr = e; event_q_ptr->next= NULL; event q ptr-> event time = current_time+ e.total_proces_time; } else { e.eventtime = e. totaljprocestime+ currenttime; p= malloc(sizeof(event_rec)) ; *p= e ; if (e.event time < = event q ptr-> event time) { p- > next= event_q_ptr ; event_q_ptr=p; } else { done=0; q=event_q_ptr; r= q->next; while (! done) { if ((r != NULL) && (r->event_time > = e.event time)) { p->next=r; q->next=p; done=l; } else{ if((Rl=NULL)&&(r- > next!= NULL)) 198 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. { q=r; r=r->next; } else if ((r!=NULL) && (r->next= =NULL)) { r->next=p; p- > next= NULL; done=l; } else if (r= =NULL) { q->next=p; p- > next=NULL; done=l; } } } } } if (all_lines_are working) { ut_period=current_time ; utU_eval=l; } } /* 4.5. The following function checks to see if there is a job in which is getting service on a specific line: * 1 int there_is_no_event_from_line (int lin) { event rec *P; int done ; p=event_q_ptr; done := 0; while ((! done) && ( p!= NULL)) { if (p- > If P" .linno = = lin) done=l; elsep= p->next; } return 1-done; } /* 4.6. The following function removes all occurrences of a specific job in the waiting list of all lines: */ void update all lines (event rec j) { 199 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. int 1 ; event rec *p,*q; int done; for (1= 1;1< =_MAXLINES;1+ +) { if (! is_line_q_empty(l)) { if (line_q_ptrD]->job_no != j.job no) { p=line_q_ptrDl; q=NULL ; done=0; while ((p->next !=NULL) && (! done)) { if (p- > next- > jobno = = j.jobno) { q=p->next; p->next= p-> next-> next; free(q); done=l; } else p=p->next ; } } else{ q=line_qjjtr[l]; Une_q_ptr[l]= q->next ; free(q); } } } } /* 4.7. The following function returns the next job from the waiting list of a specific line and removes the job from the waiting list of all other lines: */ event rec *get_next_job (int 1 ) { event rec *p, *tmp; tmp= NULL; if (! is_line_q_empty(l)) { tmp= malloc (sizeof(event_rec)) ; *tmp= *line_q_ptr[l]; tmp- > next= NULL; p=line_q_ptr[l] ; line_q_ptrP]= p->next; free(p); update_all_lines(*tmp); } 2 0 0 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. return tmp; } /* 4.8. The following function compares two jobs and, depending on the current algorithm, returns the appropriate constant: */ int compare_events(event_rec jl, event rec j2) { int tmp; tmp=-l; if (algorithm.sch= =EDD) { if (job[j 1 .job no] due > job[j2.job_no].due) tmp=GREATHERTHAN; else if (jobjjl.job noj.due < job[j2.job_no].due) tmp= LESSTHAN; else tmp=EQUAL; > else if (algorithm, sch = = SPT) { if (jl.total_proces_time > j2.total_proces_time) tmp=GREATHERTHAN; else if (jl.total_proces_time < j2.total_proces time) tmp= LESSTHAN ; else tmp=EQUAL; } return tmp; } I* 4.9. The following algorithm adds a new job to the waiting U st of an assembly line, depending on the type of the algorithm: */ void addJob_to_line (event rec j, int 1 ) { event rec *p,*q; int done; p= malloc(sizeof(event_rec)); *p=j ; p-> next= NULL; p->lin_no=l; if (is_line_q_empty(l)) line_qj}tr[l]= P; else{ if (compare_events(*line_q_ptr[l],*p)= = GREATHERTHAN) { p- > next= line_q_ptr P] ; 201 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. line_q_ptr[ll=P; } else { q=line_q_ptr[l]; done=0; while (! done) { if (q->next !=NULL) { if (compare_events(*(q->next),*P)= = GREATHERTHAN) { p- > next= q- > next; q->next=p; done=l; } else q= q->next; } else{ q->next=p; done=l; } } } } I* 4.10. The following procedure computes the processing time of a job on a specific line: * 1 void calculate_processing_time (event rec *j , int 1 ) { float pt[_MAXPART], bn, ratio; int bni; int done, i; for (i= l; i< = MAXPART; i+ +) pt[i]=0; i=l; done=0; while ((! done) && (i< = MAXPART)) { if ((! job[j- > job no] .parts_remained[ij) && (line[l].machin[i] < > 0)) { ratio =job[j->job_no].size / line[l].machin[i]; pt[i]= ratio*product[job[j- > job no] .prd id-PRD INX DIW] .part[i] * machine_unit_Time[i] ; if (ratio * line[l].machin[i] != job[j-> job no].size) pt[i]= pt[i]+ machine_unit_time[i] ; i+ + ; } 2 0 2 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. else if (((job[j->job_no].parts_reinained[i]= =0)&& (line[l].machin[i]= =0)) 1 1 ((job[j- > job_no].parts_remained[i] = =0)&& (line[I].machiii[i]! =0))) i+ + ; else if ((job[j->job_no].parts_remained[i]!=0)&& (liae[l] .machin[i] = =0)) done=l; } bn=0. ; bni=0 ; for (i=l; i< = MAXPART; i+ +) { if ((line[l].machin[i]!=0) && (pt[i] > bn )) { bn=pt[i]; bni=i; } } j->totaljproces_time = 0; for (i=l;i<=MAXPART;i++) { if ((line[l].niachin[i] < > 0 ) and (pt[i]!=0) && (i!=bni)) { j- > total_proces_tmie=j- > total_proces_time+ (float)product[job[j- > job_no].ptd_id- PRD_INX_DIV].part[i]*machine_unit_time[i]; } } j- > total_proces_time=j- > total_proces_time+bn; } /* 4.11. The following function checks to see if a job needs more services: * 1 int job_needs_more_services(event_rec j,int *s ) { int i, done; i=l; done=0; while ((! done) && (i< = MAXPART)) Do { if (job[j.job_no].parts remained[i]!=0) { *s=i; done=l; } else i+ +; } 203 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. return done; } /* 4.12. The following procedure checks to make sure a specific line has a required machine: * 1 int line_has_machin(int 1 , int m) { int res; res=0; if (Line[l].machin[m] 1=0) res=l; return res; } /♦ 4.13. The following procedure performs the planning step in which a job will be added to a Une according to the planning algorithm: */ void planning(event_rec *j, float qf, int initial) { int i, next lin, done; float *qq; if (algorithm.plan = = BASIC) { I =1; done=0; while ((! done ) && (i < = MAXPART)) { if (j->lin_no==0) { next_lin=bassplan[job[j->job_no].prd_id-PRD_lNX_DIV].Ue]; done=l; } else if (j- > lin no = =bassplan|job[j- >job no] .prd id-PRD INX DIV].line]) { next_lin= bassplan[job[j->job_no].prd_id-PRD_INX_DIV].line+1]; done = 1; } else i++; } if (done) { calculate_processing_time(j ,next_lin) ; if (initial) addJob_to_line(*j ,next_lin) ; else { if ((! is_line_q_empty(next_lin)) && (there_is_no_event_from_line(next_lin))) addJob_to_line(*j,next_lin) 204 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. else { add job_to_line(j,next lin) ; done = !((j=get_next_Job (next_lin))==NULL); add_event(*j); } } } } else if (algorithm.plan = =1NTG) { done=0; i=l; while ((! done) && (i < = MAXLINES)) { quf(i.*j.qq); if (qq > = qf) { calculate_processing_time(j,i); if (initial) addJob_to_line(j ,i) ; else { if ((! is_line_q_empty(i)) && (there_is_no_event_from_line(i))) addJob_to_line(j ,i) else { addJob_to_line(j,i); done : = !((j=get_next_Job (i))==NULL); add_event(*j); } } } i+ + ; } } } I* 4.14. The following procedure processes the current event and keeps the statistics and required updates on the job status in the system: * 1 void process_current_event(event_rec *j, int sw, float qf) { float rl ,pr ; int i, *serv, done; { i=l; done =0; While ((i < = MAXPART)) && (! done) { if ((job[j->job_no].parts_remained[i] != 0) && (line[j->lin_no].machin[i] != 0)) { 205 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. pr = job(j->job_no].parts_remained[i] ; machine_utilization[j- > lm_no][i]=machine_utili2ation(j- > lin_iio][i] + (pr*machine_umt_Time[i]) ; job[j->job_no].parts_remained[i]=0 ; i++; } else if (((job[j->job_no].parts_remained[i] = = 0) && (line[j->lin_no].niachin[i] ==0)) {| ((job[j->job_no].parts_remained[i] = = 0)&& (line[j->Im_no].inachin[i] != 0))) i++; else if ((job|j->job_no].parts_remained[il != 0) && (line[j->lia_no].machm[i] == 0) done =1; } if (util eval) { ut_period = currenttime - ut_period; totutil = totutil + ut_period; util_eval= 0; } reorder(_TW); job[j.job_no].cost := joby.job_no].cost+ j.cost; lme_usage_time[j->lin_no] = line_usage_time[j->lin_no] + current_time-last_line_usage[j->lin_no] ; if (job_needs_more_services(j,serv)) planning(j,qf,sw); else job[j- > job_no] .completetion_time= current time ; } I * 4.15. The following routine will be used to compute the statistics for each round of simulation: */ void statistics (int w, int h, int c, int nr) { stat rec stat, srec; float rl; int i, divi; stat.mak_span= currenttime; rl:= 3600.; stat.mak_span= stat.mak_span/rl; stat.av_tard= 0 ; stat.av_flow= 0 ; stat.av_cost= 0 ; for (i= l;i< =_MAXJOBS; i+ +) { if (job[i].completetion_time > job[i].due) stat.avtard = stat.av_tard+(job[i].completetion_time-job[i].due); compute_cost(stat,&job[i]); // This routine computes the total cost of // current job 206 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. stat.av_flow=stat.av_flow+job[i].completetion_time; stat.av_cost=stat.av_cost+job[iJ.cost; } stat.av_util=0; for (i= 1; i< =_MAXLINES; i+ +) stat.av_utU= stat.av_util+(line_usage_time[i]/current_time); rl= MAXLINES ; stat. av_util= (stat. av_util/rl) ; rl := MAXJOBS; stat.av_cost= stat.av_cost /rl; rl = 3600.; rl = rl*_MAXJOBS; stat.av_tard=stat.av_tard/rl; stat.av_flow=stat.av_flow/rl; divi= (h-1) * w+ c+2; read_stat_file(divi,&srec); // this procedure reads a specific record from the statistic file rl=n; if (srec.mak_span= =0) srec= stat; else { srec.mak_span=((srec.mak_span*(rl-l))/rl)+(stat.mak_span/rl); srec.av_tard=((srec.av_tard*(rl-l))/rl)+(stat.av_taid /rl); srec.av_flow=((srec.av_flow*(rl-l))/rl)+(stat.av_flow /rl); srec.av_util=((srec.av_util*(rl-l))/rl)+(stat.av_util /rl); srec.avcost = ((srec.av_cost*(rl-l))/rl)+(stat.av_cost/rl); } write_rec(divi,srec); // after applying the new statistics to the previous results, it restores them back // to the statistics file } I* 4.16. The following procedure is the main procedure for simulating the system; */ void simulator (float qf) { int i; event rec e , n event; int serv,curline, done; { for (i= 1; i< =_MAXJOBS;i+ +) { e.job_no= i; e.lin_no= 0; if (job_needs_more_services(e,serv)) planning(&e,qf, 1); } for (i=l; i<=MAXLINES; i++) if (!((e=*get_nextJob(i))==NULL)) add_event(e); while (! is_event_q_empty) 207 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. { if (get_next_event(&e)) { curline = e.lin_no; currenttime= e. eventtime; if (!((n_event=*get_nextJob(i))= =NULL)) add_event(n_event); process_current_event(&e,0,qO; } } } 208 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. REFERENCES Akella, R.S., Y, Choong and S.B. Gershwin. "Short-Term Production Scheduling of an Automated Manufacturing Facility," Journal of Research and Development, Vol. 29, No. 4, pp. 392-400, 1991. Arabian, Jack " Computer Integrated Electronics Manufacturing and Testing," Marcel Dekker, Inc., 1989.1. Baker, Kenneth R. "Introduction to Sequencing and Scheduling," John Wiley and Sons, Inc., 1974. Baase, Sara "Computer Algorithms," Addison-Wesley Publishing Company, 1988. Baybars, I. "An Efficient Method for the Simple Assembly Line Balancing Problem," International Journal of Production Research, Vol.24, N o.l, pp. 149- 166, 1990. Bensana, E., M. Correge, G. Bel and D. Dubois. "An Expert System Approach in Industrial Job Shop Scheduling," Proceeding of 1986 IEEE International Conference on Robotics and Automation, San Francisco, April 7-10, pp. 1645-1650, 1986. Berenji, H. and B. Khoshnevis. "Use of Artificial Intelligence in Automated Process Planning," Computer in Mechanical Engineering, pp. 47-55, September, 1986. Bottlik, G. "Implementing a Short Interval Shop Floor Scheduling System," Xerox Co., 1990. Bruno, B., A. Elia and P. Laface. "A Rule Base System to Scheduling Production," IEEE Computer, Vol. 19, No. 7, pp. 32-40, 1989. Chang, T., R. Wysk and R. Davis. "Interfacing CAD and CAM: A Study in Hole Design," Computers and Industrial Engineering, 6, 1982. Christofide, N. "Worst Case Analysis of a New Heuristic for the Travelling Salesman Problem," Technical Report, GSIA, Camegie-Mellon University, 1976. Collinot, A., C.L. Pape and G. Pinoteau. "SONIA: A Knowledge-Based Scheduling System," Artificial Intelligence in Engineering, Vol.3, No.2, pp. 86-94, 1988. Conway, R.W., W. L. Maxwell and L.W. Miller. "Theory of Scheduling," Addison- Wesley Publishing Co., 1967. 209 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Curtis, Mark A, "Process Planning," John Wiley and Sons, Inc., 1985. Davis, H.W., Anna Bramanti-Greger and Xiaofeng Chen. "Towards Finding Optimal Solutions with Non-Admissible Heuristics; A New Technique," Proceedings of the International Joint Conference on Artificial Intelligence, pp. 303-308, 1989. Descotte, Y. and J. Latombe. "Making Compromises Among Antagonist Constraints in a Planner," Artificial Intelligence, Vol. 27, pp. 183-217, 1985. Dunn, M. and W. Mann. "Compute Production Process Planning," 15th Numerical Control Annual Meeting, Chicago, 1978. Egbelu, P.J. "Planning for Machining in a Multi-job, Multi-machine Manufacturing Environment," Journal of Manufacturing Systems, Vol. 5, N o.l, pp. 1-14, 1989. Edosomwan J.A. "Productivity and Quality Improvements in Electronics Assembly," McGraw-Hill Book Company, 1988. Fox, M.S. and S.F. Smith. "ISIS: A Knowledge-Based System for Factory Scheduling," Expert Systems, Vol.l, pp. 25-49, 1984. French, S. "Sequencing and Scheduling," J. Wiley and Sons, New York, 1982. Fredrick, A. and K. Preston White Jr. "A Recent Survey of Production Scheduling," IEEE Transactions on Systems, Man, and Cybernetics, Vol. 18, No.6, pp. 841-851, Nov./Dec., 1988. Garey, M.R. and D.S. Johnson. "Computers and Intractability: A Guide to the Theory of NP-Completeness," W.H. Freeman and Co., 1979. Gershwin, S.B., R.S. Akella and Y. Choong. "Short-Term Production Scheduling for an Automated Manufacturing Facility," IBM Journal of Research and Development, Vol. 29, No. 4, pp. 392-400, 1991. Gibbons, Alan. "Algorithmic Graph Theory," Cambridge University Press, 1985. Ginsberg, G. "Surface Mount and Related Technologies," Lafayette Hill, Pennsylvania, 1992. Gould, Ronald. "Graph Theory," The Benjamin/Cummings Publishing Company, 1988. 2 1 0 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Hammer, P.L. and S. Rudeanu. "Boolean Methods in Operations Research Areas," Berlin, New York, Springer-Verlag, 1968. Hüderbrant, R.R. "Scheduling Flexible Machining Systems When Machines Are Prone to Failure," Ph.D. Thesis, MIT, Cambridge, Mass., 1980. Holton, D.A. and J. Sheehan, "The Petersen Graph," Cambridge University Press, 1993. Iwata, K. and C. Sugimura. "An Integrated CAD/CAPP System with "Know- on Machining Accuracies of Parts," Journal of Engineering for Industry, Vol. 109, pp. 128-133, 1987. Kanet, J.J. and H.H. Adelsberger. "Expert Systems in Production Scheduling," European Journal of Operations Research, Vol. 29, Nov. 1, pp. 51-59, 1989. Kear, F.W. "Printed Circuit Assembly Manufacturing," Marcel Dekker, Inc., New York, 1988. Khoshnevis, B. and H. Berenji. "Manufacturing Process Planning with Relational Production System," Proceedings of IEEE Conference on Systems, Man, and Cybernetic, Nov. 1985. Khoshnevis, B. and Q. Chen. "Integration of Process Planning and Scheduling Functions," Journal of Intelligent Manufacturing, Vol.l, pp. 165-176, 1990. Khoshnevis, B., G. Bottlik, and A. Azmandian. "Simultaneous Generation of Assembly Planning and Scheduling in Electronics Assembly Operations," Journal of Integrated Maufacturing Systems, Vol. 5, No. 4-5, pp. 30-40, 1994. Kusiak, A. "Aggregate Scheduling of a Flexible Machining and Assembly System," IEEE Transactions on Robotics and Automation, Vol. 5, No. 4, pp. 451-459, 1986. Kusiak, A., A. Vannelli, and K. R. Kumar. "Selection of Process Plans in Automated Manufacturing Systems," IEEE Journal of Robotics and Automation, Vol. 4, No. 4, pp. 397-402, 1991. Kusiak, A., and M. Chen. "KBSS: A Knowledge-Based System for Manufacturing Scheduling," Technical Report 5. Department of Mechanical and Industrial Engineering, University of Manitoba, Canada, 1988. 2 1 1 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Kusiak, A. "Group Technology," Computers in Industry, Vol. 9, pp. 83-91, 1987. Kusiak, A. "Intelligent Manufacturing Systems," Prentice Hall International Series in Industrial and Systems Engineering, 1990. Kusiak, A. "Concurrent Engineering," John Wiley and Sons, Inc., 1993. Lawler, E.L. "Pseudopolynomial Algorithm for Sequencing Jobs to Minimize Total Tardiness," Ann. Descrete Math. 1, 331-342, 1977. Lui, B. "Scheduling via Reinforcement," Artificial Intelligence in Engineering, Vol.3, No.2, pp. 76-85, 1988. Matsushima, K., N. Okada and T. Sada. "The Integration of CAD and CAM by Application of Artificial Intelligence Techniques," Annals of the CIRP, Vol. 31, No. 1, 1982. McHugh, James A. "Algorithmic Graph Theory," Prentice-Hall Inc., 1990. Micheal, J.P. and Andrew B. Winston. "Application of Artificial Intelligence to Planning and Scheduling in Flexible Manufacturing," Flexible Manufacturing Systems: Methods and Studies, pp. 223-242, North Holland, Elsevier Science Publishers B.V.,1986. Milacic, V. R. "Robotics and Computer-Integrated MFG," Vol. 11, No. 3, pp. 121- 136, 1994. Nau, D. and T. Chang. "Prospect for Process Selection Using Artificial Intelligence," Computers in Industry, Vol. 4, pp. 253-263, 1985. Patrizia, Cavalloro and Emanuela Cividati. "An Expert System for Process Planning in PCB Assembly Line," Froth Conference on A1 Application, pp. 170-174, 1988. Philips, R., X. Zhou and C. Mouleeswaran. "An Artificial Intelligence Approach to Integrating CAD and CAM through Generative Process Planning," Proceedings of ASME International Computers in Engineering Conference, Las Vegas, Nevada, 1984. Potts, C.N. and L.N. Van Wassenhove. "A Branch and Bound Algorithm for Total Weighted Tardiness Problem," Operation Research, Vol.33, pp. 363-377, 1980. 2 1 2 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Prasad, R.P. "Surface Mount Technology," Van Nostrand Reinhold, New York, 1989. Rudeanu, S. "Pseudo-Boolean Methods for Bivalent Programming," Berlin, New York, Springer-Verlag, 1966. Schaffer, G. "Gt via Automated Process Planning," American Machinist, pp. 119-122, May 1980. Schrage, L. and K.R. Baker. "Dynamic Programming Solution of Sequencing Problems with Precedence Constraints," Operations Research, Vol.26, pp. 444-449, 1987. Schild, A. and I. Fredman. "Scheduling Tasks with Associated Linear Loss Functions," Management Science, Vol. 7, pp. 280-285, 1961. Stillwell, Richard H. "Electronic Product Design for Automated Manufacturing," Marcel Dekker, Inc., 1989. Szu-Yung and David Wu. "Artificial Intelligence and Scheduling Applications," Artificial Intelligence, Manufacturing Theory and Practice, pp. 577-630, 1989. Tonshoff, H.K. et al. "Some Approaches to Present the Interdependence of Process Planning and Process Control," Proceedings of 19th CIRP International Seminar on Manufacturing Systems, pp. 257-271, 1987. Tempelhof, K.A. "System of Computer-Aided Process Planning for Machine Parts," Advanced Manufacturing Technology. Elsevier North-Holland, New York, 1980. Vere, S. "Relational Production System," Artificial Intelligence, Vol. 8, pp. 47-68, Amstersdam, North Holland, 1977. Watson, E.F. and P.J. Egbelu. "Scheduling and Machining of Jobs Through Parallel Nonidentical Machine Cells," Journal of Manufacturing Systems, Vol.8, No. 1, pp. 59- 68, 1989. Wilkerson, L.J. and J.K. Irwin. "An Improved Method for Scheduling Tasks," AIIE Transactions, Vol. 3, pp. 239-245, 1971. William, T. Park. "Process Planning + Activity Scheduling = Expert System for Factory Operation," Proceeding of Expert Systems for Advanced Manufacturing Technology, 1987. 213 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
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Azmandian, Alireza
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Integration of assembly planning and scheduling in electronics manufacturing operations
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Electrical Engineering
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