University of Southern California Dissertations and Theses

Development of front-end circuits for high frequency ultrasound system

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Development of front-end circuits for high frequency ultrasound system

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DEVELOPMENT OF FRONT-END CIRCUITS FOR HIGH FREQUENCY
ULTRASOUND SYSTEM

by

Hojong Choi

A Dissertation Presented to the
FACULTY OF THE USC GRADUATE SCHOOL
UNIVERSITY OF SOUTHERN CALIFORNIA
In Partial Fulfillment of the
Requirements for the Degree
DOCTOR OF PHILOSOPHY
(ELECTRICAL ENGINEERING)

May 2012

Copyright 2012 Hojong Choi

ii

DEDICATION

To my parents, Dong-Yeal Choi and Haeja Park; my younger brother, Hokyung Choi for
their endless love and support

iii

ACKNOWLEDGMENTS

The completion of this dissertation has been very long and painful journey. I would
like here to appreciate the help and advice from many professors, colleagues, friends and
my family.
First of all, I would like to express my sincere appreciation to my adviser, Dr. K. Kirk
Shung for his supervision and guidance. His deep knowledge about the high frequency
ultrasound system and transducer has been very helpful to guide me the research about
ultrasound integrated circuits. I wish to thank to Dr. John Choma for his first guidance
about the integrated circuit design and sincere advice for my Ph.D. life. I also wish to
thanks to Dr. Qifa Zhou and Dr. ChangHong Hu for their valuable advice, help and
recommendation for my project. I want to thank to Dr. Alice C. Parker for her advice and
suggestion during my Ph.D. program. My sincere appreciation from the bottom of my
heart is to my other committee members, Dr. P. Daniel Dapkus, Dr. Stanley M.
Yamashiro and Dr. Yong Chen.
I am very grateful to the professors and colleagues in the NIH Transducer Resource
Center for their help: Dr. Jonathan Matthew Cannata, Hao-Chung 'Harry' Yang, Lequan
'Roy' Zhang, Fan Zheng, Hamid R. Chabok, Xiang Li and Ruimin Chen. I also want to
thank to my friend, Dr. Ta Shun to answer the questions about the integrated circuit
design.

iv

Finally, I sincerely thank to my father, Dong-Yeal Choi for his unconditional
financial support, advice and encouragement during my M.S. and Ph.D. program at
University of Southern California and I also thank to my mother, Haeja Park for her
magnificent devotion to me during entire my life. I wish thanks to my younger brother,
Hokyung Choi for his sincere help and advice. I also express my thanks to my deceased
grandparents and maternal grandfather for their concerns and help during all of my life.
Without their help and concerns of all the people I mentioned here, I could not complete
my Ph.D. dissertation.

v

TABLE OF CONTENTS

DEDICATION .................................................................................................................... ii
ACKNOWLEDGMENTS .................................................................................................. iii
LIST OF TABLES ............................................................................................................. vii
LIST OF FIGURES ............................................................................................................ ix
ABBREVIATIONS ......................................................................................................... xvii
ABSTRACT ..................................................................................................................... xix
CHAPTER 1: INTRODUCTION ON TO ULTRASOUND SYSTEM AND
TRANSDUCERS ................................................................................................................ 1
1.1. Medical Ultrasound System and Transducers ..................................................... 3
1.2. Structure of Ultrasonic Transducers ................................................................... 7
1.3. Thesis Structure ................................................................................................ 10
CHAPTER 2: INTRODUCTION FOR FRONT-END PREAMPLIFIER ................ 11
2.1. Motivation of Integrated Preamplifier for High Frequency Ultrasound
Application ....................................................................................................... 11
2.2. Design consideration of Integrated Preamplifier and Fabrication Process ....... 15
2.3. Transistor Model Characterization for the Integrated Preamplifier .................. 17
2.4. ESD Device Modeling for High V oltage Protection ......................................... 19
2.5. Design and Simulation of Integrated Preamplifier ........................................... 21
2.5.1. Analysis of CMOS Integrated Preamplifier ........................................... 21
2.5.2. Analysis of BiCMOS Integrated Preamplifier ....................................... 32
2.6. Design of a Sallen-Key Butterworth Low Pass Filter ....................................... 37
2.7. Design of Non-Inverting Amplifier and Buffer Amplifier ................................ 40
2.8. Experimental Results for a 70MHz Lithium Niobate Transducer .................... 42
2.8.1. Introduction of Pulse-Echo Response .................................................... 42
2.8.2. Measurement Data for Integrated Preamplifier ..................................... 44
2.8.3. Pulse-Echo Responses for Integrated Preamplifier with a Lithium
Niobate Transducer ................................................................................ 48
2.8.4. Wire Phantom images for a 70MHz Lithium Niobate Transducer ........ 51

vi

CHAPTER 3: INTEGRATED PREAMPLIFIER DESIGN FOR LITHIUM
NIOBATE AND PZT THICK FILM TRANSDUCER ..................................................... 54
3.1. Active Sallen-Key Butterworth Filter Design .................................................. 54
3.2. Front-end Circuit Consisting of Active Filter and Integrated Preamplifier
for a Lithium Niobate Transducer ..................................................................... 58
3.3. Experimental Results for a Single Element Lithium Niobate Transducer ........ 63
3.3.1. Measurement Data of the Integrated Preamplifier ................................. 63
3.3.2. Pulse-Echo Responses for a Lithium Niobate Transducer ..................... 69
3.3.3. Wire Phantom Images for a Lithium Niobate Transducer ..................... 73
3.4. Pulse-Echo Responses for a Thick Film PZT Array Element Transducer ........ 79
3.5. Integrated Preamplifier Chip Layout ................................................................ 81
3.6. Summary of Preamplifier and Comparison with Other Preamplifiers
for Ultrasonic Transducer and Its Application ................................................. 84
CHAPTER 4: NOVEL BIPOLAR-TRANSISTOR-BASED LIMITERS FOR
HIGH FREQUENCY ULTRASOUND IMAGIGNG SYSTEM ...................................... 88
4.1. Introduction on to Protection Devices for Ultrasonic Transducer .................... 88
4.2. Description of Novel Bipolar-Transistor-Based Limiter Design ...................... 89
4.3. Circuit Analysis of Novel Bipolar-Transistors-Based Limiter ......................... 90
4.4. Experimental Results of the Limiters ............................................................... 98
4.4.1. Limiter Evaluation ................................................................................. 98
4.4.2. Pulse-Echo Responses of the High Frequency Transducers with
the Limiters .......................................................................................... 109
4.5. Conclusion of Novel Bipolar-Transistor-Based Limiters for High
Frequency Ultrasonic Transducers.................................................................. 112
CHAPTER 5: FUTURE WORK ............................................................................. 113
5.1. Integrated Circuit for Intravascular Ultrasound Radial Array ........................ 113
5.1.1. Introduction to Intravascular Ultrasound Radial Array........................ 113
5.1.2. Architecture of Custom Integrated Circuit .......................................... 114
5.2. Enhanced Linearity Power Amplifier with a Expander .................................. 117
Bibliography .................................................................................................................... 119

vii

LIST OF TABLES

Table 2.1: Comparison data between CMOS and BiCMOS process. .......................... 13
Table 2.2: The off-chip components values of a CMOS preamplifier. ......................... 23
Table 2.3: The off-chip components values of a BiCMOS preamplifier. ..................... 33
Table 2.4: Component values of the Sallen-Key Butterworth low pass filter. ............. 38
Table 2.5: The parameters of a 70MHz single element ultrasonic transducer. ............. 43
Table 2.6: Measurement setup for BiCMOS Preamplifier and PANAMETRICS
5900PR. (a) PANAMETRICS 5900PR setup to measure the ultrasonic
transducer only. (b) Measurement setup for the ultrasonic transducer
with PANAMETRICS 5900PR. (c) Measurement setup for the
ultrasonic transducer with front-end circuits. ............................................. 49
Table 2.7: Measurement setup for CMOS preamplifier and PANAMETRICS
5900PR. PANAMETRICS 5900PR setup to measure the ultrasonic
transducer only (a). Measurement setup with PANAMETRICS
5900PR (b). Measurement setup with a front-end circuit (c). ................... 50
Table 2.8: The equipment setup for wire phantom images........................................... 51
Table 3.1: The component values for Sallen-Key active Butterworth low pass
filter. ........................................................................................................... 55
Table 3.2: The off-chip component values for BiCMOS preamplifier. ........................ 60
Table 3.3: The off-chip component values for CMOS preamplifier. ............................ 61
Table 3.4: Comparison data of BiCMOS and CMOS preamplifier. ............................. 66
Table 3.5: The parameters of a single element lithium niobate ultrasonic transducer. . 69
Table 3.6: Equipment setup for a wire phantom image. ............................................... 73
Table 3.7: Comparison data of -6dB axial and lateral resolution. ................................ 78
Table 3.8: Comparison data with other preamplifiers for ultrasonic transducer. ......... 86

viii

Table 4.1: The modeled and measured data of all limiters at 100 MHz when the
50 mV test signals were applied. ............................................................... 109
Table 4.2: The modeled and measured data of all limiters at 100 MHz when the 1
V test signals were applied. ...................................................................... 109

ix

LIST OF FIGURES

Figure 1.1: Various imaging modalities.(Courtesy: Medical College of Georgia,
Island Rehabilitation, Providian Medical Equipment) ................................ 1
Figure 1.2: Pulse-echo of the ultrasound in a water tank. .............................................. 2
Figure 1.3: Tissue harmonic imaging showing A-mode and B-mode(Courtesy:
NDT resource center) ................................................................................... 3
Figure 1.4: Plot of resolution versus frequency for transducers with f-
numbers.(Courtesy: F.Stuart et al,. 1993) ..................................................... 4
Figure 1.5: Plot of maximum penetration versus frequency. (Courtesy: F.Stuart et
al 1993) ......................................................................................................... 5
Figure 1.6: Block diagram of a typical ultrasound system with ultrasonic transducer
array. ............................................................................................................. 6
Figure 1.7: Structure of a single element ultrasonic transducer. F1 and F2 denote
force; U1 and U2 denote speeds of the wave in the piezoelectric
material, V
3
and I
3
are the voltage and current. L is the thickness of the
piezoelectric material. .................................................................................. 7
Figure 1.8: KLM equivalent model for a single element ultrasonic transducer. ............ 8
Figure 1.9: Photos of transducers. (a) a 80MHz single element LiNbO
3
transducer,
(b) a 70MHz single element LiNbO
3
transducer and (c) a 80MHz thick
film PZT array element transducer. ............................................................ 10
Figure 2.1: V oltage gain graph of the operational amplifier. ........................................ 12
Figure 2.2: One example for operational preamplifier for ultrasound transducer.
(Courtesy: James Morizo, et al, “64-Channel ultrasound transducer
amplifier, “IEEE southwest symposium on mixed signal design, Feb,
2003) .......................................................................................................... 12
Figure 2.3: V oltage gain graph of the BiCMOS preamplifier....................................... 14
Figure 2.4: IBM 7WL characterization graph. (a) MOSFET transconductance
values with different sizes and (b) HBT transconductance values with
different sizes. ............................................................................................ 17
x

Figure 2.5: The transconductance values of MOSFET and HBT. (a) MOSFET
drain-to-source current vs. drain-to-source voltage for different gate-
source voltages for the IBM 7WL process and (b) HBT collector
current vs. collector-to-emitter voltage for different base-emitter
voltages for the IBM 7WL process. ........................................................... 18
Figure 2.6: Cadence high voltage simulation models for high voltage protections. .... 19
Figure 2.7: ESD simulation test. (a) high voltage input signal before and after ESD
devices and output signal and (b) emphasized output signal after ESD
device. ........................................................................................................ 20
Figure 2.8: Architecture of a CMOS preamplifier. ....................................................... 21
Figure 2.9: Load impedance of first-stage preamplifier. .............................................. 24
Figure 2.10: Series resistance-inductance transformed into parallel impedance. .......... 25
Figure 2.11: IIP3 graph describing the relationship between first order power and
third order modulated power. .................................................................... 28
Figure 2.12: The graph for OIP3 and IMD. .................................................................... 28
Figure 2.13: Simulation of 70 MHz CMOS preamplifier. (a) V oltage gain (13.5 dB
at 76 MHz) and -3dB bandwidth (68 %) for CMOS preamplifier. (b)
Reverse voltage gain (-98.2 dB at 70 MHz) of CMOS preamplifier. (c)
Input reflection coefficient (-18.45 dB at 70 MHz) of CMOS
preamplifier. (d) Output reflection coefficient (-26.6 dB at 70 MHz) of
CMOS preamplifier. (e) Third order intermodulation-intercept-point
(4.19 dBm) of CMOS preamplifier. (f) Noise figure (6.2 dB at 76
MHz) for CMOS preamplifier. .................................................................. 31
Figure 2.14: Architecture of a BiCMOS preamplifier. ................................................... 33
Figure 2.15: Simulation of 60 MHz BiCMOS preamplifier. (a) V oltage gain (12.7
dB at 58 MHz) and bandwidth (75 %) for BiCMOS preamplifier. (b)
Reverse voltage gain (-106.3 dB at 60 MHz) of BiCMOS preamplifier.
(c) Input reflection coefficient (-15.9 dB at 60 MHz) of BiCMOS
preamplifier. (d) Output reflection coefficient (-21.1 dB at 60 MHz) of
BiCMOS preamplifier. (e) IIP3 point (-3.68 dBm) of BiCMOS
preamplifier. (f) Noise figure (4.5 dB at 58 MHz) for BiCMOS
preamplifier. ............................................................................................... 36

xi

Figure 2.16: Architecture of second order Sallen-Key Butterworth low pass filter. ...... 38
Figure 2.17: Simulation of Sallen-Key Butterworth filter with equivalent circuit of
ultrasonic transducer and high voltage protection diodes. ........................ 40
Figure 2.18: Non-inverting amplifier configuration. ...................................................... 40
Figure 2.19: Buffer amplifier configuration. .................................................................. 41
Figure 2.20: Block diagram for the front-end circuits. ................................................... 42
Figure 2.21: Pulse-echo test setup block diagram for the front-end circuits with
ultrasonic transducer. ................................................................................. 44
Figure 2.22: Measured performances of 60 MHz BiCMOS and 70 MHz CMOS
preamplifier and its front-end circuit. (a) V oltage gain for BiCMOS
preamplifier was 10.23 dB at 60 MHz and its -6 dB bandwidth was
46.15 %. V oltage gain for CMOS preamplifier was 11.78 dB at 70
MHz and its -6 dB bandwidth was 21.19 %. (b) The voltage gain of
front-end circuits. For BiCMOS preamplifier, the voltage gain was
14.45 dB at 60 MHz and -6 dB bandwidth was 83.33 %. For CMOS
preamplifier, voltage gain was 13.09 dB and -6 dB bandwidth was
59.42 %. (c) Input reflection coefficient. -13.39 dB at 60 MHz for
BiCMOS preamplifier and -17.38 dB at 70 MHz for CMOS
preamplifier. (d) Reverse voltage gain. -29.9 dB at 60 MHz for
BiCMOS preamplifier and -11.31 dB at 70 MHz for CMOS
preamplifier. (e) Output reflection coefficient. -11.92 dB at 60 MHz
for BiCMOS preamplifier and -14.64 dB at 70 MHz for CMOS
preamplifier. (f) Noise Figure. 4.75 dB at 60 MHz of 60 MHz
BiCMOS preamplifier and 7.73 dB at 70 MHz for CMOS preamplifier.
(j) IIP3 was -5.5 dBm for BiCMOS one and -4 dBm for CMOS one.
(k) V oltage gain of Sallen-Key filter with non-inverting amplifier. .......... 47
Figure 2.23: Pulse-echo responses for BiCMOS Preamplifier and PANAMETRICS
5900PR. (a) The transducer‘s pulse-echo response without
amplification. Its center frequency was 67.62 MHz, its -6 dB
bandwidth is 61.9 % and received peak-to-peak voltage was 137.61
mV . (b) The transducer‘s pulse-echo response using 14.5 dB
PANAMETRICS 5900PR. Its center frequency was 67.61 MHz, its -6
dB bandwidth is 58.3 % and received peak-to-peak voltage was
766.08 mV . (c) The transducer‘s pulse-echo response using designed
front-ended circuits. Its center frequency of a transducer was 65.16
MHz and its -6 dB bandwidth is 60.1 % and received peak-to-peak
voltage was 761.33 mV . ............................................................................. 49
xii

Figure 2.24: Pulse-echo responses for CMOS Preamplifier and PANAMETRICS
5900PR. (a) The transducer‘s pulse-echo response. Its center
frequency of the transducer was 68.1 MHz and -6 dB bandwidth is
59.8 % and received peak-to-peak voltage was 162.2 mV . (b) The
transducer‘s pulse-echo response using PANAMETRICS 5900PR
with 14.5 dB. Its center frequency of the transducer was 68.5 MHz
and -6 dB bandwidth was 58.2 % and received peak-to-peak voltage
was 765.68 mV . (c) The transducer‘s pulse-echo response using
designed front-end circuits. Its center frequency of the transducer was
67.6 MHz and -6 dB bandwidth is 54.8 % and received peak-to-peak
voltage was 781.93 mV . ............................................................................ 50
Figure 2.25: Block diagram for a wire phantom image. This diagram describes how
to connect test equipment to measure a wire phantom image for a
single element transducer. ......................................................................... 52
Figure 2.26: Wire phantom images with PANAMETRICS 5900PR and front-end
circuits. (a) A wire phantom image with PANAMETRICS 5900PR
providing 14 dB gain. (b) A wire phantom image with designed 70
MHz CMOS preamplifier and a filter. (c) A wire phantom image with
PANAMETRICS 5900PR providing 14.5 dB gain. (d) A wire
phantom image with designed 60 MHz BiCMOS preamplifier and a
filter. .......................................................................................................... 53
Figure 3.1: Architecture of an active Sallen-Key Butterworth low pass filter. ............ 54
Figure 3.2: Simulation data of Sallen-Key active filter with equivalent circuit of a
high frequency ultrasonic transducer and high voltage protection
diodes. ........................................................................................................ 57
Figure 3.3: The architecture of a 100MHz preamplifier and active Sallen-Key filter. 58
Figure 3.4: Simulation of 100 MHz BiCMOS preamplifier. (a) V oltage gain (29.2
dB at 100 MHz) and -3 dB bandwidth (92 %). (b) Noise Figure (2.4
dB at 100 MHz). (c) Input reflection coefficient ( -18.87 dB at 100
MHz) . (d) Output reflection coefficient (-20.7 dB at 100 MHz ). (e)
Reverse voltage gain (-99.4 dB at 100 MHz) . (f) IIP3 for 10 MHz
two-tone spacing (-7.84 dBm at 100 MHz). .............................................. 59
Figure 3.5: Architecture of a BiCMOS preamplifier for 100MHz LiNbO
3
transducer. .................................................................................................. 60

xiii

Figure 3.6: Architecture of a 100 MHz CMOS preamplifier. ...................................... 61
Figure 3.7: Simulation of 100 MHz CMOS preamplifier. (a) V oltage gain (25.6 dB
at 100 MHz) and -3 dB bandwidth (41 %). (b) Noise Figure (6.5 dB at
100 MHz). (c) Input reflection coefficient ( -25.1 dB at 100 MHz). (d)
Output reflection coefficient (-27.5 dB at 100 MHz) . (e) Reverse
voltage gain (-90.5 dB at 100 MHz ). (f) IIP3 (+1.9 dBm) for 10 MHz
two-tone spacing. ....................................................................................... 62
Figure 3.8: Measured performances of 100 MHz BiCMOS preamplifier and its
front-end circuits. (a) Voltage gain of integrated preamplifier. For
BiCMOS preamplifier, voltage gain was 25.8 dB at 100 MHz, its -3
dB bandwidth was 82 % and -6 dB bandwidth was 130 %. For CMOS
one, 24.08 dB at 100 MHz, -3 dB bandwidth was 73 % and -6 dB
bandwidth was 180 %. (b) V oltage gain of front-end circuits. For
BiCMOS preamplifier, voltage gain was 41.28 dB at 100 MHz, its -3
dB bandwidth was 33 % and its -6 dB bandwidth was 91 %. For
CMOS one, gain was 39.52 dB at 100 MHz, its -3 dB bandwidth was
58 % and -6 dB bandwidth was 108 %. (c) Input reflection
coefficient. -16.67 dB at 100 MHz for BiCMOS preamplifier and -
23.31 dB at 100 MHz for CMOS one. (d) Output reflection coefficient.
-18.08 dB at 100 MHz for BiCMOS preamplifier and -19.96 dB at
100 MHz for CMOS one. (e) Reverse voltage gain. -48.42 dB at 100
MHz for BiCMOS preamplifier and -50.11 dB at 100 MHz for CMOS
one. (f) Noise figure.2.9 dB at 100 MHz for BiCMOS preamplifier
and 5.66 dB at 100 MHz for CMOS one. .................................................. 65
Figure 3.9: (a) V oltage gain graph of Sallen-key active Butterworth filter. (b) IIP3
of 100 MHz integrated preamplifier. IIP3 of BiCMOS preamplifier
was -12 dBm and IIP3 of CMOS one was -3.5 dBm. (c) Output power
at 1 dB compression point (OP
1dB
) vs. frequency. (d) Output third-
order intercept point (OIP3) vs. frequency. ............................................... 66
Figure 3.10: Photo of 80 MHz LiNbO
3
transducer and its impedance data. .................. 69
Figure 3.11: Pictures of the expander and the circuit diagram of the expander. ............ 70
Figure 3.12: Pictures of the limiter and the circuit diagram of the limiter. .................... 70
Figure 3.13: Pulse-echo test setup block diagram for the designed front-end circuits
and ultrasonic transducer using A VTECH monocycle generator. ............. 71

xiv

Figure 3.14: Pulse-echo responses for 80MHz LiNbO
3
focused transducer. (a) The
LiNbO
3
focused transducer’s pulse-echo response using 40dB
PANAMETRICS 5900PR. Its center frequency was 82.91 MHz, its -6
dB bandwidth was 51.58 % and received peak-peak voltage was 1769
mV . (b) The LiNbO
3
focused transducer’s pulse-echo responses using
100MHz BiCMOS preamplifier with Sallen-key filter. Its center
frequency was 78.23 MHz, its -6 dB bandwidth was 51.70 % and the
received peak-peak voltage was 1812mV . (c) The LiNbO
3
focused
transducer’s pulse-echo response using 38 dB PANAMETRICS
5900PR. Its center frequency was 82.76 MHz, its -6 dB bandwidth
was 53.73 % and the received peak-peak voltage was 1546 mV . (d)
The LiNbO
3
focused transducer’s pulse-echo response using 100 MHz
CMOS preamplifier with Sallen-key filter. Its center frequency was
83.54 MHz and its -6 dB bandwidth was 52.33 % and received peak-
peak voltage is 1468 mV . ........................................................................... 72
Figure 3.15: Block diagram for a wire phantom image for 100 MHz transducer. The
block diagram describes how to connect test equipments to measure a
wire phantom image for a lithium niobate single element 100 MHz
ultrasonic transducer. ................................................................................. 74
Figure 3.16: Wire phantom images for PANAMETRICS 5900PR and front-end
circuits. (a) A wire phantom image using PANAMETRICS (40 dB
gain). The -6 dB axial resolution was 13μm and the -6 dB lateral
resolution was 23 μm. (b) A wire phantom image using designed front-
end system based on 100 MHz BiCMOS preamplifier. The -6 dB axial
resolution was 14 μm and -6 dB lateral resolution was 30 μm. (c) A
enlarged wire phantom image using PANAMETRICS (40 dB gain) (d)
A wire phantom image based on 100 MHz BiCMOS preamplifier. .......... 75
Figure 3.17: (a) A wire phantom image using PANAMETRICS (38 dB gain). The -
6 dB axial resolution was 14 μm and -6 dB lateral resolution was 23
μm. (b) A wire phantom image using designed front-end system based
on 100 MHz CMOS preamplifier. The -6 dB axial resolution was 13
μm and -6 dB lateral resolution was 21 μm. (c) A enlarged wire
phantom images using PANAMETRICS (30 dB gain) (d) A wire
phantom image based on 100 MHz CMOS preamplifier. From (c) and
(d) of the Figure 3.16 and 3.17, the 6 μm wire phantoms are
positioned in the left side and one of three 20 μm wire phantoms are
in the right side of the images. ................................................................... 76

xv

Figure 3.18: The axial and lateral resolutions of PANAMETRICS 5900PR and
front-end circuits. (a) Axial resolution of PANAMETRIC 5900PR
with 40 dB gain. (b) Axial resolution of designed front-end system
based on 100MHz BiCMOS preamplifier. (c) Lateral resolution of
PANAMETRIC 5900PR with 40 dB gain. (d) Lateral resolution of
designed front-end system based on 100 MHz BiCMOS preamplifier.
(e) Axial resolution of PANAMETRIC 5900PR with 38 dB gain. (f)
Axial resolution of designed front-end system based on 100 MHz
CMOS preamplifier. (g) Lateral resolution of PANAMETRIC 5900PR
with 38 dB gain. (h) Lateral resolution of designed front-end system
based on 100 MHz CMOS preamplifier. ................................................... 77
Figure 3.19: Photo of thick film PZT array element transducer. .................................... 79
Figure 3.20: The pulse-echo responses of thick film transducer. (a) Its center
frequency of the transducer was 85.66 MHz, its -6dB bandwidth was
62.60% and the received peak-to-peak voltage was 75.35mV . (b) The
pulse-echo response of thick film transducer using designed front-end
circuits. Its center frequency of the transducer was 85.83 MHz and its
-6 dB bandwidth was 65.18% and the received peak-to-peak voltage
was 2307.1mV . (c) The pulse-echo response using matching network
with 300 Ω impedance of the transducer. Its center frequency of the
transducer was 87.62 MHz, its -6 dB bandwidth was 58.75% and the
received peak-to-peak voltage was 2304mV . ............................................ 80
Figure 3.21: (a) top-level layout connection for 8 numbers of preamplifier in DIP40
Package (left) and (b) microphotograph of the preamplifier chip by
optical microscope (right). ......................................................................... 83
Figure 3.22: Off-chip components with preamplifiers in a DIP40 package. .................. 83
Figure 4.1: Block diagram of the ultrasound protection circuit. .................................. 88
Figure 4.2: The schematic diagrams of the bipolar-transistor-based limiter circuits. .. 90
Figure 4.3: (a) the high frequency small signal model of the bipolar power
transistor (b) the high frequency limiter A small signal model, (c) the
high frequency limiter B small signal model............................................. 91
Figure 4.4: The high frequency small signal models of the limiter B. ......................... 92
Figure 4.5: The equivalent impedance models of NPN and PNP transistors of
limiter B. .................................................................................................... 93

xvi

Figure 4.6: (a) the large signal model of the bipolar transistor, (b) the large signal
limiter A model, (c) the large signal limiter B model. ............................... 96
Figure 4.7: (a) the magnitude vs. frequency responses of the limiters using 50 mV
sine wave input signals, (b) the magnitude vs. frequency responses of
the limiters using 1 V sine wave input signals. ....................................... 101
Figure 4.8: (a) the THD of the limiters using 50 mV test signals, (b) the THD of
the limiters using 1 V test signals, (c) the THD of the limiters vs. the
amplitude of the test signals. ................................................................... 103
Figure 4.9: (a) the total noise figures of limiters and a preamplifier using 50 mV
test signals, (b) the total noise figures of the limiters and a
preamplifier using 1 V test signals. ......................................................... 104
Figure 4.10: (a) a original 100 MHz and 50 V positive uni-polar pulse, (b) the
output suppressed signals of the limiters when one cycle 100 MHz
and 50V uni-polar positive pulses were applied, (c) a original 100
MHz and 50 V uni-polar negative pulse, (d) the output suppressed
signals of the limiters when 100 MHz and 50 V negative uni-polar
pulses were applied. ................................................................................ 106
Figure 4.11: (a) the magnitudes of the impedances of all limiters, (b) the phase
angles of the impedances of all limiters. ................................................. 107
Figure 4.12: Pulse-echo responses with commercial diode and limiter B for
100MHz single element ultrasonic transducer. ....................................... 111
Figure 5.1: Architecture of the radial array transducer and custom IC chip. .......... 114
Figure 5.2: Transmit and receive scheme for operation mechanism. ...................... 116
Figure 5.3: Integrated preamplifier with pre-distortion linearizer. .......................... 118
Figure 5.4: Integrated preamplifier with post-distortion linearizer. ........................ 118

xvii

ABBREVIATIONS

MRI Magnetic Resonance Imaging
CT Computed Tomography
PET Positron Emission Tomography
Tx Transmitter
Rx Receiver
BJT Bipolar Junction Transistor
CMOS Complementary Metal Oxide Semiconductor
BiCMOS Bipolar Complementary Metal Oxide Semiconductor
HBT Heterojunction Bipolar Transistor
GaAs Gallium Arsenide
MOSFET Metal Oxide Semiconductor Field Effect Transistor
LNA Low Noise Amplifier
TGC Time Gain Compensation
PA Power Amplifier
PZT Piezoelectric Transducer
PRF Pulse Repetition Frequency
LiNbO
3
Lithium Niobate
DSP Digital Signal Processor
Kt Coupling Coefficient
SMD Surfaces Mount Devices
PSSR Power Supply Rejection Ratio
UBM Ultrasound Biomicroscope
xviii

IIP3 Third Order Intermondulation Intercept Point
DUT Device Under Test
SNR Signal-To-Noise Ratio
NF Noise Figure
OIP3 Output Third-Order Intercept Point
OP
1dB
Output 1dB Compression Point

xix

ABSTRACT

This dissertation describes the development of a novel integrated preamplifier with a
Sallen-Key Butterworth filter and novel bipolar transistor-based limiter for a high
frequency ultrasonic transducer. First, the motivation for the integrated preamplifier
results from the fact that the integrated preamplifier may reduce cable loss because the
impedance matching with the high frequency transducer can affect the performance of the
transducer due to cable loading effect. The design of an integrated circuit consisting of a
preamplifier with the Sallen-Key Butterworth filter for a high frequency ultrasonic
transducer will be presented. The front-end circuits consisting of integrated preamplifier
with Sallen-Key Butterworth filter is usually interfacing with transducer and power
amplifier such that the simulations and experiments with transducer and power amplifier
is required to consider their effect to obtain proper performances. The simulation and
experimental results of the integrated preamplifier and filter chain demonstrate the
improved performances of pulse-echo response and wire-phantom imaging with a high
frequency thick film (LiNbO
3
) transducer and thick film (PZT) array element transducer.
The integrated preamplifier which had high frequency silicon germanium (SiGe) hetero-
junction bipolar transistors (HBT’s) was fabricated in an IBM 0.18 μm bipolar
complementary metal oxide semiconductor (BiCMOS) process. This implementation
represents the first step in the eventual realization of a complete integrated high
frequency receiving system.
xx

Second, high-frequency ultrasound imaging systems are not only dramatically affected
by the electrical impedance mismatch between the transducer and the electronics but the
attenuation caused by passive components of the protection devices and the system. These
protection devices are used to protect the front-end circuits from the unexpected voltage
signals induced by a transmitter. Therefore, to optimize the performances of the imaging
system, there is a need to improve the design of these limiter circuits. These novel limiter
circuits were analyzed with the small signal and large signal models of bipolar transistors.
And, the improved performances of these limiters such as magnitude frequency responses,
total harmonic distortions and total noise figures including preamplifiers were measured
and compared with a commercial diode limiter. The capability of the novel limiters was
also demonstrated through pulse-echo responses with a high frequency ultrasonic
transducer. These new bipolar-transistor-based limiters may have applications for the
high-frequency ultrasound imaging where both the bandwidth and signal to noise ratio are
crucial.

1

CHAPTER 1: INTRODUCTION ON TO ULTRASOUND SYSTEM
AND TRANSDUCERS

Ultrasound is one of imaging modality widely used for diagnosis and therapy. It is
more cost-effective than magnetic resonance imaging (MRI) or computed tomography
(CT). Comparing with CT or X-ray, ultrasound utilizing acoustic pulse-echo is non-
ionizing and non-invasive such that it is safer to human. With Doppler signal processing,
it can handle real-time imaging of blood flow. Ultrasound machine can be portable
because the development of integrated circuit has brought out more compact and less
expensive hardware. The figure below shows the various types of the clinical and
diagnostic imaging modalities.

Figure 1.1: Various imaging modalities.(Courtesy: Medical College of Georgia, Island
Rehabilitation, Providian Medical Equipment)

2

The ultrasonic transducer is one of most important parts of the ultrasound machines
and it is the device that electrical energy is converted into the mechanical (acoustic)
energy or vice versa. A pulser provides the high voltage signal into the transducer. A
pulse is transmitted from the transducer to target and then, reflected or scattered echoes
due to inhomogeneous medium are detected with the transducer and these weak echoes
are amplified through the receiving electronics. This is the basic principle of pulse-echo
ultrasound imaging. This phenomenon is shown from Figure 1.2

Figure 1.2: Pulse-echo of the ultrasound in a water tank.

A variety of imaging modes have been developed and used for clinical purpose.
Figure 1.3 shows typical imaging mode such as A (Amplitude)-mode and B (Brightness)-
mode images together. A-mode is earliest imaging method. In an A-mode, detected echo
is amplified and is displayed in the screen (blue one). In a B-mode, amplified echo is
represented by gray scale in the screen and it is shown in the level of brightness (black
and white one).
3

In this dissertation, A-mode and B-mode images will be shown to demonstrate the
performances of the integrated preamplifier with single element and array type ultrasonic
transducers.

Figure 1.3: Tissue harmonic imaging showing A-mode and B-mode. (Courtesy: NDT
resource center)

1.1. Medical Ultrasound System and Transducers
Recently, high frequency ultrasonic imaging systems (>20MHz) have been
extensively studied because of the better lateral and axial resolution while scarifying the
penetration depth for intravascular, eye, skin and small animal imaging (Xu et al. 2007;
Hu et al. 2006; Shung 2005). The axial resolution and lateral resolution of an ultrasonic
imaging system are defined, respectively, as the resolutions along the direction of, and
perpendicular to, the ultrasound beam. The axial resolution is determined by the center
frequency and pulse width of the signal from the transducer.
Axial ResolutionR

c/2τ

(1.1)
where τ
-6dB
is the -6dB emitted pulse duration and c is the sound speed of the medium.
4

Lateral resolution is affected by the f-number (f
#
) and center frequency (Shung 2005;
Cheng 1989; Hecht 2001). The f-number is given by the ratio of the focal distance to the
aperture size. Depending on the application, the aperture size is limited so that lateral
resolution is also affected.
Lateral Resolution (R
L
) = f
#
λ= (Z
f
/2a)λ (1.2)
where Z
f
is the focal distance and a is the aperture radius of a circular transducer.

Figure 1.4: Plot of resolution versus frequency for transducers with f-numbers. (Courtesy:
F.Stuart et al,. 1993)

The pressure of an ultrasound signal propagating in the axial direction decreases
exponentially as a function of the propagation distance as shown (Cheng 1989; Balanis
1989):
P (z)=P (z=0) exp (-αz) (1.3)
where p (z=0) is the pressure at the surface of the material, α is the attenuation coefficient.
5

Figure 1.5: Plot of maximum penetration versus frequency. (Courtesy: F.Stuart et al 1993)

Ultrasound pressure attenuation is affected by absorption and scattering of the
ultrasound energy. The attenuation coefficient of the biological tissues is proportional to
the frequency of the incident wave (Balanis 1989). This means higher frequency causes
more attenuation, thus decreasing the pressure, in accordance with Eq. (1.3.). Therefore,
high frequency ultrasound is limited in its depth of penetration.
Conventional ultrasound machines currently in use typically cover frequencies from
2.5MHz to 15MHz and have a resolution in the mm range. A block diagram of the
medical ultrasound system is shown in Figure 1.6. Its main components are transducer
(single element or array), power amplifier, low noise amplifier and transmitting &
receiving beamformer.
6

Figure 1.6: Block diagram of a typical ultrasound system with ultrasonic transducer array.

The most critical components of the system are the piezoelectric ultrasonic
transducer and preamplifier. The high voltage signal controlled by the transmitting
beamformer excites the transducer, causing it to send out an acoustic wave to the target
through a medium such as air or water. An echo is then reflected back to the transducer
due to acoustic impedance mismatch between the propagating medium and the target.
The transducer receives the reflected signal and converts the acoustic waves to electric
signals. These weak signals are then amplified by a preamplifier and time gain
compensation (TGC) amplifier. These analog signals are digitized by an analog-digital
converter (A/D converter) in the receiving array beamformer and are processed by a
digital signal processor (DSP) unit and sent to a personal computer. The preamplifier is a
key component to affect the performance of the receiving electronics. For higher
operating frequency, more DC power consumption is required to achieve the desired
same performance. It is one of important issue for hand-handled receiving electronics.

7

1.2. Structure of Ultrasonic Transducers
There are several well-known equivalent circuit models of a transducer such as the
Mason model, the Redwood model and the KLM model. These models have been used to
analyze and describe the performance of an ultrasonic transducer. The KLM model is
used here because widely used commercial software programs like PiezoCAD for one-
dimensional modeling are based on the KLM model (Oakley 1997). The transducer can
be modeled as a three-port system as shown below.

Figure 1.7: Structure of a single element ultrasonic transducer. F1 and F2 denote force;
U1 and U2 denote speeds of the wave in the piezoelectric material, V
3
and I
3
are the
voltage and current. L is the thickness of the piezoelectric material.

This structure can explain the piezoelectric effect as an inter-conversion between the
electrical energy and acoustic energy. If an electrical potential difference is applied across
the slab of a piezoelectric material, a pressure is generated, and vice versa. A system level
analysis of a single element transducer is frequently performed using the KLM model
(Foster et al 1991; IEEE Standard on Piezoelectricity 1987) shown below. The
transmission line in the acoustic port is connected to an ideal transformer through ideal
electrical connections as shown below.
8

Figure 1.8: KLM equivalent model for a single element ultrasonic transducer.

Z
0
is the acoustic impedance of the piezoelectric material and C
p
is the acoustic wave
velocity in the piezoelectric material. C
0
=ε
s
(A/L) is the clamped capacitance obtained
from Figure 1.8. ε
s
is the effective clamped dielectric constant, A is the area of the
piezoelectric material and L is the thickness of the piezoelectric material. ϕ is the ideal
mechanical-electrical transformer ratio which is described by:

1
2
0
0 0 0
0
w
sin
2w π
φ k
w
w C z
2w
 
=
 
 

(1.4)
Here, k

is the electromechanical coupling coefficient that describes the critical factor
between the conversion of the electrical energy and mechanical energy, and can be
determined from the series and parallel resonance frequencies (Nondestructive Testing
Resource Center 2001). X
1
is the electrical impedance due to the acoustic transmission
line, given by:
Back
acoustic
port
Front
acoustic
port
C
p
,L/2, Z
0
C
p
,L/2, Z
0
Transmission line
Ideal electrical
interconnections
Ideal transformer
1 : ϕ
C
0
X
1
Z
B
Z
F
I
3
V
3
+
_
) (α
a
Z
9

1
0
1 2
t 0
C w
X sin
k w
−
  −
=
 
 

(1.5)
where w
0
=anti-resonant frequency and w is the desired frequency.
Therefore, the input impedance (Z
in
) looking into the electrical port is given by
Z
in
= 1/jwC
0
+ jX
1
+ϕ
2
Z
a
(α) (1.6)
where Z
a
is the radiation impedance caused by acoustic load is given by (Foster et al
1991; IEEE Standard on Piezoelectricity 1987).
( )
p
0
p
1 exp( αL jβ )
Z
Za α
2 1 exp( αL jβ )
− − −
=
+ − −
n
L
L

(1.7)
where β
p
is the wave number of the piezoelectric material and α is the attenuation
coefficient of the piezoelectric material and Z
0
is the characteristic acoustic impedance of
the material.
Therefore, the electrical impedance of a piezoelectric transducer in an ideal case is a
capacitance so we may be able to tune it out with inductive components to maximize
energy transfer and bandwidth. Figure 1.9 shows the transducers were used to test the
performances of the designed front-end circuits. It includes a single element high
frequency ultrasonic transducer and an array type high frequency ultrasonic transducer.

(a)
Figure 1.9: Photos of transducer
(b) a 70MHz single element LiNbO
array element transducer
This thesis is organized as follows
system and transducers. Chapter 2 gives
end preamplifiers. The design
the Sallen-Key Butterworth filter
transducer with the integrated preamplifier and filter
design and experiment of
Butterworth filter for a 8
element transducer are discussed.
preamplifier is described. The integrated preamplifier design will be summarized
chapter 4, the design, simulation and measurement
limiter for high frequency ultrasonic applications
future work is described.

(b)
Photos of transducers. (a) a 80MHz single element LiNbO
70MHz single element LiNbO
3
transducer and (c) a 80MHz thick film PZT
array element transducer.

1.3. Thesis Structure
is organized as follows: Chapter 1 introduces the medical ultrasound
Chapter 2 gives the theoretical background for
he design, analysis and simulation of the integrated preamplifier and
Butterworth filter are shown. The experiment for a 70MHz LiNbO3
with the integrated preamplifier and filter are also presented.
design and experiment of the 100MHz integrated preamplifier and the Sallen
80MHz LiNbO3 transducer and an 80MHz thick film PZT array
are discussed. The layout and implementation of the
is described. The integrated preamplifier design will be summarized
design, simulation and measurement of novel bipolar
for high frequency ultrasonic applications are described. Finally, in chapter
.

10

(c)
80MHz single element LiNbO
3
transducer,
80MHz thick film PZT
Chapter 1 introduces the medical ultrasound
theoretical background for integrated front-
integrated preamplifier and
for a 70MHz LiNbO3
In chapter 3, the
Sallen-Key active
80MHz thick film PZT array
he layout and implementation of the integrated
is described. The integrated preamplifier design will be summarized. In
of novel bipolar-transistor-based
. Finally, in chapter 5,
11

CHAPTER 2: INTRODUCTION FOR FRONT-END PREAMPLIFIER

2.1. Motivation of Integrated Preamplifier for High Frequency Ultrasound
Application
Integrated preamplifier can overcome many challenges. First of all, electrical
impedance matching is one of important issues. Electrical impedance matching is more
important for high frequency ultrasound preamplifier because the limitation of the
electrical parts is more severe as the frequency is increased (Nondestructive Testing
Resource Center 2001). Second, cable loss is another issue of concern for integrated
preamplifier design. Cable loss may be reduced by connecting the integrated
preamplifiers as closely to the transducer as possible. Third, integrated preamplifiers need
to be implemented in the multi-channel format to reduce the footprint size of the layout.
For ultrasound receiver, the operational amplifiers have been widely used for front-
end preamplifier design. However, the gain for these devices is undesirably high in the
low frequency region and the bandwidth is limited as shown in Figure 2.1. To extend the
bandwidth in the frequency domain, the feedback loop consisting of resistors and
capacitors may be used. However, this may lead to oscillation of the preamplifier and
generate higher thermal noise (Lee 2004). Matching or optimization of the performances
with additional components could be difficult because of the high input impedance of an
operational amplifier.
12

Figure 2.1: V oltage gain graph of the operational amplifier.

Figure 2.2: One example for operational preamplifier for ultrasound transducer. (Courtesy:
James Morizo, et al, “64-Channel ultrasound transducer amplifier, “IEEE southwest
symposium on mixed signal design, Feb, 2003)

In order to overcome these problems of the operational preamplifier, BiCMOS (HBT-
CMOS) integrated preamplifier will be introduced. By comparing CMOS and BiCMOS
process, we can provide the guideline of the process to design the optimal performances
of the integrated preamplifier for high frequency ultrasonic transducers. First of all,
voltage gain of HBT is more accurate than that of MOSFET. V oltage gain of HBT is
higher than that of MOSFET because of the higher transconductances. Noise
performance for BiCMOS process is theoretically better than CMOS process due to
13

substrate structure. Speed and delay for high voltage of BiCMOS process is also better
than CMOS process due to lower parasitic capacitances of HBT devices. However,
integration of BiCMOS process is more difficult than CMOS process because of two
different devices fabrication in one wafer such that process cost of BiCMOS devices is
higher than that of CMOS. DC power consumption of HBT is higher than CMOS
because the performance of HBT mainly depends on the collector current of the devices.
The CMOS and BiCMOS devices characteristics are summarized in Table 2.1. This data
comparison is collected from literature and IBM technology document (Brian et al 2004;
IBM Microelectronics Division 2001; Pawlikiewicz et al 2006).
Table 2.1: Comparison data between CMOS and BiCMOS process.
Properties CMOS BiCMOS (HBT+CMOS)
V oltage control Accurate Most accurate
V oltage gain Medium High
Noise performances Moderate Excellent
Speed Moderate Fast
Delay for high voltage Moderate Small
Integration Easy Difficult
Process cost Low Expensive
DC power consumption Low High

This design has been shown to have wider bandwidth and higher gain even for high
frequency operations because its performances can be controlled by off-chip resonant
tank circuits as shown in Figure 2.3 which are a more stable architecture without a
feedback loop. Impedance matching is achievable with off-chip inductors and capacitors,
equivalent capacitances of the electrostatic discharge devices and capacitance of the
transistor. With this topology, the input impedance, frequency and bandwidth can be
tuned and optimized for the best performance.
14

Figure 2.3: V oltage gain graph of the BiCMOS preamplifier.

Another important issue of the multi-channel integrated preamplifier is DC power
consumption. The high frequency ultrasound receiver does not concern about the power
consumption from the design level even though they used array type transducer and its
system because the system has been used with DC power cable in the lab or hospital.
However, the power consumption of the hand handled ultrasound machine need to be
considered in the design level because the battery life can limit the operation. Higher
operating frequency consumes more power to desire the performances because the
preamplifier working for higher center frequency occupies wider bandwidth than the
preamplifier working for lower center frequency. Therefore, the receiver which is target
to the mobile ultrasound application for array type high frequency ultrasonic transducer
requires much less DC power consumption. Here, the topology of the integrated
preamplifier and fabrication process characterization will be introduced in order to
choose the architecture of the preamplifier in the next chapter.

15

2.2. Design consideration of Integrated Preamplifier and Fabrication Process
There are several types of preamplifier, all of which have different
advantages/disadvantages. First, a shunt-series preamplifier using operational amplifier
generates higher thermal noise due to the shunt resistor, and it also does not allow
impedance matching with the ultrasonic transducer, whose input impedance is capacitive
in nature. For a common-gate preamplifier, the input impedance looking into the source
resistance is the inverse transconductance (1/g
m
) such that it advantageously lowers the
input impedance and increases transductance together. This is a desirable phenomenon,
but it has limitations, such as high noise figure. The noise performance could be worse in
high frequency operations (Lee 2004). However, the inductively degenerated preamplifier
has lower noise figure than a common gate preamplifier or shunt-series type preamplifier,
and the inductive peaking method of the load can give the designer more freedom to
achieve broader bandwidth and higher gain. Due to these reasons, the inductively source
degenerated type preamplifier is preferable for integrated preamplifiers, which need
broader bandwidth and smaller noise performance.
The characteristics of the heterojunction bipolar transistor (HBT) can be compared to
the complementary metal-oxide-semiconductor (CMOS) in order to select the proper
fabrication process. The transconductance (g
m,HBT
) of hetero-junction bipolar transistors
(HBT) is proportional to the collector current, which is

c
m,HBT
I
g q
kT
= ⋅
(2.1)
where q is the total amount of charge (=1.6 x 10-
19
C), I
c
is the collector bias current, k is
the Boltzmann constant, and T is the temperature.
16

The transconductance of MOSFET is proportional to the square root of drain current.

m ox D
W
g 2μC I
L
= (2.2)
where μ is the charge-carrier effective mobility, C
ox
is the gate oxide capacitance per unit
area, W is the gate width of the MOSFET and L is the gate length of the MOSFET and I
D

is the drain current.
At peak current, the transconductance of BJT is higher than that of MOSFET (Floyd
2004) since q/kT is higher than 2µC

for the same load current. The noise
performance of the integrated preamplifier is essential to determine the signal-to-noise
ratio of the whole system, and it also possibly affects the interaction with adjacent
channels in the receiving beamformer system.
The 1/f noise (flick noise) is a dominant factor in the design of the preamplifier in a
low frequency operation, and the flicker noise factor of HBT is much less than that of
MOSFET due to substrate structure (Floyd 2004). The flicker noise of HBT devices
comes from the base-collector interconnection (Floyd 2004). The substrate properties of
CMOS depend on the current to the substrate. Therefore, SiGe HBT is a better choice for
low noise performance and higher transconductance compared to the CMOS-only process.
SiGe HBT of the IBM 7WL process has lower base-collector parasitic capacitances due
to deep trench isolation (IBM Microelectronic Division 2007; IBM Microelectronic
Division 2001).

17

2.3. Transistor Model Characterization for the Integrated Preamplifier
The first design step for the integrated preamplifier is to characterize the transistor
parameters with DC analysis using Cadence Spectre simulator. The transistor can operate
in cut-off, linear, and saturation regions depending on the width/length ratio of the
transistors. The transconductance values are one of the most important parameters in
determining the limitations of the performance of the preamplifier such as voltage gain
and bandwidth. For the standard performance type of HBT using IBM 7WL process, the
emitter width could be only selected as 0.24, 0.48, and 0.80μm (IBM Microelectronic
Division 2007). Therefore, we cannot directly compare the HBT transconductance values
with those of MOSFET but from the graph in Figure 2.4, the simulated transconductance
values are apparently much higher. The transconductance (g
m
) values of MOSFET and
HBT devices with different width/length ratios were plotted in Figure 2.4.

(a)

(b)
Figure 2.4: IBM 7WL characterization graph. (a) MOSFET transconductance values with
different sizes and (b) HBT transconductance values with different sizes.

0
5
10
15
20
25
30
35
40
45
25/1.4 50/1.4 100/1.4 200/1.4 400/1.4
Transconductance values(MOSFET)
g
m
(mA/V)
Emitter Width/Length ratio
0
500
1000
1500
2000
2500
0.24/1.5 0.24/3 0.24/6 0.24/12 0.24/24
Transconductance values (HBT)
Emitter Width/Length ratio
g
m
(mA/V)
18

The MOSFET device has better linearly characterized performance than HBT (Lee
2004; Pawlikiewicz 2006) according to the DC simulation in Figure 2.4. Therefore, the
BiCMOS process is preferable because this process contains the capabilities of MOSFET
and HBT devices. To compare the linearity issue, the transconductance (g
m
) values of
MOSFET and HBT devices are plotted in Figure 2.5.

(a) (b)
Figure 2.5: The transconductance values of MOSFET and HBT. (a) MOSFET drain-to-
source current vs. drain-to-source voltage for different gate-source voltages for the IBM
7WL process and (b) HBT collector current vs. collector-to-emitter voltage for different
base-emitter voltages for the IBM 7WL process.

19

2.4. ESD Device Modeling for High Voltage Protection
A high voltage pulser is required for the ultrasonic transducer to generate the pulse
and this high voltage pulse signal can be passed through the switch and it can break front-
end chips. Therefore, high voltage protection circuits for integrated preamplifiers are
needed. The ESD protection devices such as Hyperabrupt varactors or diodes can protect
the preamplifier core connected to die at the chip PADS from abrupt short pulses within a
few nanoseconds. The Hyperabrupt varactors are used for ESD protection devices
because it can tolerate large voltage discharges of 2200 V , and it has low capacitance
values in high voltage (IBM Microelectronics Division 2001; IBM Microelectronics
Division 2002).The test circuit for the high voltage signal will be shown to verify the
high voltage protection devices from Figure 2.6.

Figure 2.6: Cadence high voltage simulation models for high voltage protections.

20

The width/length and multiplication of the hyperabrupt varactors should be properly
selected depending on the system requirement. The ultrasound system usually used short
pulse or continuous train pulses for Doppler ultrasound such that the simulation data need
to be proven that the varactors should protect unwanted short and continuous high
voltage train pulses. In the simulation, the high voltage input train-signals, which have
400Vp-p with 25 ps, were applied before the PADs of chip and then, the output signal
were completely attenuated compared with high voltage input signals. The maximum
voltage swing for input signal for the transistors should be less than 3.3V for IBM 7WL
process such that the simulation results (Figure 2.7) showed high voltage protection
diodes worked properly under the unwanted high voltage continuous pulse signals.

(a) (b)
Figure 2.7: ESD simulation test. (a) high voltage input signal before and after ESD
devices and output signal and (b) emphasized output signal after ESD device.

21

2.5. Design and Simulation of Integrated Preamplifier
The following paragraph shows the schematic of the BiCMOS and CMOS integrated
preamplifiers and the derivation for input/output impedances, voltage gain, reverse
voltage gain, -3 dB bandwidth, noise figure, input/output third-order-intermodulation
intercept point (IIP3 and OIP3) analysis and their simulations. For 70MHz operation, the
same values of off-chip load impedances used to compare the different performances
between BiCMOS and CMOS preamplifier.

2.5.1. Analysis of CMOS Integrated Preamplifier

Figure 2.8: Architecture of a CMOS preamplifier.

Gnd
R
bias
R
b
Ccap
Lg
M
2
M
1
M
3
C
out Output
M
20
L
d1
L
d2
Input
R
d2
+
R
d1
C
d1
Vdd
22

Input impedance of the source-degenerated integrated preamplifier is defined as

m1
tr g s1 s1
cap ESD gs1 gs1
g 1 1 1
Z jwL [( ) / /( jwL L )]
jwC jwC jwC C
= + + + +
(2.1)
where Z
tr
is the input impedance of the preamplifier, L
g
is the gate inductance of the
transistor (M1), C
ESD
is the total capacitance of hyperabrupt varactors,

L
s1
is the source
inductance of M
1
, g
m1
is the small signal transconductance of the transistor (M
1
), and C
gs1

is the parasitic gate-source capacitance of the transistor (M
1
).
The source inductance has a much smaller value compared with the gate inductance
for a few hundred MHz applications, thus eliminating the source inductor. If there is no
source inductor, the input impedance equation can be simplified as
tr g
cap EDS gs1
1 1
Z jwL
jwC jw(C C )
= + +
+

(2.2)
The equation (2.2) shows that the input impedance of the preamplifier and input
inductor (L
g
) can be large inductance for low frequency operation, thus compromising the
input signal for low frequency operation. This can be needed for operational amplifier
that has high input impedance for impedance matching if the center frequency of the
transducer is lower. The coupling capacitance (C
cap
) can be ignored if the operating
frequency is not that high. Therefore, the impedance matching with the transducer can be
used with the inductance and capacitance equivalent components of input impedances
with the coupling capacitances. There are two ESD diodes connected to power and
ground.

23

The simplified model of ESD devices can be represented with parallel capacitance.

ESD ESD1 ESD 2
C C / /C = (2.3)
where C
ESD1
and C
ESD2
are the hyperabrupt varactors which are the equivalent
capacitances of the ESD protection circuit.
The large signal transductance of first stage preamplifier would be replaced by

m1MOS cap
out1
m1MOS
in1 ESD gs1
g C
i
G
V C C
= ≈
+

(2.4)
where G
m1MOS
is the large signal transconductance of M
1
, i
out1
is the drain current of the
transistor M
1
and V
in1
is the gate voltage of the transistor M
1
.
Therefore, the voltage gain of the first-stage preamplifier can be represented as

v1 m1MOS m2MOS d1 m1MOS m2MOS d1 d1
d1
1
A G g Z G g ((R jwL ) / / )
jwC
= = +
(2.5)
where g
m2MOS
is the small signal transconductance of M
2
,

R
d1
is the load resistance and
inner resistance of the transistor M
2
, L
d1
is the load inductance, C
d1
is the load capacitance
and inner capacitance of the transistor M
2
,and Z
d1
is the load impedance of the first-stage
preamplifier.
Table 2.2: The off-chip components values of a CMOS preamplifier.
Components Category Values
C
cap
DC coupling capacitor 30pF
L
g
Gate inductor 150nH
C
d1
Load capacitor 12pF
L
d1
Load inductor 150nH
R
L1
Load resistor 90Ω
L
d2
Load inductor 150nH
R
L2
Load resistor 90Ω
C
out
DC coupling capacitor 30pF
C
1
,C
2
Bypass capacitor 0.1pF
C
3
Electrolytic capacitor 10pF

24

The load impedance is derived to analyze the voltage gain and -3 dB bandwidth of the
preamplifier.

Figure 2.9: Load impedance of first-stage preamplifier.

In order to calculate the load impedance, the series impedance of L
d1
and R
L1
is combined
as Z
d1
.

d1 cd1 L1
1 1 1
Z Z Z
= +
(2.6)
The load impedance is defined as

2 2 2
d1 d1
cd1 L1 d1
d1
2 2 2
cd1 L1
d1 d1 d1
2 2 2
d1
d1 d1
R w L
Z Z wC 1
Z
1 1
Z Z
R w L wC
wC
R w L
+
= = =
+
+ + +
+

(2.7)
Therefore, the voltage gain of the first-stage preamplifier can be obtained.

m1MOS cap
v1 m2MOS
ESD gs1
d1
2 2 2
d1 d1
g C
1
A g
1
C C
wC
R w L
=
+
+
+

(2.8)

C
d1
L
d1
R
d1
Z
L1
25

The voltage gain of the second-stage preamplifier is defined as

2 2
v2 m3MOS d2 d2
A g R (wL ) =− +
(2.9)
where R
d2
is the load resistance with inner resistance of the first and second stage
preamplifier, and L
d2
is load inductance of the first and second stage preamplifier.
The voltage gain of the preamplifier can be represented.

2 2
m1MOS m2MOS m3MOS cap d2 d2
v v1 v2
ESD gs1
d1
2 2 2
d1 d1
g g g C R (wL )
A A A
1
C C
wC
R w L
+
= ⋅ =
+
+
+

(2.10)
where A
v1
and A
v2
are the voltage gain of the first and second stage preamplifier and A
v
is
the overall gain of the integrated preamplifier.
Therefore, the voltage gain can be improved by higher values of load inductance and
transconductance and lower values of the load capacitances, and the gate-source
capacitances of the transistor M1 and ESD protection diodes.
The resonant center frequency of the series resistance-inductance section with a
parallel capacitance is derived.

Figure 2.10: Series resistance-inductance transformed into parallel impedance.

In order to show this transformation, we first need to calculate the load admittance.

d1 d1
d1 2 2 2 2
d1 d1 d1 d1 d1 d1 d1
R X 1 1
Y j
Z R jX R X R X
= = = −
+ + +

(2.11)
X
C1
X
d1
R
d1
X
C1
R
P1
X
LP1
26

The admittance of parallel R
P1
and X
L1
(Y
Rp1
-X
Lp1
) is re-written as

P1 Lp1
R X
p1 LP1
1 1
Y
R jX
−
= +
(2.12)
where R
p1
is the parallel transformed resistance and X
LP1
is the parallel transformed
inductance.
Comparing the equation (2.12) with the equation (2.11), we obtain

2 2 2 2
d1 d1 d1 d1
P1 LP1
d1 d1
R X R X
R X
R X
+ +
= =
(2.13)
The resonant frequency is obtained by equating the impedance X
C1
with X
LP1
.

2 2 2 2
d1 d1 d1 P d1
C1
d1 p d1 p d1
R X R W L 1
X
X W L W C
+ +
= =
(2.14)
Therefore, the resonant center frequency (W
P
) is obtained as

2 d1
p1
d1 d1 d1
R 1
W ( )
L C L
= −

(2.15)
From the equation above, the square term should not be less than zero. In other words,
R
d1
2
should be less than L
d1
/C
d1
. If L
d1
/C
d1
is greater than R
d1
, the resonant center
frequency can be simply reduced to

p1
d1 d1
1
W
L C
=
(2.16)
With L
d1
=150nH, C
d1
=12pF and R
L1
=90 Ω, the center frequency and bandwidth of
resonant tank circuit are 70.38MHz and 80.76%. The quality factor and -3 dB bandwidth
can be estimated.
27

p1 L1
L1
P1
L1 p1 d1 d1 L1
W X
R 1
Q BW
X Q L C R
= = =
(2.17)
However, the center frequency and -3 dB bandwidth of the preamplifier would be
different if the inner impedance of the transistors is included.
For high frequency integrated preamplifier, S-parameter analysis is easier to
characterize the performances based on the 50 Ω terminated input & output impedances
in the circuit. S-parameter can show the useful information in the frequency domain such
as the input-reflection coefficient (S11), the voltage gain (S21), the reverse voltage gain
(S12) and the output-reflection coefficient (S22). The equations for S11 and SS22 are
shown below.
( ) ( )
o i
i o
Z 50 Z 50
S11 dB 20 log S22 dB 20 log
Z 50 Z 50
− −
= ⋅ = ⋅
+ +

(2.18)
where Z
i
is the input impedance of the preamplifier and Z
o
is the output impedance of the
preamplifier.
IIP3 is also a useful parameter to evaluate the linearity of the front-end circuits. IIP3
point is the crossed point which first-order power graph and third-order power graph
meets. IIP3 point shows non-linear performances caused by third-order intermodulation
signals in the linear system such as power amplifier or preamplifier. The relationship for
the first-order and third-order intermodulation point is shown below.

28

Figure 2.11: IIP3 graph describing the relationship between first order power and third
order modulated power.

The relationship between IIP3, OIP3 and IMD is described. From the equation (2.19)
and (2.20), IM3 signal is supposed to be increased further as the input signal is increased
to reach saturated power. Therefore, higher IIP3 means more linear system.

Figure 2.12: The graph for OIP3 and IMD.

IIP
3
=OIP
3
-Gain (2.19)
OIP
3
= P
out
+ IMD/2 (2.20)
where OIP3 is third-order output intercept point, P
out
is the two-tone output signal power
which is dBm scale, and IM3 is the third-order-intermodulation product.
OIP3
Frequency
Power
Pout
IM3
f
1
f
2
f
0
2f
1
-f
2 2f
2
-f
1
IMD
29

For the noise analysis of the preamplifier, the flicker noise (also called as 1/f noise)
and thermal noise from the transistors are usually considered. First, flick noise is
dependent on the semiconductor surface (Lee 2004; Floyd et al 2004). Therefore, the
heterojunction bipolar transistor (HBT) shows lower 1/f noise than MOSFETs because
the HBT is attributed to base-emitter junction current in the surface (IBM
Microelectronics Division 2002). For the low frequency operation of the preamplifier, the
flicker noise is more dominant than the thermal noise.

The input-referred flicker noise equation for MOSFET is represented as

n,input,MOSFET
o
2
x
K 1
v
WLC f
=
(2.21)
where K is the process-dependant constant on the order of 10
-25
V
2
F, W and L are the
width and length of the transistor, C
ox
is the capacitance from gate to channel across the
gate oxide and f is the operating frequency.
The flicker noise for MOSFET decreases as the frequency increases and the larger
size of width and length of the MOSFET also generate less 1/f noise.
The noise voltage of the first stage CMOS preamplifier is shown as

2
2 2
N1 m1MOS N2 m2MOS d1
n,output flicker,1,CMOS
1 1 ox1 2 2 ox2 t
2
r
K g K g Z
v for CMOS preamplifier
W L C f W L C f Z
−
 
= +
 
 

(2.22)
where K
N1
g
m1MOS
and K
N2
g
m2MOS
are the process-dependant constant on the order of 10
-
25
V
2
F, W
1
and L
1
are the width and length of the MOSFET (M
1
), W
2
and L
2
are the width
30

and length of the MOSFET (M
2
), f is the operating frequency, C
ox1
and C
ox2
are the
capacitances from gate to channel across the gate oxide of the MOSFETs (M
1
and M
2
).
The noise current of the second stage is negligible because the voltage gain of the
first stage preamplifier (A
v1
) is large enough to eliminate the factor of the second stage
noise current. Therefore, the size of width and length and input impedance affect the
noise performance of the preamplifier.
31

Figure 2.13: Simulation of 70 MHz CMOS preamplifier. (a) V oltage gain (13.5 dB at 76
MHz) and -3dB bandwidth (68 %) for CMOS preamplifier. (b) Reverse voltage gain (-
98.2 dB at 70 MHz) of CMOS preamplifier. (c) Input reflection coefficient (-18.45 dB at
70 MHz) of CMOS preamplifier. (d) Output reflection coefficient (-26.6 dB at 70 MHz)
of CMOS preamplifier. (e) Third order intermodulation-intercept-point (4.19 dBm) of
CMOS preamplifier. (f) Noise figure (6.2 dB at 76 MHz) for CMOS preamplifier.

(a) (b)

(c) (d)

(e) (f)
32

For the high frequency preamplifier, the thermal noise is a more dominant factor than
the flicker noise. Unlike flicker noise, thermal noise can be minimized by proper design
such as large transconductance (g
m
). The noise figure of CMOS preamplifier can be
written as (Razavi 2000; Razavi 2003).

M1
MOSFET 1
tr m1MOS
R 1
NF 1
| Z | 2g
= + = +
M g
R r
(2.23)
where NF
MOSFET
is the noise figure of the CMOS preamplifier, R
M1
is the equivalent
noise resistance of MOSFET (M
1
), Z
tr
is the input impedance of the integrated
preamplifier, r
g
is the gate-resistance of MOSFET (M
1
).
For the common-gate MOSFET (M
2
), the noise term can be neglected due to large output
impedance (Razavi 2003). Therefore, the noise term of MOSFET (M
2
) is not included.
The design of the integrated preamplifier is intended to obtain high gain, low noise
figure, higher IIP3, good isolation, input and output matching conditions. The figure
below showed the simulation data of 70MHz integrated CMOS preamplifier.

2.5.2. Analysis of BiCMOS Integrated Preamplifier
Compared to CMOS preamplifier, the HBT device (M
1
) was replaced for the
BiCMOS preamplifier which promises to provide less sensitive for lower flicker noise in
the low frequency operation. With the same off-chip components from CMOS
preamplifier, the different simulation data would be obtained.
33

Figure 2.14: Architecture of a BiCMOS preamplifier.

Table 2.3: The off-chip components values of a BiCMOS preamplifier.
Components Category Values
C
cap
DC coupling capacitor 30pF
L
g
Gate inductor 150nH
C
d1
Load capacitor 12pF
L
d1
Load inductor 150nH
R
d1
Load resistor 90Ω
L
d2
Load inductor 150nH
R
d2
Load resistor 90Ω
C
out
DC coupling capacitor 30pF
C
1
,C
2
Bypass capacitor 0.1pF
C
3
Electrolytic capacitor 10pF

The transconductance of heterojunction bipolar transistor (HBT) is defined as

c
m,HBT
I
g q
kT
= ⋅
(2.24)
where g
m,HBT
is the transconductance of HBT, q is the total amount of charge, I
c
is
collector bias current of the HBT, k is Boltzmann constant and T is room temperature.
The lower noise figure can be achieved because HBT devices have better substrate
than CMOS devices for noise performance and CMOS devices have higher linearity
Gnd
R
bias
R
b
Ccap
Lg
M
2
M
1
M
3
C
out Output
M
20
L
d1
L
d2
Input
R
d2
+
R
d1
C
d1
Vdd
34

(Floyd 2004; IBM Microelectronics Division 2002). The input impedance equation of
BiCMOS preamplifier is

tr,BiCMOS g1
cap EDS π1
1 1
Z jwL
jwC jw(C C )
= + +
+

(2.25)
where L
g1
is the off-chip inductance, C
π1
is the parasitic base-emitter capacitance of M
1
,
C
ESD
is the equivalent capacitances of the hyperabrupt varactors.
Therefore, the overall voltage gain of the BiCMOS preamplifier is

2 2
d2 d2 m1HBT m2MOS m3MOS lim
v v1 v2
ESD π1
d1
2 2 2
L1 d1
R (wL ) g g g C
A A A
1
C C
wC
R w L
+
= ⋅ =−
+
+
+

(2.26)
where g
m1HBT
is the small signal transconductance of the heterojunction bipolar transistor
(HBT) M
1
.

The input-referred flicker noise equation for HBT is represented as
f
1
I
A
K
V
2
B
e
2
HBT , input , n
=
(2.27)
where A
e
is the emitter junction area of HBT and I
B
is the base current of HBT.
The flicker noise for HBT is decreased as the frequency and emitter junction area are
increased and the base current is decreased.
The noise voltage of the first stage BiCMOS preamplifier is shown as
2
2 2
NHBT B N2 m2MOS d1
n,output flicker,1,BiCMOS
e 2 2 ox2 tr
2
K I K g Z
v
A f W L C f Z
for BiCMOSPreamplifier
−
 
+


=



(2.8)
where K
N,HBT
are the process-dependant constant on the order of 10
-25
V
2
F.
35

The noise figure of the BiCMOS preamplifier is expressed as.

M1
BiCMOS 1
tr m1HBT
R 1
NF 1
| Z | 2g
= + = +
M b
R r
(2.29)
where NF
BiCMOS
is the noise figure of the BiCMOS preamplifier, R
M1
is the equivalent
noise resistance of the HBT (M
1
), r
b
is the base resistance of the HBT (M
1
).
According to the equations given above, the noise figure can be reduced by higher
values of transconductances and input impedances. At peak current and the same load
impedances, the transconductances of HBT are theoretically higher than those of
MOSFET, thus generating lower noise figures for the BiCMOS preamplifier than for the
CMOS preamplifier (Floyd et al 2004; IBM Microelectronics Division 2002).
With the same off-chip load impedances, the center frequency, bandwidth, input &
output reflection data, IIP3 were different due to different performances of the HBT (M
1
)
devices. The figures below showed the simulation data for 60 MHz integrated
preamplifier.

36

(a) (b)

(c) (d)

(e) (f)
Figure 2.15: Simulation of 60 MHz BiCMOS preamplifier. (a) V oltage gain (12.7 dB at
58 MHz) and bandwidth (75 %) for BiCMOS preamplifier. (b) Reverse voltage gain (-
106.3 dB at 60 MHz) of BiCMOS preamplifier. (c) Input reflection coefficient (-15.9 dB
at 60 MHz) of BiCMOS preamplifier. (d) Output reflection coefficient (-21.1 dB at 60
MHz) of BiCMOS preamplifier. (e) IIP3 point (-3.68 dBm) of BiCMOS preamplifier. (f)
Noise figure (4.5 dB at 58 MHz) for BiCMOS preamplifier.

37

2.6. Design of a Sallen-Key Butterworth Low Pass Filter
A Butterworth filter can provide the maximally flat magnitudes in the pass-band
such that it is useful to have a small group delay for the wideband transducer but it does
not have sharp drop in the stop-band compared with a Chebyshev filter or an elliptic filter
(Karki 2002; Zumbahlen 2007). The Sallen-Key filter is a kind of a positive feedback
topology shown in Figure 2.16 because the feedback path which consists of a resistor-
capacitor network and high voltage protection diodes is connected to the positive and
negative terminals of the operational amplifier in order to improve matching condition.
The Sallen-key filter is also a useful technique because the performance of the filter
does not mainly depends on the operational amplifier compared with a multiple feedback
filter (Zumbahlen 2007; Ess 2007). Therefore, it has been usually used to design the high
frequency low pass filter. For an ultrasonic transducer application, the Sallen-Key
Butterworth filter is used to maximize the bandwidth of the unmatched preamplifier
because the spectra of the echo signals need to be large enough to contain the information
of the imaging. The architecture of the Sallen-key Butterworth low pass filter is shown in
Figure 2.16. This Sallen-Key Butterworth filter was implemented on the PCB board using
a voltage feedback operational amplifier, capacitors and resistors.
38

Figure 2.16: Architecture of second order Sallen-Key Butterworth low pass filter.

Table 2.4: Component values of the Sallen-Key Butterworth low pass filter.
Components Values
R
1
47 Ω
R
2
470 Ω
C
1
4.7pF
C
2
33pF

The analysis of this filter was described. First, we need to assume the gain of the
operational amplifier is infinite to simplify the derivation. The relationship between the
input and output of the filter is obtained:
V
out
= V
x
(2.30)
where V
out
is the output of the operational amplifier and V
x
is the input terminal voltage
of the operational amplifier.

R
2
C
1
C
2
V out
+
-
A
V
R
1
Vin
High voltage
protection
diodes
L
t
C
t
R
t
Equivalent circuit of
ultrasonic transducer

C
6
+
C
3
C
4
C
5
+
V
dd
V
ss
39

If we assume the input impedance of the amplifier is infinite, the current which goes
through the resistor R
2
is supposed to go to the node of capacitor C
1
. The equation is
expressed as follows:

1
x 1 1
1 2
2
1
1
sC 1
V V V
1
1 sC R
R
sC
= =
+
+

(2.31)
where V
1
is the voltage of the feedback path of the operational amplifier.
Therefore, the current equation is
I
1
= I
2
+ I
3
(2.32)
Plugging equations (2.30) and (2.31) into (2.32), the equation can be re-written.

( )
in 1
1 x 2 1 out
1
V V
sC V sC (V V )
R
−
= + −
(2.33)
Finally, the transfer function of the second order low pass filter is represented.
( )
out
2
in 1 2 1 2 1 1 2
V 1
V s R R C C sC R R 1
=
+ + +

(2.34)
The resonant frequency of this filter is
c
1 2 1 2
1
f
2π R R C C
=
(2.35)
The quality factor of this filter is
1 2 1 2
1 1 2
R R C C
Q
C (R R )
=
+

(2.36)
40

Figure 2.17: Simulation of Sallen-Key Butterworth filter with equivalent circuit of
ultrasonic transducer and high voltage protection diodes.

2.7. Design of Non-Inverting Amplifier and Buffer Amplifier

Figure 2.18: Non-inverting amplifier configuration.

20 40 60 80 100 120 140 0 160
-10
-5
0
-15
5
freq, MHz
dB(Vout)
R
3
V
out
+
-
A
V
R
4
R
1
R
load
C
1
R
2
+
C
2
C
3
V
dd

C
4
+
C
3
V
ss
V
in
41

The non-inverting amplifier was designed for gain compensation due to 50 Ω input &
output matching conditions of the filter and preamplifier. The 50 Ω coaxial cables from
the output of the filter to the preamplifier can decrease the voltage gain due to matching
conditions. Additionally, the output impedance of the filter is smaller than 50 Ω and the
input impedance of the preamplifier is much larger than 50 Ω. Therefore, the designed
non-inverting amplifier was located between the filter and the preamplifier. The voltage
feedback operational amplifier (OPA843, Texas Instrument, Texas, USA) was used to
make non-inverting amplifier.

Figure 2.19: Buffer amplifier configuration.

The buffer amplifier has high input and low output impedance. The buffer amplifier
was designed for a input matching with 50 Ω coaxial cable. Therefore, the voltage gain of
this amplifier is 2 (=1+R
3
/R
2
) such that the whole gain could be 1 due to the input
impedance matching condition. An operational amplifier (OPA842, Texas Instrument) is
used to implement the buffer amplifier. The following figure shows the functional block
about the designed front-end circuits.
42

Figure 2.20: Block diagram for the front-end circuits.

2.8. Experimental Results for a 70MHz Lithium Niobate Transducer
The measurement data of the BiCMOS and CMOS preamplifier with Sallen-Key
Butterworth low pass filter was obtained and then, the integrated preamplifier with
Sallen-Key filter was tested with 70MHz Lithium Niobate single element transducer in
order to obtain the pulse-echo responses and wire-phantom images to compare the
performances.

2.8.1. Introduction of Pulse-Echo Response
In ultrasonic imaging, a short pulse of a broad bandwidth is transmitted from the
transducer to the target and is reflected or scattered by targets and then, the echoes are
detected by the transducer. Typically, the pulse-echo responses from a flat reflector are
usually used to evaluate the performance of an ultrasonic transducers and the system
(Zhao et al 1999). The pulse-echo responses are evaluated using the response amplitude
at maximum output voltage and the spectrum data. The bandwidth of the transducer is
usually -6 dB point which is the half point of the maximum amplitude from the central
point. The pulse-echo responses were measured using a quartz target in a water tank.
43

These experimental results confirm the performance of the designed front-end circuits
compared with the pulse generator (PANAMETRICS 5900PR, Olympus, Center Valley,
PA, USA) for a LiNbO
3
(lithium niobate) ultrasonic transducer. A popular piezoelectric
material of a high frequency single element transducer is LiNbO
3
. It has a reasonably
good coupling coefficient (k
t
=0.49) and low relative clamped dielectric permittivity,
which increases acoustic impedance (Desilets et al 1978).
The single element transducer fabricated in the Ultrasonic Transducer Resource
Center (Xiang Li, 2009) was used to measure the performance of designed front-end
circuits consisting of preamplifier and filter.
Table 2.5: The parameters of a 70MHz single element ultrasonic transducer.
Center Frequency -6 dB Bandwidth Focal Depth Radius
70 MHz 60 ~ 70 % 5.36 mm 2.6 mm

This transducer was a good candidate working with low energy 1μJ in order to test
the preamplifier’s performance. The pulse-echo response setup with a 1GHz oscilloscope
(LC534, LeCroy, Chestnut Ridge, NY , USA) is shown in Figure 2.21. The terminated
matched cable is 50 Ω because the desired ultrasonic transducer is theoretically designed
for 50 Ω.
44

Figure 2.21: Pulse-echo test setup block diagram for the front-end circuits with ultrasonic
transducer.

2.8.2. Measurement Data for Integrated Preamplifier
A DC power supply (E3630A Agilent Technologies, Santa Clarar, CA), a function
waveform generator (SONY/Tecktronix AFG2020 synthesized arbitrary waveform
generator, Beaverton, OR) and a digital oscilloscope (TDS 5052, Tecktronix, Beaverton,
OR) were used to obtain the specification of the integrated preamplifier. The voltage gain
of the Sallen-Key filter with the non-inverting amplifier was shown in Figure 2.22 (k). Its
measured voltage gain was 1.33 dB and -3 dB bandwidth was 98 MHz. These data can
cover enough frequency range for the designed preamplifier and transducer.
Instead of the phase shift and the group delay measurement, S Parameters (voltage
gain, reflection coefficients and reverse voltage gain) need to be used for high frequency
operation because of the technical difficulty. For example, the 1us analog delay would be
needed to measure the phase for 100MHz center frequency (Burns et al 2001).
The Spectrum analyzer (EE4401B , Agilent Technologies, Santa Clara, CA) and high
gain amplifier (MITEQ-AU-1114, Hauppauge, NY) are used to measure the noise
45

performances. For the noise figure measurement, “Gain Method” was used (Maxim
Integrated Products 2003; Agilent Technologies 2010). If the gain of the amplifier was
already pre-determined, we could use the noise figure equation which comes from
equation (2.37). Since the gain of integrated preamplifier itself was not sufficient large,
another high gain amplifier was added to measure the noise figure. Therefore, the
integrated preamplifier and an additional amplifier (AU-1114) were used at the same time.
If the gain of the amplifier is pre-determined, the noise figure of the cascade can be
calculated from the equation below (Maxim Integrated Products 2003).

cascade NOUTD preamp amp
NF P 174dBm / Hz Gain
+
= + −
(2.37)
where P
NOUTD
is the measured total output noise power, -174 dBm/Hz is the noise density
of 290
o
K ambient noise, Gain
preamp+amp
is

the gain of the preamplifier and another
amplifier (AU-1114).
The noise figure of the multiple-stage amplifier is given by

2 2 n
total 1
NF 1 NF 1 NF 1
NF NF
Av,1 Av,1 Av,2 Av,1 Av,2 Av,n
− − −
= + + +…
⋅ ⋅ ⋅⋅⋅⋅

(2.38)
Therefore, the noise figure of the integrated preamplifier for two-stage system can be
represented as
amp
preamp cascade
v,preamp
NF 1
NF NF
A
−
= −
(2.39)

46

To obtain the input third-order-intermodulation intercept point (IIP3), the
attenuator(HAT-30+ 30dB attenuator, Mini-Circuits, Brooklyn, NY) was used because of
the limited voltage range of the function waveform generator(AFG3252, Tektronix,
Tektronix, Beaverton, OR). The IIP3 measurement point was obtained based on 10 MHz
two-tone spacing from the center frequency.

47

(a) (b)

(c) (d)

(e) (f)

(j) (k)
Figure 2.22: Measured performances of 60 MHz BiCMOS and 70 MHz CMOS
preamplifier and its front-end circuit. (a) V oltage gain for BiCMOS preamplifier was
10.23 dB at 60 MHz and its -6 dB bandwidth was 46.15 %. V oltage gain for CMOS
preamplifier was 11.78 dB at 70 MHz and its -6 dB bandwidth was 21.19 %. (b) The
voltage gain of front-end circuits. For BiCMOS preamplifier, the voltage gain was 14.45
dB at 60 MHz and -6 dB bandwidth was 83.33 %. For CMOS preamplifier, voltage gain
was 13.09 dB and -6 dB bandwidth was 59.42 %. (c) Input reflection coefficient. -13.39
dB at 60 MHz for BiCMOS preamplifier and -17.38 dB at 70 MHz for CMOS
preamplifier. (d) Reverse voltage gain. -29.9 dB at 60 MHz for BiCMOS preamplifier
and -11.31 dB at 70 MHz for CMOS preamplifier. (e) Output reflection coefficient. -
11.92 dB at 60 MHz for BiCMOS preamplifier and -14.64 dB at 70 MHz for CMOS
preamplifier. (f) Noise Figure. 4.75 dB at 60 MHz of 60 MHz BiCMOS preamplifier and
7.73 dB at 70 MHz for CMOS preamplifier. (j) IIP3 was -5.5 dBm for BiCMOS one and -
4 dBm for CMOS one. (k) V oltage gain of Sallen-Key filter with non-inverting amplifier.
-25
-20
-15
-10
-5
0
5
10
15
1 10 19 28 37 46 55 64 73 82 91 100
Frequency(MHz)
Gain (dB)
BiCMOS
Preamplifier
CMOS
Preamplifier
-20
-15
-10
-5
0
5
10
15
20
1 10 19 28 37 46 55 64 73 82 91 100
Gain (dB)
BiCMOS
Preamplifier
CMOS
Preamplifier
Frequency(MHz)
-25
-20
-15
-10
-5
0
1 10 20 29 39 48 58 67 77 87 96
Input Reflection
Coefficient (dB)
Frequency (MHz)
CMOS
Preamplifier
BiCMOS
Preamplifier
-60
-50
-40
-30
-20
-10
0
1 10 19 28 37 46 55 64 73 82 91 100
BiCMOS
Preamplifier
CMOS
Preamplifier
Frequency (MHz)
Reverse Voltage
Gain (dB)
-35
-30
-25
-20
-15
-10
-5
0
1 9 17 25 33 41 49 57 65 73 81
Output Reflection
Coefficient (dB)
Frequency (MHz)
BiCMOS
Preamplifier
CMOS
Preamplifier
0
5
10
15
20
25
10 20 30 40 50 60 70 80 90 100
Noise Figure (dB)
Frequency (MHz)
BiCMOS
Preamplifier
CMOS
Preamplifier
-100
-80
-60
-40
-20
0
20
40
60
-40 -36 -32 -28 -24 -20 -16 -12 -8 -4 0 4
Output Power (dBm)
Input Power (dBm)
BiCMOS Preamplifier
IIP3 = -11dBm
CMOS Preamplifier
IIP3 = -4.5dBm
48

The BiCMOS preamplifier, which has a wide bandwidth, did not hurt the
performance of the transducer. Compared with the performances of the 60MHz BiCMOS
preamplifier, CMOS one had different performances even though the same off-chip
components were used to be implemented. The noise figure, voltage gain and -6 dB
bandwidth of 70 MHz CMOS one was worse but the IIP3 performance was better. The
input & output reflection coefficient of CMOS preamplifier was better than those of
BiCMOS preamplifier. These phenomenon are desirable. However, the reverse voltage
gain was really worse such that it needs to be improved.

2.8.3. Pulse-Echo Responses for Integrated Preamplifier with a Lithium Niobate
Transducer
The time and frequency-domain characteristics of the pulse-echo responses for 60
MHz BiCMOS and 70 MHz CMOS preamplifier with Sallen-Key low pass Butterworth
filters were shown in Figure 2.23 and 2.24.

49

(a) (b) (c)

Figure 2.23: Pulse-echo responses for BiCMOS Preamplifier and PANAMETRICS
5900PR. (a) The transducer‘s pulse-echo response without amplification. Its center
frequency was 67.62 MHz, its -6 dB bandwidth is 61.9 % and received peak-to-peak
voltage was 137.61 mV . (b) The transducer‘s pulse-echo response using 14.5 dB
PANAMETRICS 5900PR. Its center frequency was 67.61 MHz, its -6 dB bandwidth is
58.3 % and received peak-to-peak voltage was 766.08 mV . (c) The transducer‘s pulse-
echo response using designed front-ended circuits. Its center frequency of a transducer
was 65.16 MHz and its -6 dB bandwidth is 60.1 % and received peak-to-peak voltage
was 761.33 mV .

Table 2.6: Measurement setup for BiCMOS Preamplifier and PANAMETRICS 5900PR.
(a) PANAMETRICS 5900PR setup to measure the ultrasonic transducer only. (b)
Measurement setup for the ultrasonic transducer with PANAMETRICS 5900PR. (c)
Measurement setup for the ultrasonic transducer with front-end circuits.

(a) (b) (c)
Mode P/E
Energy 1μJ
Pulse repetition
frequency
200Hz
Gain 26dB
Attenuation 26dB

Mode P/E
Energy 1μJ
Pulse repetition
frequency
200Hz
Gain 26dB
Attenuation 11.5dB

Mode P/E
Energy 1μJ
Pulse repetition
frequency
200Hz
Gain 26dB
Attenuation 26dB

From Figure 2.23, the measured center frequency of the transducer was shifted
somewhat but the -6 dB bandwidth was similar with the performance of the transducer.
7.109 7.1595 7.21 7.2605 7.311
-80
-40
0
40
80
Time (μ μ μ μs)
A m p l i t u d e ( m V )

20 42.5 65 87.5 110
-24
-18
-12
-6
0
Frequency (MHz)
M a g n i t u d e ( d B )
Pulse-echo Responsee
Spectrum
7.201 7.2515 7.302 7.3525 7.403
-450
-225
0
225
450
Time (μ μ μ μs)
A m p l i t u d e ( m V )

20 42.5 65 87.5 110
-24
-18
-12
-6
0
Frequency (MHz)
M a g n i t u d e ( d B )
Pulse-echo Responsee
Spectrum
7.213 7.2635 7.314 7.3645 7.415
-450
-225
0
225
450
Time (μ μ μ μs)
A m p l i t u d e ( m V )

20 42.5 65 87.5 110
-24
-18
-12
-6
0
Frequency (MHz)
M a g n i t u d e ( d B )
Pulse-echo Responsee
Spectrum
50

(a) (b) (c)
Figure 2.24: Pulse-echo responses for CMOS Preamplifier and PANAMETRICS 5900PR.
(a) The transducer‘s pulse-echo response. Its center frequency of the transducer was 68.1
MHz and -6 dB bandwidth is 59.8 % and received peak-to-peak voltage was 162.2 mV . (b)
The transducer‘s pulse-echo response using PANAMETRICS 5900PR with 14.5 dB. Its
center frequency of the transducer was 68.5 MHz and -6 dB bandwidth was 58.2 % and
received peak-to-peak voltage was 765.68 mV . (c) The transducer‘s pulse-echo response
using designed front-end circuits. Its center frequency of the transducer was 67.6 MHz
and -6 dB bandwidth is 54.8 % and received peak-to-peak voltage was 781.93 mV .

Table 2.7: Measurement setup for CMOS preamplifier and PANAMETRICS 5900PR.
PANAMETRICS 5900PR setup to measure the ultrasonic transducer only (a).
Measurement setup with PANAMETRICS 5900PR (b). Measurement setup with a front-
end circuit (c).

(a) (b) (c)
Mode P/E
Energy 1μJ
Pulse repetition
frequency
200Hz
Gain 26dB
Attenuation 26dB

Mode P/E
Energy 1μJ
Pulse repetition
frequency
200Hz
Gain 26dB
Attenuation 12.5dB

Mode P/E
Energy 1μJ
Pulse repetition
frequency
200Hz
Gain 26dB
Attenuation 26dB

For the CMOS preamplifier with a Sallen-Key low pass Butterworth filter configuration,
there were more reflection because of the lower bandwidth and higher noise figures
compared with the BiCMOS preamplifier with the same Sallen-Key filter.
7.073 7.1235 7.174 7.2245 7.275
-100
-50
0
50
100
Time (μ μ μ μs)
A m p l i t u d e ( m V )

30 47.5 65 82.5 100
-24
-18
-12
-6
0
Frequency (MHz)
M a g n i t u d e ( d B )
Pulse-echo Responsee
Spectrum
7.073 7.1235 7.174 7.2245 7.275
-500
-250
0
250
500
Time (μ μ μ μs)
A m p l i t u d e ( m V )

30 47.5 65 82.5 100
-24
-18
-12
-6
0
Frequency (MHz)
M a g n i t u d e ( d B )
Pulse-echo Responsee
Spectrum
7.073 7.1235 7.174 7.2245 7.275
-500
-250
0
250
500
Time (μ μ μ μs)
A m p l i t u d e ( m V )

30 47.5 65 82.5 100
-24
-18
-12
-6
0
Frequency (MHz)
M a g n i t u d e ( d B )
Pulse-echo Responsee
Spectrum
51

2.8.4. Wire Phantom images for a 70MHz Lithium Niobate Transducer
The wire phantom images were obtained using a single element transducer and they
were used to evaluate the performance of the spatial resolution of the transducer with
designed front-end circuits (Shung 2000). This wire phantom was made using 3 tungsten
wires and was diagonally arranged and was placed in a water tank completely filled with
water. The mechanical motor controlled by a servo motor controller was moving a single
element transducer along the vertical line to acquire echo signals. The generated RF
signals could be processed using a video card and transferred to Labview software in the
computer. The Ultrasound Biomicroscope (UBM) system setting for the function
waveform generator (Agilent 3250A, Agilent Technologies, Santa Clara, CA), Pulser
(PANAMETRICS 5900PR) and Labview was also shown below.
Table 2.8: The equipment setup for wire phantom images.
Function
generator
Values Pulser Values Labview Values
Vp-p 5 V Mode P/E # of Beam 1,000
Burst mode 1,000 cycles PRF EXT-BNC PRF 1,500
Pulse frequency 1.5 kHz Energy 1 uJ Dynamic range 40 dB
Trigger External RF output phase 0
o
Mode Single
Delay 0 sec Damping
50 Ω
Trigger delay 0

52

Figure 2.25: Block diagram for a wire phantom image. This diagram describes how to
connect test equipment to measure a wire phantom image for a single element transducer.

From the wire phantom images in Figure 2.26, the BiCMOS preamplifier and filter
shows comparable axial resolution compared to PANAMETRICS 5900PR (Olympus
NDT Inc, Waltham, MA) for the same setting. The BiCMOS preamplifier and filter
shows better axial resolution than CMOS preamplifier and filter.

A/D Card
Motor
Controller
Pulser
Function
Generator
Front-End
Circuits
Motor
Computer
Wire Phantom
Water
Transducer
53

(a) (b)

(c) (d)
Figure 2.26: Wire phantom images with PANAMETRICS 5900PR and front-end circuits.
(a) A wire phantom image with PANAMETRICS 5900PR providing 14 dB gain. (b) A
wire phantom image with designed 70 MHz CMOS preamplifier and a filter. (c) A wire
phantom image with PANAMETRICS 5900PR providing 14.5 dB gain. (d) A wire
phantom image with designed 60 MHz BiCMOS preamplifier and a filter.

54

CHAPTER 3: INTEGRATED PREAMPLIFIER DESIGN FOR
LITHIUM NIOBATE AND PZT THICK FILM TRANSDUCER

3.1. Active Sallen-Key Butterworth Filter Design
The higher sensitivity is sometimes required for some types of high frequency
ultrasonic transducers. Therefore, the Sallen-key filter was used to increase the voltage
gain of the front-end circuit for high frequency transducers which are generally low in
sensitivity. The non-inverting amplifier can thus be excluded from the previous design.
With a Sallen-Key filter topology, the high voltage gain can affect the stability such that
large capacitor between supply rails were used to reject unwanted noise on the supply
lines (Ardizzoni 2008).

Figure 3.1: Architecture of an active Sallen-Key Butterworth low pass filter.

55

Table 3.1: The component values for Sallen-Key active Butterworth low pass filter.
Components Values
R
1
47 Ω
R
2
300 Ω
C
1
5pF
C
2
7pF
C
3
, C
5
0.01μF
C
4
, C
6
10μF
R
3
115 Ω
R
4
471 Ω
C
7
30pF
R
6
2 kΩ

The output voltage at the (-) terminal point of the operational amplifier is defined as

3
out
3 4
R
V
R R +

(3.1)
where V
out
is the output voltage, R
3
and R
4
are the feedback resistors.
The voltage at (+) terminal point of the operational amplifier is defined as V
x
and then,
the following equation is obtained:
( )
3
out V X out V X out 0
3 4
R
V A V V A V V T
R R
 
= − = −
 
+
 

(3-2)
where T
0
is the open-loop voltage gain, A
V
is the open-loop gain of the operational
amplifier.
The equation is simplified as

X OUT OUT
V 0
1 1
V V T V
A T
 
= + = ⋅
 
 

(3-3)
The voltage at the (+) terminal point of the operational amplifier can be re-written as

X 1
1 2
1
V V
1 sC R
=
+

(3-4)
56

Let’s assume the input impedance of the operational amplifier is infinite such that all the
current which goes through the resistor R
2
must go to capacitor C
1
, thus making the
equation simplifiable as
I
1
=I
2
+I
3
(3-5)
Therefore, the equation (3-5) is changed into

( )
in 1
1 OUT X
1
1 2
V V
V V V
1 1
R
sC sC
−
−
= +
(3-6)
This equation is also simplified as

in
X 1 2 1 OUT 2
1 1
V 1
V sC sC V V sC
R R
 
= + + − ⋅
 
 

(3-7)
Therefore, the relationship of output voltage and input voltage is shown as

OUT
2
1 1 in
1 2 1 2 1 2 2 1 1 1
V 1 1
C R V T
s C C R R s C R C R C R 1
T
= ⋅
 
+ + − + +
 
 

(3-8)
If the open-loop voltage gain of the operational amplifier is infinite, the transfer function
of the Sallen-Key low pass filter can be simplified as

4
OUT 3
in 2
4
1 2 1 2 1 1 2 1 1
3
R
(1 )
V R
V
R
s C C R R s C (R R ) R C 1
R
+
=
 
+ + − +
 
 

(3-9)

57

The operational frequency of this filter (W
n
) is
1 2 1 2
1

C C R R
. (3.10)
The open loop gain of the Sallen-Key low pass filter (A
n
) is
4
3
R
1
R
+ . (3.11)
The qualify factor of this filter (Q) is
1 2 1 2
4
1 1 2 1 1
3
C C R R
R
C (R R ) R C
R
+ −
(3.12)

Figure 3.2: Simulation data of Sallen-Key active filter with equivalent circuit of a high
frequency ultrasonic transducer and high voltage protection diodes.

The active Sallen-Key Butterworth filter was implemented on the PCB board and
voltage feedback operational amplifier (OPA843) with SMD resistors and capacitors was
used for this filter. The same buffer amplifier was used here from the previous design.

20 40 60 80 100 120 140 160 180 0 200
5
10
15
0
20
freq, MHz
dB(Vout)
58

3.2. Front-end Circuit Consisting of Active Filter and Integrated Preamplifier for a
Lithium Niobate Transducer
The active Sallen-Key Butterworth filter was directly connected to transducer through
50 Ω cable. The preamplifier design was modified by the different values of load
impedance with the same architecture mentioned in Chapter 2. The architecture of front-
end circuit is shown below.

Figure 3.3: The architecture of a 100MHz preamplifier and active Sallen-Key filter.

Compared to Chapter 2, the BiCMOS and the CMOS preamplifier design was
directly interfacing to the transducer and the off-chip component values was changed
according to the specifications. This showed that the performances of the integrated
preamplifier can be tunable with the different values of the off-chip components
according to the given specification. In Figure 3.5 and 3.6, the 100MHz integrated
preamplifier was shown with same architecture and different values of off-chip
components (Table 3.2 and 3.3). The voltage gain, input & output reflection coefficient
was improved to satisfy the transducer which has very low sensitivity (<20mV detection
level).
59

(a) (b)

(c) (d)

(e) (f)
Figure 3.4: Simulation of 100 MHz BiCMOS preamplifier. (a) V oltage gain (29.2 dB at
100 MHz) and -3 dB bandwidth (92 %). (b) Noise Figure (2.4 dB at 100 MHz). (c)
Input reflection coefficient ( -18.87 dB at 100 MHz) . (d) Output reflection coefficient (-
20.7 dB at 100 MHz ). (e) Reverse voltage gain (-99.4 dB at 100 MHz) . (f) IIP3 for 10
MHz two-tone spacing (-7.84 dBm at 100 MHz).
60

Figure 3.5: Architecture of a BiCMOS preamplifier for 100MHz LiNbO
3
transducer.

Table 3.2: The off-chip component values for BiCMOS preamplifier.
Components Category Values
C
coup
DC coupling capacitor 25 pF
L
g
Gate inductor 200 nH
C
d1
Load capacitor 12 pF
L
d1
Load inductor 120 nH
R
L1
Load resistor 20 Ω
L
d2
Load inductor 120 nH
R
L2
Load resistor 20 Ω
C
out
DC coupling capacitor 30 pF

Gnd
R
bias
R
b
Ccap
Lg
M
2
M
1
M
3
C
out Output
M
20
L
d1
L
d2
Input
R
d2
+
R
d1
C
d1
Vdd
61

Figure 3.6: Architecture of a 100 MHz CMOS preamplifier.

Table 3.3: The off-chip component values for CMOS preamplifier.
Components Category Values
C
coup
DC coupling capacitor 30 pF
L
g
Gate inductor 150 nH
C
d1
Load capacitor 12 pF
L
d1
Load inductor 150 nH
R
L1
Load resistor 20 Ω
L
d2
Load inductor 150 nH
R
L2
Load resistor 20 Ω
C
out
DC coupling capacitor 30 pF

Gnd
R
bias
R
b
Ccap
Lg
M
2
M
1
M 3
C out Output
M
20
L
d1
L
d2
Input
R d2
+
R
d1
C
d1
Vdd
62

(a) (b)

(c) (d)

(e) (f)
Figure 3.7: Simulation of 100 MHz CMOS preamplifier. (a) V oltage gain (25.6 dB at 100
MHz) and -3 dB bandwidth (41 %). (b) Noise Figure (6.5 dB at 100 MHz). (c) Input
reflection coefficient ( -25.1 dB at 100 MHz). (d) Output reflection coefficient (-27.5 dB
at 100 MHz) . (e) Reverse voltage gain (-90.5 dB at 100 MHz ). (f) IIP3 (+1.9 dBm) for
10 MHz two-tone spacing.

63

3.3. Experimental Results for a Single Element Lithium Niobate Transducer
A single element LiNbO
3
single element transducer was used to demonstrate the
performances of the pulse-echo responses and wire-phantom images for 100MHz
integrated preamplifier. The active Sallen-Key Butterworth was also used for the high
frequency transducer which has lower sensitivity.

3.3.1. Measurement Data of the Integrated Preamplifier
The experimental result showed the performance of the designed front-end circuits
with a single element lithium niobate ultrasonic transducer. The pulse-echo response was
measured using the same quartz target in a water tank. The A VTECH monocycle
generator (A VB2-TE-C, Avtech Electrosystems, Ltd., Ottawa, Ontario) is better than the
PANAMTERICS 5900PR for a tunable center frequency and adjustable amplitude.
The S-parameters (gain, input & output reflection coefficient and noise figure), the
input third-order intercept point (IIP3), the output 1dB output compression point (P
1dB
)
and the output third-order intercept point (OIP3) of the integrated preamplifier with the
gain of the front-end circuit were measured. IIP3, OIP3 and OP
1dB
are useful parameters
to determine the linearity of the preamplifier. The IIP3 measurement point was obtained
based on 10MHz two-tone spacing from the center frequency (90MHz and 110MHz).

64

The OIP3 was measured with 10MHz two-tone spacing between 60MHz and
140MHz and OP
1dB
was also measured by increasing input power until the gain was
saturated between 60MHz and 140MHz. The measured performances of the front-end
circuit consisting of integrated preamplifier and filter chain interfacing to the transducer
were shown in Figure 3.8 and 3.9. The measured performances of the BiCMOS and
CMOS preamplifier and its front-end circuit were summarized in Table 3.4 .
65

(a) (b)

(c) (d)

(e) (f)
Figure 3.8: Measured performances of 100 MHz BiCMOS preamplifier and its front-end
circuits. (a) V oltage gain of integrated preamplifier. For BiCMOS preamplifier, voltage
gain was 25.8 dB at 100 MHz, its -3 dB bandwidth was 82 % and -6 dB bandwidth was
130 %. For CMOS one, 24.08 dB at 100 MHz, -3 dB bandwidth was 73 % and -6 dB
bandwidth was 180 %. (b) V oltage gain of front-end circuits. For BiCMOS preamplifier,
voltage gain was 41.28 dB at 100 MHz, its -3 dB bandwidth was 33 % and its -6 dB
bandwidth was 91 %. For CMOS one, gain was 39.52 dB at 100 MHz, its -3 dB
bandwidth was 58 % and -6 dB bandwidth was 108 %. (c) Input reflection coefficient. -
16.67 dB at 100 MHz for BiCMOS preamplifier and -23.31 dB at 100 MHz for CMOS
one. (d) Output reflection coefficient. -18.08 dB at 100 MHz for BiCMOS preamplifier
and -19.96 dB at 100 MHz for CMOS one. (e) Reverse voltage gain. -48.42 dB at 100
MHz for BiCMOS preamplifier and -50.11 dB at 100 MHz for CMOS one. (f) Noise
figure.2.9 dB at 100 MHz for BiCMOS preamplifier and 5.66 dB at 100 MHz for CMOS
one.
-40
-30
-20
-10
0
10
20
30
1 40 79 118 157 196 235
Frequency (MHz)
Gain(dB)
BiCMOS
Preamplifier
CMOS
Preamplifier
-30
-20
-10
0
10
20
30
40
50
1 40 79 118 157 196 235
Frequency (MHz)
Gain (dB)
BiCMOS
Preamplifier
CMOS
Preamplifier
-30
-25
-20
-15
-10
-5
0
1 40 79 119 158 198 237
Frequency (MHz)
Input Reflection
Coefficient (dB)
BiCMOS
Preamplifier
CMOS
Preamplifier
-30
-25
-20
-15
-10
-5
0
1 40 79 119 158 198 237
BiCMOS
Preamplifier
CMOS
Preamplifier
Output Reflection
Coefficient (dB)
Frequency (MHz)
-65
-60
-55
-50
-45
1 40 79 118 157 196 235
Reverse Voltage
Gain (dB)
Frequency (MHz)
BiCMOS
Preamplifier
CMOS
Preamplifier
0
5
10
15
20
25
10 40 70 100 130 160 190 220
Noise Figure (dB)
Frequency (MHz)
BiCMOS
Preamplifier
CMOS
Preamplifier
66

(a) (b)

(c) (d)
Figure 3.9: (a) V oltage gain graph of Sallen-key active Butterworth filter. (b) IIP3 of 100
MHz integrated preamplifier. IIP3 of BiCMOS preamplifier was -12 dBm and IIP3 of
CMOS one was -3.5 dBm. (c) Output power at 1 dB compression point (OP
1dB
) vs.
frequency. (d) Output third-order intercept point (OIP3) vs. frequency.

Table 3.4: Comparison data of BiCMOS and CMOS preamplifier.
Input reflection
coefficient
Reverse gain V oltage gain Output reflection
coefficient
Noise figure
BiCMOS
preamplifier
-17.42 -50.67 25.8 -21.94 2.9
CMOS
preamplifier
-27.63 -51.97 24.08 -22.18 3.51
* All values are in dB scales.

According to the measured input reflection coefficient and output reflection
coefficient values in Figure 3.8 (c) and (d), the lowest point deviates slightly from 100
MHz although they demonstrated the desirable performances which should be less than -
10 dB at 100 MHz. In Figure 3.8 (f), the measured noise figure of CMOS preamplifier
showed that it drops rapidly from 50 MHz. Therefore, the simulated lowest noise figure
-10
-5
0
5
10
15
20
1 40 79 118 157 196 235
Voltage Gain(dB)
Frequency (MHz)
-100
-80
-60
-40
-20
0
20
40
60
-40 -36 -32 -28 -24 -20 -16 -12 -8 -4 0 4
Input Power (dBm)
Output Power (dBm)
BiCMOS Preamplifier
IIP3 = -12dBm
CMOS Preamplifier
IIP3 = -3.5dBm
67

of the CMOS preamplifier was 6.5 dB at 100 MHz but the measured noise figure at 100
MHz was 5.61 dB and the measured lowest noise figure was 3.51 dB at 70 MHz. The
difference between simulated data and measured data may come from the off-chip
components such as inductors and capacitors because the simulation model of the
parasitic impedances for the off-chip components from the manufacturers was not
sufficient to obtain accurate data. In Figure 3.8 (e), the reverse gain was approximately -
50 dB around 80 MHz, which represents good isolation from output port to input port. In
Figure 3.8 (f), the measured voltage gain was the summed result of Figure 3.8 (e), (f) and
buffer. We placed the buffer in the last stage to compensate for the degraded
performances of the active filter in the higher frequency range (>120MHz) because a
high voltage gain (about 15 dB) and impedances mismatch in the active filter would
deteriorate the performances of these integrated preamplifiers in the high frequency range.
In Figure 3.9 (b), the dot-dash line with circles stands for the fundamental output
power of the BiCMOS and CMOS preamplifier. The dash line with squares and dash line
with crosses stands for the third-order-intermodulation product of BiCMOS and CMOS
preamplifier. The output power at 1 dB compression point (OP
1dB
) vs. frequency and
output third-order intercept point (OIP3) were shown in Figure 3.9 (c) and (d). The OIP3
of the BiCMOS preamplifier is around 11 dBm or 12 dBm and that of the CMOS
preamplifier is between 17 dBm and 21 dBm, between 60 MHz and 140 MHz. The OP
1dB

of the BiCMOS preamplifier was between 2 dBm and 5 dBm and that of the CMOS
preamplifier was between 6 dBm and 9 dBm, between 60 MHz and 140 MHz. The
voltage gain of the front-end circuits should be made variable to avoid clamping of the
68

signal. The maximum voltage gain of the BiCMOS and CMOS preamplifier was around
24 dB. Therefore, the maximum echo signal should be around 114 mV which is limited
by the supply voltage. The echo signals in the experiment were so low (<50mV) that
clamping of the signal was avoided. If the echo signal is more than 114 mV , the voltage
gain of the preamplifier should be variable. This means that the resonant-load tank
circuits for each cascade amplifier need to use variable resistors to control the voltage
gain. Otherwise, the voltage gain of the active filter needs to be variable or the voltage
gain of the power amplifier which triggers the transducer needs to be adjustable.
The high gain and limited supply voltage cause the integrated preamplifiers to have a
relatively poor linearity performance which however can be improved by modifying
proceeding stages such as filter and buffer because the third-order-intercept point of the
preamplifier can be lowered by the gain of the following stages for the total OIP3 (Razavi
2003). The IIP3 equation for front-end circuit is given by

!
""#$
%&%'(

!
""#$
)*+',)
-

./,)*+',)
""#$
12(%+*
-

./,)*+',)

.3,12(%+*
""#$
4566+*
(3.13)
where IIP3
total
is the IIP3 of the front-end circuit, IIP3
preamp
is the IIP3 of the integrated
preamplifier, IIP3
filter
is the IIP3 of the active Sallen-Key Butterworth filter, IIP3
buffer
is
the IIP3 of the buffer, A
v1,preamp
is the voltage gain of the preamplifier and A
v2,filter
is the
voltage gain of the active Sallen-Key Butterworth filter.
From the equation (3.13), the total IIP3 can be improved by the higher IIP3 of the
filter, the buffer or the higher voltage gain of the preamplifier and filter. Intuitively, the
IIP3 point of the filter and buffer was much higher according to the datasheet of the filter
and buffer.
69

3.3.2. Pulse-Echo Responses for a Lithium Niobate Transducer
The specification of the tested high frequency ultrasonic transducer was shown in
Table 3.5 below.
Table 3.5: The parameters of a single element lithium niobate ultrasonic transducer.
Center frequency -6 dB bandwidth Focus Aperture size
79.21 MHz 50.35% 2.28 mm 1.3 mm

According to the impedance data of ultrasonic transducer in Figure 3.9, the
impedance value was around 50 Ω for 80 MHz.

Figure 3.10: Photo of 80 MHz LiNbO
3
transducer and its impedance data.

70

A VTEC moncycle generator has no protection diodes such that the expander (DEX-3,
MATEC, Northborough, MA, USA) was used to protect the pulser from the unwanted
high voltage spike signal and limiter(DL-1, MATEC, Northborough, MA, USA) was also
used to protect the front-end circuit because the high voltage short pulse can pass through
the expander directly. The expander can represent two parallel diodes so the high voltage
signal passes from N-side of diode to P-side of the diode and reflected high voltage signal
can be blocked from P-side of diode to N-side of the diode as shown in Figure 3.11.

Figure 3.11: Pictures of the expander and the circuit diagram of the expander.

In Figure 3.12, the limiter circuit can represent two parallel diodes and these two-diodes
directly connected to the input path from the transducer to front-end circuit.

Figure 3.12: Pictures of the limiter and the circuit diagram of the limiter.

Pulser
Transducer
Front-end circuit Transducer
71

The equivalent capacitances of the limiter diodes (Figure 3.12) can affect the
impedance matching and deteriorate the performances of the preamplifier. Therefore, the
capacitances of the limiter should be considered to match with the transducer and front-
end circuit.

Figure 3.13: Pulse-echo test setup block diagram for the designed front-end circuits and
ultrasonic transducer using A VTECH monocycle generator.

The integrated preamplifier has negative voltage gain so that the pulse-echo data
showed inverted waveform. These pulse-echo data for CMOS preamplifier and filter
demonstrated that BiCMOS preamplifier is appropriate for high frequency transducer.
For the ultrasound imaging, the -6 dB bandwidth of the ultrasonic transducer would
be more than 50% such that the center frequency of the ultrasonic transducer needs to be
adjusted accordingly. These graphs in Figure 3.14 showed the comparison between
PANAMETRICS 5900PR and the integrated preamplifier with Sallen-Key Butterworth
filter. Therefore, the gain setting for PANAMETRICS 5900PR would be 40dB and 38dB.

Ultrasonic transducer
Oscilloscope (LeCroy 9350AL)

Water tank
Quartz target

Pulser
(AVTEC moncycle generator)
Expander
Limiter
Front-end
circuit
72

(a) (b)

(c) (d)

Figure 3.14: Pulse-echo responses for 80MHz LiNbO
3
focused transducer. (a) The
LiNbO
3
focused transducer’s pulse-echo response using 40dB PANAMETRICS 5900PR.
Its center frequency was 82.91 MHz, its -6 dB bandwidth was 51.58 % and received
peak-peak voltage was 1769 mV . (b) The LiNbO
3
focused transducer’s pulse-echo
responses using 100MHz BiCMOS preamplifier with Sallen-key filter. Its center
frequency was 78.23 MHz, its -6 dB bandwidth was 51.70 % and the received peak-peak
voltage was 1812mV . (c) The LiNbO
3
focused transducer’s pulse-echo response using 38
dB PANAMETRICS 5900PR. Its center frequency was 82.76 MHz, its -6 dB bandwidth
was 53.73 % and the received peak-peak voltage was 1546 mV . (d) The LiNbO
3
focused
transducer’s pulse-echo response using 100 MHz CMOS preamplifier with Sallen-key
filter. Its center frequency was 83.54 MHz and its -6 dB bandwidth was 52.33 % and
received peak-peak voltage is 1468 mV .

2.9994 3.0249 3.0504 3.0759 3.1014
-1000
-500
0
500
1000
Time (μ μ μ μs)
A m p litu d e (m V )

30 55 80 105 130
-24
-18
-12
-6
0
Frequency (MHz)
M a g n itu d e (d B )
Pulse-echo Response
Spectrum
2.9994 3.0249 3.0504 3.0759 3.1014
-1000
-500
0
500
1000
Time (μ μ μ μs)
A m p litu d e (m V )

30 55 80 105 130
-24
-18
-12
-6
0
Frequency (MHz)
M a g n itu d e (d B )
Pulse-echo Response
Spectrum
2.9994 3.0249 3.0504 3.0759 3.1014
-1000
-500
0
500
1000
Time (μ μ μ μs)
A m p litu d e (m V )

30 55 80 105 130
-24
-18
-12
-6
0
Frequency (MHz)
M a g n i tu d e (d B )
Pulse-echo Response
Spectrum
2.9994 3.0249 3.0504 3.0759 3.1014
-1000
-500
0
500
1000
Time (μ μ μ μs)
A m p litu d e (m V )

30 55 80 105 130
-24
-18
-12
-6
0
X: 108.9
Y: -7.208
M a g n itu d e (d B )
Frequency (MHz)
Pulse-echo Response
Spectrum
73

Since the integrated preamplifier has negative voltage gain, the pulse-echo data also
showed the inverted waveforms. The pulse-echo responses with front-end circuits
exhibited the better performances with the lower ring down and the smoother spectrum
shapes than PANAMETRICS 5900PR.

3.3.3. Wire Phantom Images for a Lithium Niobate Transducer
Three 20μm-diameter and one 6μm-diameter tungsten wires were used for imaging
the target. All wire-phantom images were displayed in 45 dB dynamic range. The CMOS
preamplifier had a narrower bandwidth so that the axial resolution was poorer in the
comparison to BiCMOS preamplifier. From 20 μm wire images for the CMOS
preamplifier, wire-phantom images were elongated. This experiment also demonstrated
the superior performances of the BiCMOS preamplifier over the CMOS preamplifier for
a high frequency ultrasonic transducer. The equipment setup for wire phantom images is
shown in Table 3.6 and its block diagram shown in Figure 3.15.
Table 3.6: Equipment setup for a wire phantom image.
Function generator Value Pulser Value Labview Value
V
p-p
5V Mode P/E # of Beam 3000
Pulse frequency 3kHz Energy 1uJ PRF 3kHz
Trigger External RPF EXT-BNC Trigger delay 0
DC voltage offset 0V RF output phase
angle
0
o
Mode Single
Burst mode 3000 Damping 50 Ω Depth 4096
74

Figure 3.15: Block diagram for a wire phantom image for 100 MHz transducer. The block
diagram describes how to connect test equipments to measure a wire phantom image for a
lithium niobate single element 100 MHz ultrasonic transducer.

In Figure 3.16 and 3.17, these wire-phantom images were measured by the front-end
circuits in which integrated preamplifier has directly to the transducer as shown in Figure
3.3. One 20 μm-diameter and three 6 μm-diameter tungsten wires were used and all
images are displayed in 50 dB dynamic range. The front-end circuits showed better wire-
phantom images compared with the PANAMETRICS 5900PR.

A/D Card
Motor
Controller
Pulser
Function
Generator
Front-End
Circuits
Motor
Computer
Wire Phantom
Water
Transducer
Expander Limiter
75

(a) (b)

(c) (d)
Figure 3.16: Wire phantom images for PANAMETRICS 5900PR and front-end circuits.
(a) A wire phantom image using PANAMETRICS (40 dB gain). The -6 dB axial
resolution was 13μm and the -6 dB lateral resolution was 23 μm. (b) A wire phantom
image using designed front-end system based on 100 MHz BiCMOS preamplifier. The -6
dB axial resolution was 14 μm and -6 dB lateral resolution was 30 μm. (c) A enlarged
wire phantom image using PANAMETRICS (40 dB gain) (d) A wire phantom image
based on 100 MHz BiCMOS preamplifier.

Lateral [mm]
Axial [mm]
Panametrics 38dB Gain
0.1 0.2 0.3 0.4 0.5 0.6
0.1
0.2
0.3
0.4
0.5
0.6
Lateral [mm]
A xial [m m ]
BICMOS
0.1 0.2 0.3 0.4 0.5 0.6
0.1
0.2
0.3
0.4
0.5
0.6
76

(a) (b)

(c) (d)
Figure 3.17: (a) A wire phantom image using PANAMETRICS (38 dB gain). The -6 dB
axial resolution was 14 μm and -6 dB lateral resolution was 23 μm. (b) A wire phantom
image using designed front-end system based on 100 MHz CMOS preamplifier. The -6
dB axial resolution was 13 μm and -6 dB lateral resolution was 21 μm. (c) A enlarged
wire phantom images using PANAMETRICS (30 dB gain) (d) A wire phantom image
based on 100 MHz CMOS preamplifier. From (c) and (d) of the Figure 3.16 and 3.17, the
6 μm wire phantoms are positioned in the left side and one of three 20 μm wire phantoms
are in the right side of the images.

Lateral [mm]
Axial [mm]
Panametrics 40dB Gain
0.1 0.2 0.3 0.4 0.5 0.6
0.1
0.2
0.3
0.4
0.5
0.6
Lateral [mm]
Axial [mm]
CMOS
0.1 0.2 0.3 0.4 0.5 0.6
0.1
0.2
0.3
0.4
0.5
0.6
77

(a) (b)

(c) (d)

(e) (f)

(g) (h)
Figure 3.18: The axial and lateral resolutions of PANAMETRICS 5900PR and front-end
circuits. (a) Axial resolution of PANAMETRIC 5900PR with 40 dB gain. (b) Axial
resolution of designed front-end system based on 100MHz BiCMOS preamplifier. (c)
Lateral resolution of PANAMETRIC 5900PR with 40 dB gain. (d) Lateral resolution of
designed front-end system based on 100 MHz BiCMOS preamplifier. (e) Axial resolution
of PANAMETRIC 5900PR with 38 dB gain. (f) Axial resolution of designed front-end
system based on 100 MHz CMOS preamplifier. (g) Lateral resolution of PANAMETRIC
5900PR with 38 dB gain. (h) Lateral resolution of designed front-end system based on
100 MHz CMOS preamplifier.
1.5 2 2.5
-40
-30
-20
-10
0
R e la tiv e M a g n itu d e [d B ]
Axial distance (Depth) [mm]
1.5 2 2.5
-40
-30
-20
-10
0
R e la tive M a g n itu d e [d B ]
Axial distance (Depth) [mm]
2.8 3 3.2
-40
-30
-20
-10
0
R e la tiv e M a g n itu d e [d B ]
Lateral distance [mm]
2.8 3 3.2
-40
-30
-20
-10
0
R e la tive M a g n itu d e [d B ]
Lateral distance [mm]
1.5 2 2.5
-40
-30
-20
-10
0
R elative M agnitude [dB ]
Axial distance (Depth) [mm]
1.5 2 2.5
-40
-30
-20
-10
0
R elative M agnitude [dB ]
Axial distance (Depth) [mm]
2.8 3 3.2
-40
-30
-20
-10
0
R elative M agnitude [dB]
Lateral distance [mm]
2.8 3 3.2
-40
-30
-20
-10
0
R elative M agnitude [dB]
Lateral distance [mm]
78

The images in both columns showed the comparison of the axial and lateral
resolutions between PANAMETRICS 5900PR and the front-end circuits. The axial and
lateral resolutions of the front-end circuits based on the BiCMOS and CMOS
preamplifier showed better SNR (Signal-To-Noise Ratio) than the PANAMTERICS
5900PR in Figure 3.18. The – 6 dB axial and lateral resolutions of the front-end circuits
based on the BiCMOS preamplifier were 14 and 30 μm with 35 dB SNR in Figure 3.16
(b) and (d). The -6 dB axial and lateral resolutions of the front-end circuits based on the
CMOS preamplifier were 13 and 21 μm with 35 dB SNR in Figure 3.17 (b) and (d). The -
6dB axial and lateral resolutions of the PANAMETRICS 5900PR with a 40dB and a
38dB gain were 14 and 23 μm with 32 dB SNR at 38 dB gain and 30 dB SNR at 40 dB
gain in Figure 3.16 and 3.17 (a) & (c). Therefore, the axial and lateral resolutions of the
front-end circuits based on the both CMOS and BiCMOS preamplifier were comparable
to those obtained with PANAMETRICS 5900PR. The data of the axial and lateral
resolution were summarized in Table 3.7.
Table 3.7: Comparison data of -6dB axial and lateral resolution.
PANAMETRICS
5900PR with 40dB
gain
Front-end
circuits based
on the
BiCMOS
preamplifier
PANAMETRICS
5900PR with 38dB
gain
Front-end circuits
based on the
CMOS
preamplifier
-6dB axial
resolution
14 μm 14 μm 14 μm 13 μm
-6dB lateral
resolution
23 μm 30 μm 23 μm 21 μm

3.4. Pulse-Echo Res
The pulse-echo response
80 MHz thick film PZT array element
transducer fabricated in the
was used to test the front
setting for the measurement
Figure 3.19: Photo of thick film PZT array element transducer.

Echo Responses for a Thick Film PZT Array Element
responses showed the performance of designed front-
PZT array element transducer. This 80 MHz single element thi
the Ultrasonic Transducer Resource Center (Benpeng Zhu, 2008
front-end circuit consisting of a BiCMOS preamplifier
etting for the measurement was the same in Figure 3.13.

Photo of thick film PZT array element transducer.

79
PZT Array Element Transducer
-end circuits with
MHz single element thick film
Benpeng Zhu, 2008)
consisting of a BiCMOS preamplifier and filter. The
80

(a) (b)

(c)
Figure 3.20: The pulse-echo responses of thick film transducer. (a) Its center frequency of
the transducer was 85.66 MHz, its -6dB bandwidth was 62.60% and the received peak-to-
peak voltage was 75.35mV . (b) The pulse-echo response of thick film transducer using
designed front-end circuits. Its center frequency of the transducer was 85.83 MHz and its
-6 dB bandwidth was 65.18% and the received peak-to-peak voltage was 2307.1mV . (c)
The pulse-echo response using matching network with 300 Ω impedance of the
transducer. Its center frequency of the transducer was 87.62 MHz, its -6 dB bandwidth
was 58.75% and the received peak-to-peak voltage was 2304mV .

The electrical impedance data of this transducer was not achieved due to the long
wire cable directly connected from the transducer and the wire-phantom image could not
be obtained either because the PZT thick film transducer is so thin.

81

The pulse-echo responses of the designed front-end preamplifier and filter also
showed good performances because the center frequency and the bandwidth of the
transducer are not changed significantly. In Figure 3.20 (b), there are more ripples
compared with the original signals partially caused by the impedance mismatch between
the transducer (300 Ω) and the input impedance of the integrated preamplifier (about 50
Ω). By increasing the values of the matching inductor from 200nH to 620nH can lower
ring down in the echo signals, thus showing smother spectrum. Therefore, the pulse-echo
responses using the front-end circuits also showed comparable performances.

3.5. Integrated Preamplifier Chip Layout
The BiCMOS and CMOS preamplifiers were designed using the IBM 0.18 μm SiGe
BiCMOS 7WL process from MOSIS. The IBM 7WL technology offers the 1.8V , 2.5V
and 3.3V supply voltage and high f
t
(60GHz). The design sizes were limited to 4μm
2
by
MOSIS research educational program. Therefore, eight numbers of designed
preamplifiers needs to be implemented in the wafer die without any passive components
such as capacitors and inductors except the electrostatic protection diodes.
The matching was one of the important factors to be considered in the preamplifier
layout. The transistor matching can be enhanced by large length size of the transistor
(Gray et al 2001). It can reduce the problem by lateral diffusion (Gray et al 2001; Hasting
2005). The mismatched circumstances are usually dominated by gradient effects,
compensating this effect by multiple gate fingers (Gray et al 2001; Hasting 2005).
Therefore, MOSFET and HBT devices are implemented to have multiple fingers to
82

decrease the gradient effect and increase the voltage gain (Floyd et al 2004; Chen et al
2004). After the multiple simulations, MOSFET and HBT devices had two fingers for the
optimal performances.
Another important issue in the layout design is the noise. A high PSSR can reject the
noise from the power supply (Hasting 2005). The PSSR is high at the frequency where
the high gain of the amplifier can be achieved. Unfortunately, a differential type of
preamplifier has a higher PSSR than a single-side preamplifier has. The separate pins for
analog pads for power/ground lines can reduce the noise from the power supply. Noise
source reduction from substrate coupling is also needed for the layout design. Therefore,
shielding rings like substrate rings were used to reduce the substrate noise (Hasting 2005).
The layout plan in Figure 3.21 showed several preamplifier blocks and ESD
protection diodes. The connection between ESD devices and PADS should be as short as
possible in order to reduce the parasitic capacitances. The highest metal lines were
circulated in the periphery of the preamplifier and 40 pads on the top were shown as the
inputs, outputs, the supply voltage, ground and each external inductor points. All input &
output pins were connected to electrostatic discharge (ESD) protected hyperabrupt
varactor diodes because of the high voltage environment for inherent ultrasonic
transducer (IBM Microelectronics Division 2002). These implemented preamplifiers
were packaged in 40 pin dual in package (DIP).The top package layout connection and
microphotograph of the proposed chip were shown in the Figure 3.21 and 3.22.
83

Figure 3.21: (a) top-level layout connection for 8 numbers of preamplifier in
DIP40 Package (left) and (b) microphotograph of the preamplifier chip by optical
microscope (right).

Figure 3.22: Off-chip components with preamplifiers in a DIP40 package.

84

3.6. Summary of Preamplifier and Comparison with Other Preamplifiers for
Ultrasonic Transducer and Its Application
First of all, the performances such as the number of channel, the size, the noise, the
voltage gain, the bandwidth and the cost, or applications like Doppler processing or
portable machines would be considered to choose the fabrication process. The CMOS
process was usually chosen for low cost and low power, and the BiCMOS process was
preferable for low noise, wide bandwidth and high gain. Therefore, the industries which
are developing portable ultrasound machines have used the BiCMOS process for optimal
performances.
This research was aimed to develop the multi-channel front-end circuits consisting of
an integrated preamplifiers and the Sallen-Key Butterworth filters for the high frequency
ultrasonic transducers. The integrated preamplifiers were fabricated using the IBM
BiCMOS 7WL process. Each one of the selected preamplifiers with a Sallen-Key
Butterworth low pass filter was measured and tested with a high frequency ultrasonic
transducer to obtain proper pulse-echo responses and wire phantom images.
The designed BiCMOS preamplifier was theoretically and empirically better when
compared with the designed CMOS preamplifier for ultrasonic transducers and it was
suitable for high frequency transducers due to the architecture of the design because the
preamplifier’s center frequency, input impedance and bandwidth can be tunable by
selected off-chip components and the equivalent capacitances of the hyperabrupt
varactors. Matching network of this BiCMOS integrated preamplifier can be matched
with the complex impedances of the ultrasonic transducer. The measured pulse-echo
85

responses and wire-phantom imaging data with high frequency ultrasonic transducers has
proven the feasibility of the front-end circuits for the ultrasonic receiver.
For best performance, the system level’s simulation is also considered. In fact, the
simulation of the front-end circuits with transducer, power amplifier and beamformer is
not possible because every company uses their own simulation tools to predict the
performances.
The transceiver which is target to the mobile ultrasound application for array type
high frequency ultrasonic transducer requires low DC power consumption. From the
design level, the engineer needs to consider the power consumption. The preamplifiers
which have resonant-tank load circuit prefer to reduce the power consumption without
additional band-pass filter. Therefore, the BiCMOS integrated preamplifier and Sallen-
Key Butterworth filter is alternative choice for the low power consumption because the
integrated preamplifier can improve the gain and bandwidth using inductors, capacitors
and lower values of resistors.

86

Table 3.8: Comparison data with other preamplifiers for ultrasonic transducer.
Paper Process Size
(μm)
Gain
(dB)
BW
(MHz)
Freq
(MHz)
Power
(mw)
NF or
Input-
referred
noise
Target
application
Chebli 2002 CMOS 0.35 100 0.0009 3.5 3.4 7.7nV
/√Hz
Transducer
Noble 2003 CMOS ------- 22 6.5 10 --------- 9.4nV/
√Hz
CMUT
Lay 2005 CMOS 0.35 12 32 20 20 6.3nV/
√Hz
Ultrasound
probe
Cicek 2005 CMOS 0.8 23 1.5 2 2 6.45nV/
√Hz
CMUT
Peng 2006 CMOS 0.5 ----- --------- 3 0.12 ----------- CMUT
Morizio
2003
CMOS 0.5 14 7 3 600
~1050
----------- RT3DU
transducer
Cenkeramad
di 2009
CMOS 0.09 18.9 15~ 45 30 0.598 ----------- CMUT
Wygant
2009
DMOS ------ 40 25 -------- 150 ----------- CMUT
Wygant
2008
CMOS ------ 40 10 -------- 4 ----------- CMUT
Kim 2009 CMOS 0.35 5~20 >75 -------- --------- 10dB Piezoelectric
MEMS
transducer
AD8044
(Analog
Devices)
Bi-
CMOS
------ 13.9 100 --------- 39.3 16nV/
√Hz
Ultrasound
equipment
OPA846
(Texas
Instrument)
Bi-
CMOS
------ 20 250 150 124.6 1.2nV
/√Hz
---------------
This 2010 Bi-
CMOS
0.18 10.5~
25. 8
40~82 60~100 8.58~
49.53
2.9~
7.73dB
Piezo-
electric
transducer
*Note: The input referred noise of AD8044 and OPA846 would be increased with
resistive feedback loop. BW and Freq denote the bandwidth and center frequency.

87

The table 3.8 shows the developed integrated preamplifiers for ultrasonic transducer
or ultrasound applications. For CMUT applications or commercial ultrasound analog
front-end circuits, the operational amplifier based preamplifiers without impedance
matching circuits were used. The designed preamplifier uses fewer transistors and lower
values of resistances than the operational amplifier based preamplifier, thus generating
lower noise figure (2.9 dB) and smaller power consumption (49.53 mW) than the
operational amplifier based preamplifier such as 150 mW power consumption (Wygant,
2009), 10 dB noise figure(Kim, 2009). It also has more freedom in choosing the
resonance of the center frequency because the center frequency can be determined by off-
chip inductors and capacitors rather than by the transistors and feedback loop resistors in
the operational-amplifier-based topology. The designed preamplifier must use inductors
and capacitors for matching electrical impedance and improved voltage gain causing the
size of the chip to be larger than operational amplifier based preamplifiers if the operating
frequency of the preamplifier is relatively low. Therefore, this designed preamplifier
could be more desirable if the operating frequency of the devices is a few hundred MHz
to allow integration without external inductors because the inductance values of the
resonant tank and impedance matching circuits are low, thus reducing the spaces in the
chip. If the operating frequency of the transducer is low, active inductor design using
transistors is also alternative way to replace the off-chip passive inductor (Leifso, 2001:
Yang 2011). The drawback is that the active inductor may deteriorate the noise
performances of the preamplifier, while reducing the chip spaces.

88

CHAPTER 4: NOVEL BIPOLAR-TRANSISTOR-BASED LIMITERS
FOR HIGH FREQUENCY ULTRASOUND IMAGIGNG SYSTEM

4.1. Introduction on to Protection Devices for Ultrasonic Transducer
Compared with low-frequency ultrasound imaging systems, the high-frequency
imaging systems are not only dramatically affected by the electrical impedance mismatch
between the transducer and the electronics but the attenuation caused by passive
components, such as the ultrasound transmitter/receiver and their protection devices
(Lockwood et al 1991). These protection devices are used to protect the front-end circuits
from the unexpected voltage spikes induced by a transmitter. As frequency increases;
however, the performance of these devices also decreases (Nondestructive Testing Center
2001; Lee 2004; Fuller et al 2007; Chaggares et al 1999). Therefore, to optimize the
performances of a high frequency imaging system, there is a need to improve the design
and fabrication of these limiter circuits (Lockwood et al 1991; Poulsen 2002). Figure 4.1
shows the schematic of conventional two-way pulse-echo test architecture with protection
circuits.

Figure 4.1: Block diagram of the ultrasound protection circuit.
Transducer
Limiter Preamplifier Expander Pulser
89

4.2. Description of Novel Bipolar-Transistor-Based Limiter Design
For high frequency applications, the limiter should have a high breakdown voltage, a
low output capacitance and a wide transition frequency. These characteristics in general
decrease as the frequency increases. To overcome this shortcoming, especially for the
high-frequency ultrasound imaging, we propose new limiter designs utilizing bipolar
power transistors. These bipolar transistor devices are NPN and PNP silicon bipolar power
transistors that can provide lower on-state impedances and higher breakdown voltage. A
similar scheme had been used to protect the chip from the electrostatic discharge (ESD)
phenomenon (Jung 2002; Voldman et al 2002); however, here these new limiters were
used to protect the high voltage spikes from a pulser/transmitter, and they also reduce the
attenuation on the end of the high-frequency ultrasound receiver. The functions of the
bipolar-transistor-based and the traditional diode-based limiters are similar; for positive
high voltage signal from a pulser, the discharged current passes through NPN power
transistors to ground. For negative high voltage signal, the current passes through PNP
power transistors to ground.
These limiters circuits (A and B) were designed in different configurations with
bipolar power transistors. Limiter A has both base-emitter-coupling bipolar power
transistors; and limiter B has a base-emitter-coupling two NPN and one PNP base-emitter
coupling bipolar power transistors.
These novel limiters all have a resistor, NPN, and PNP bipolar power transistors
(ZTX453 and ZTX 553, Diodes Incorporated, Dallas, Texas, USA) but in different
configurations. The electrical impedance and power rating of the resistor used here are 50
90

Ω and 5 W. Limiter A has unequal currents of the NPN and PNP bipolar power transistor.
In this way, the response time of the NPN bipolar power transistor is shorter than the PNP
bipolar power transistor (Linder 2006). For limiter B, one more NPN bipolar power
transistor was added on the set of NPN and PNP transistors of limiter A to reduce their
mismatched response time. These new limiters promise to provide better performances, at
high frequencies, than that of the diode-based limiters. Different architectures of the
limiters are shown in Figure 4.2. The analysis of their current consumption, total harmonic
distortions (THD), and noise figures are addressed in next section.

Figure 4.2: The schematic diagrams of the bipolar-transistor-based limiter circuits.

4.3. Circuit Analysis of Novel Bipolar-Transistors-Based Limiter
In order to analyze the behaviors of these limiters, bipolar power transistors, instead
of Pin diodes used in the traditional diode-based limiters, are used in limiter A circuit but
in different configurations. Unlike the others, limiter B has different configuration which
is meant to reduce the unwanted effects that appear in limiter A circuit. As the frequency
increases; however, the parasitic capacitances of the bipolar power transistors also make
their performances deteriorate.
Limiter B
R
Limiter A
R
PNP
NPN
NPN
PNP
NPN
91

To approximate the behaviors of these bipolar-transistor-based limiters, we used a
high-frequency small signal model. Figure.4.3 shows the schematic diagram of the high
frequency small models with direct connections between the emitter, collector or base of
the bipolar transistors to analysis the -3 dB bandwidth of the new limiters.

Figure 4.3: (a) the high frequency small signal model of the bipolar power transistor (b)
the high frequency limiter A small signal model, (c) the high frequency limiter B small
signal model.

The -3dB bandwidth of the limiter circuits (f
-3dB
) is mainly dependent on the base-
emitter resistance (r
π
), output resistance (r
o
),

base-collector capacitance (C
u
) and base-
emitter capacitance (C
π
) with preceding resistor (R). Using these high-frequency small
signal models above, the -3 dB bandwidth in the magnitude vs. frequency responses of
limiter A was obtained. The -3 dB bandwidths of the limiters were found to mainly
depend on the internal parasitic resistances and capacitances with the preceding resistor
(R), which are expressed in equation (4.1).

V
b
r
b
r
¥ ð
C¥ ð
C
u
g
m
V
¥ ð
r
o
C
E
B
V
¥ ð
+
-
(a)
Limiter A
R
IN
OUT
C
Un
r
On
r
Op
C
Up
R
IN
OUT
C
Un
r
On C
¥ ðp
C
Un
r
On
r
¥ ðp
C
up
r
Op
Limiter B
(b) (C)
92

1
f 2 (R / /r / /r ) (C C )
3dB, Limiter A on op un up
−
 
= π⋅ ⋅ +
  −
 

(4.1)

where r
on
is the output resistance of NPN transistor, r
op
is the output resistance of PNP
transistor, w is operating frequency, C
πp
is the base-emitter capacitances of PNP transistor,
C
un
is the base-collector capacitances of NPN transistor, and C
up
is the base-collector
capacitances of PNP transistor.
The -3 dB bandwidth of limiter B is also analyzed. The base-emitter resistance (r
bp
) of
the bipolar transistor of limiter B can be ignored to simplify the analysis. The small signal
high frequency model for equivalent impedance (Z
Lim
) of the NPN and PNP transistors is
shown in Figure 4.4.

Figure 4.4: The high frequency small signal models of the limiter B.

The total impedance of Limiter B is the preceding resistor parallel (R) with equivalent
impedances of NPN and PNP transistors (Z
Lim
). First, the output resistance of PNP
resistance (r
op
) is excluded from the equivalent impedances of the PNP transistor in order
to simplify the calculation as shown in Figure 4.5. The equivalent impedances of the
Limiter B can be expressed as

R
IN
OUT
C
Un
r
On
C
¥ ðp
C
Un
r
On
r
¥ ðp
Cu
p
r
Op
r
bp
R
IN
OUT
C
Un
r
On
C
¥ ðp
C
Un
r
On
r
¥ ðp
Cu
p
r
Op
Z
Lim
Z
in
93

op 2 Lim 1 Lim Lim in
r // Z // Z // R Z // R Z = =
(4.2)
where Z
Lim1
is the equivalent impedance of two NPN transistors, r
op
is the output
resistance of PNP transistor ,and Z
Lim2
is the equivalent impedance of one PNP transistor
except output resistance (r
op
).

Figure 4.5: The equivalent impedance models of NPN and PNP transistors of limiter B.

The equivalent impedance of two NPN transistors is given by

)
C w r
w C r 2
(
jw
1
)
C w r
r 2
(
jwC
r
1
2
Z
un
2
on
un on
un
2
on
2
on
un
op
1 Lim
−
+
−
=
+
=

(4.3)
The equivalent impedances of two NPN transistors can be further expressed with the
equivalent resistance and capacitance as shown in the equation (4.4)

1 Lim
1 Lim 1 Lim
jwC
1
R Z + =

(4.4)
Therefore, the real equivalent resistance and imaginary equivalent capacitance of
two NPN transistors can be expressed in equation (4.5) by comparing equation
(4.3) with equation (4.4).

R
OUT
C
Un
r
On
C
¥ ðp
C
Un
r
On
r
¥ ðp
Cu
p
r
Op
Z
Lim1
Z
Lim2
IN
94

un
2
on
2
on
1 Lim
C w r
r 2
R
−
=
w C r 2
C w r
C
un on
un
2
on
1 Lim
−
=
(4.5)
The equivalent impedance of PNP transistors can also be expressed in equation (4.6).
Real and imaginary part of the equivalent impedances can be obtained from equation
(4.7).









−
+ −
−
−
+ +
=
+
+
=
π π
π π π
π π
π π π
π
π
2
up
2
p p
3
p up
2
p p up
2
up
2
p p
2
p up up p p up
up
p
p
2 Lim
wC r C w
) C C ( r C C
w
1
j
C r C w
) C C ( C r r C
jwC
1
jwC
r
1
1
Z

(4.6)
(4.7)
where r
πp
is the base-emitter resistance of the PNP transistor.
The equivalent impedances of PNP transistors can also be expressed with the
equivalent resistance and capacitance as shown below by comparing equation (4.7) and
(4.8).
2 Lim
2 Lim 2 Lim
jwC
1
R Z + =

(4.8)
Therefore, the real equivalent resistance and imaginary equivalent capacitance of one
PNP transistor can be obtained in the equation (4.9)
2
up
2
p p
2
p up up p p up
2 Lim
C r C w
) C C ( C r r C
R
−
+ +
=
π π
π π π

) C C ( r C C
wC r C w
C
p up
2
p p up
2
up
2
p p
3
2 Lim
π π π
π π
+ −
−
=
(4.9)
In order to obtain -3 dB bandwidth of limiter B, the equivalent resistances and
capacitances would be expressed as

1
3dB,Limiter B Lim1 Lim2 op Lim1 Lim2
f 2 (R / /R / /R / /r ) (C C )
−
−
  = π⋅ ⋅ +
 

(4.10)
95

Plugging into the equations (4.5) and (4.9) into the equation (4.10), the -3 dB bandwidth
of the Limiter B can be finally expressed in equation (4.11)
1
2
2
2 2 2 2
3 2 2
2
2
r (C C C C )
2r
p up up p p
on
2 R / /r / / / /
op
r w C w C r C
on un p p up
f
3dB, Limiter B
w C r wC
r w C
p p up
on un
2r C w C C r (C C )
on un up p p up p
−
    + +
π π π
   
π⋅
   
− −
π π
   
=
 
−
  −
−
 
π π
 
⋅ +
 
 
− +
 
π π π
 
 

(4.11)
According to these equations, limiter A should have a smaller bandwidth than that of
limiter B because the -3 dB bandwidth of limiter A is limited by the output resistances (r
on

and r
op
) and two different kinds of the parasitic capacitances (C
un
and C
up
), which are
shown in Figure 4.4. Unlike the limiter A, limiter B, shown in Figure 4.4, was designed to
reduce this undesired effect by adding one more NPN transistor into the set of the NPN
and the PNP transistors of limiter A.
On the other hand, the high-frequency large signal model with the limiter, as shown in
Figure 4.6, can be used to estimate their total harmonic distortions. The current of the
bipolar power transistor (I
c
) is
) V / V exp( I I
T BE S C
= (4.12)
where I
S
is the saturation current which is a constant values, V
BE
is the voltage of base-
emitter, V
T
is the thermal voltage which is 26mV at room temperature.
96

Figure 4.6: (a) the large signal model of the bipolar transistor, (b) the large signal limiter
A model, (c) the large signal limiter B model.

The preceding input resistor (R) of the new limiter is in parallel with the parasitic
impedances of the bipolar transistors; therefore the current consumption (voltage drop
from the input signal path to the ground) of the new limiters depends on the sum of this
resistor and the internal parasitic resistances of the bipolar transistors (Gray et al 2011).
For limiter A, there are two kinds of collector-emitter currents, which are the constant
saturation currents of the NPN (I
Sn
) and the PNP bipolar transistors (I
Sp
), as shown in
Figure 4.6 (b). Compared with limiter A, limiter B was designed to have an improved
performance because the saturation current of the PNP transistor is usually higher than
that of the NPN transistor in limiter A. Therefore, in Figure 4.6 (c), the architecture of
limiter B is capable of reducing the unequal current consumption by adding one more the
NPN transistor into the set of the NPN and PNP transistors in limiter A.

C
E
B
+
-
V
BE
Ic=Is exp(V
BE
/V
T
)
(a)
I
B
R
Is
n
Is
p

Limiter A
Is
n

Limiter B
Is
p
IN OUT
OUT
IN
R
Is
n

(b) (c)
97

We implemented the high-frequency large signal models of limiter A and B, which
are shown in Figure 4.6 (b) and (c), respectively. Since diodes and bipolar power
transistors both are non-linear devices, which produce harmonic signals, total harmonic
distortion measurements of the limiters are required to analyze their nonlinearities. The
total harmonic distortion (THD) produced by a limiter can be calculated by

1
V
2
)
n
V (
2
)
3
V (
2
)
2
V (
Log 20 ) dB ( THD
+ ⋅ ⋅ ⋅ ⋅ +
⋅ =
(4.13)
where V
1
is the amplitude of the fundamental original signal, V
2
and V
3
are the amplitude
of the second and third harmonic signal, V
n
is the amplitude of the nth harmonic signal.
The total noise figure of the system can be expressed by Friis equation (Friis 1994).

1 n
v 2 v 1 v
n
1 v
2
1 total
A A A
) 1 NF (
A
) 1 NF (
NF NF
−
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
−
+ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ +
−
+ =
(4.14)
where NF
total
is the total noise figure of the system, NF
1
, NF
2
and

NF
n
are the noise
figure of the first, second and n-stage amplifier, A
v1
, A
v2
, A
Vn-1
are the voltage gain of the
first, second and n-1 stage amplifier.
The noise figure is an important index for evaluating the noise performance of a
common passive device, such as a limiter because the first noise figure term (NF
1
) can
primarily affect the whole noise figure (NF
total
) if the gain or the loss is large enough. The
noise figure of the passive devices can be represented as the power loss (Razavi 2003).
Therefore, the total noise figure of a limiter circuit followed by a preamplifier (AU-1114,
MITEQ, Hauppauge, NY, USA) is given by
98

total Pr eamp
(NF -1)
Pr eamp
NF NF L (NF -1) L
Limiter -1
L
= + = + ⋅

total preamp
NF L NF = ⋅
(4.15)
where NF
total
is the total noise figure of the limiter circuit and preamplifier, NF
Limiter
is the
noise figure of the limiter circuit, L is the power loss of the limiter circuit, NF
Preamp
is the
noise figure of the preamplifier.
Due to the fact that the noise figure of the passive device (NF
Limiter
) is equal to its
loss (L) (Friis 1994, Razavi 2003) and NF
Preamp
is a fixed value, it is possible to verify
how much the loss of the limiter would affect the total noise figure of the ultrasound
receiver (NF
total
).

4.4. Experimental Results of the Limiters
The new bipolar-transistor-based limiters were analyzed in terms of the magnitude vs.
time, magnitude vs. frequency responses, total harmonic distortion and total noise figures
using the small signal and large signal bipolar transistor models. In addition, a typical
pulse-echo measurement was carried out to evaluate the performance of these limiters.

4.4.1. Limiter Evaluation
At high frequencies, transducers become more sensitive to electrical impedance
mismatch between electronics and transducers. Besides, as frequency increases, the
attenuation caused by receiving electronics is also increased. To minimize the attenuation
caused by these factors, the lengths of coaxial cables should be a quarter wavelength
99

(Cannata et al 2006; McKeighen 1998). Therefore, if the operating frequency of the
transducer is 100MHz, the ideal coaxial cable length should be kept at 52.5 cm. Such a
coaxial cable was used in the following evaluations to connect the limiter with the
100MHz transducer in order to minimize the attenuation. The following paragraph
describes the methods to evaluate the electrical performances of the limiters for high
frequency ultrasound systems and transducers.
To assess the responses and behaviors of these limiters, we measured their magnitude
vs. frequency responses. A continuous sine wave from a function generator (SG384,
Stanford Research Systems, Sunnyvale, CA, USA) was used to drive a commercial diode
limiter (DL-1, Matec Instruments, Northborough, MA, USA) and these bipolar-power-
transistor-based limiters. The magnitudes of these signals were then recorded using an
oscilloscope (LC534, Lecroy, Chestnut Ridge, NY , USA). Dividing the magnitude of the
signal by its original magnitude (without a limiter) is the magnitude vs. frequency
responses of this limiter.
The magnitude vs. frequency responses of the limiters were shown in Figure. 4.7 (a)
and (b). To analyze the attenuation and the bandwidths of the limiters as the input voltage
increases, 50 mV and 1 V sine continuous waveforms from the function generator were
chosen as test signals. Using 50 mV

test signals, the frequency-dependent magnitude of
limiter B, from 10 MHz to 120 MHz, was higher than that of the commercial limiter;
however, after 120 MHz, the magnitude of the limiter B was lower than that of the
commercial limiter. In contrast, after 30 MHz, the magnitude of limiter A was lower than
that of the commercial limiter. On the other hand, using 1 V test signal, from 1 MHz and
100

100 MHz, the magnitudes of limiter A and B were higher than that of the commercial
limiter; however after 110 MHz the magnitudes of limiter A and B gradually decreased
and were lower than that of the commercial limiter. This is because that the internal
parasitic impedances of the bipolar transistors make these new limiters more sensitive to
the frequency. For example, in Figure 4.7 (a), at 100 MHz the measured magnitude of
limiter B (-4.7 dB) is higher than those of limiter A (-6.1 dB) and the commercial diode
limiter (-5.0 dB). It can be seen that the magnitude of limiter A dropped more than that of
limiter B because the two different parasitic capacitances (C
un
≠ C
up
) of the NPN and
PNP transistors.
The -3 dB bandwidths of the magnitude vs. frequency responses were measured in
the range of the frequencies over which the output amplitude for a given input amplitude
for the limiter drops to 3 dB down from the maximum gain of the magnitude vs.
frequency response. With 50 mV input signal, the measured -3 dB bandwidths of limiter
A and B were 105 and 135 MHz, respectively. These values are smaller than the
commercial diode limiters (147 MHz) since internal bandwidths of the bipolar-power-
transistors are quite limited. For 1 V test signal, the measured -3 dB bandwidths of limiter
A and B decreased to 103 and 116 MHz, respectively, however, that of commercial
limiter increased abruptly to 451 MHz. Since the wider bandwidth of a limiter increases
its harmonic distortion (S. Pemici et al 1993), for high voltage operation the commercial
limiter has higher signal distortion.
101

(a) (b)
Figure 4.7: (a) the magnitude vs. frequency responses of the limiters using 50 mV sine
wave input signals, (b) the magnitude vs. frequency responses of the limiters using 1 V
sine wave input signals.

The total harmonic distortions of the limiters were measured to obtain their non-
linear characteristics. From the function generator, a one-tone sine wave was sent through
each of these limiters; and, at the output of the limiters, the magnitudes of the
fundamental and harmonic signals were recorded using the oscilloscope. After that, the
total harmonic distortions of the limiters were calculated using the equation. (4.13).
Figure 4.8 (a) and (b) shows the THD data of all limiters using 50 mV and 1 V test
signals. For the 50 mV

test signal, after 10 MHz the THD of limiter B was lower than that
of the commercial limiter. After 30 MHz the THD of limiter A was a little bit lower than
that of commercial limiter. For 1 V test signal, as the input frequency increased up to 120
MHz, the THD of limiter B gradually increased; but was still substantially lower than that
of the commercial limiter. In Figure 4.8 (c), for instance, limiter B had the lowest THD (-
74.5 dB at 100 MHz) because the architecture of limiter B also reduced the unequal
current consumption.
0 20 40 60 80 100 120 140 160
-10
-8
-6
-4
-2
0
Amplitude (dB)
Frequency(MHz)
Limiter A
Limiter B
Commercial Limiter
0 20 40 60 80 100 120 140 160
-10
-8
-6
-4
-2
0
Frequency(MHz)
Amplitude(dB)
Limiter A
Limiter B
Commercial Limiter
102

The THD of the limiters vs. the amplitude of test signals is shown in Figure 4.8 (c).
As the input test voltage increased, especially after 0.6 V , the THD difference between the
bipolar-transistor-based limiters and the commercial diode limiter also increased. In a
typical pulse-echo measurement with expanders and limiters, high voltage pulses exciting
a high frequency transducer can be sent through the limiters and they may mask lower
reflected or backscattered echo signals from targets of interest. Therefore, in order not to
interfere these echo signals, less distortion in high voltage operation by the limiters is
desired. Figure 4.8 (c) shows that the bipolar-transistor-based limiters exhibit less
distortion at higher test voltages.
103

(a) (b)

(c)
Figure 4.8: (a) the THD of the limiters using 50 mV test signals, (b) the THD of the
limiters using 1 V test signals, (c) the THD of the limiters vs. the amplitude of the test
signals.

To estimate the effect of each of the limiters on the preamplifier, the total noise
figure was calculated using the equation (4.15) with the following measured results. The
loss data of the limiters were obtained from the magnitude vs. frequency response in
Figure 4.7 (a) and (b), and the pre-determined value of the noise figure of the
preamplifier (NF
Preamp
) was obtained from the datasheet (MITEQ 2010).

0 20 40 60 80 100 120
-90
-80
-70
-60
Frequency (MHz)
Total Harmonic Distortion (dB)
Limiter-A
Limiter-B
Commercial Limiter
0 20 40 60 80 100 120
-80
-70
-60
-50
-40
Total Harmonic Distortion (dB)
Frequency(MHz)
Limiter A
Limiter B
Commercial Limiter
0.0 0.2 0.4 0.6 0.8 1.0
-100
-90
-80
-70
-60
-50
-40
Total Harmonic Distortion (dB)
Input (V)
Limiter A
Limiter B
Commercial Limiter
104

In Figure 4.9 (a) and (b), frequency dependence of the total noise figures of the
limiters and the preamplifier are shown. The total noise figures are the sum of the noise
figure of the limiter and that of the preamplifier. Since the noise figure of the preamplifier
is 1 to 2 dB between 10 MHz and 120 MHz (MITEQ 2010), the total noise figures were
mainly affected by the noise figures of the limiters. For 50 mV input signals, the total
noise figure with limiter B (5.7 dB) is lower than those of limiter A (7.1 dB) and
commercial limiter (6.0 dB) at 100MHz. After 30 MHz, the total noise figures of limiter A
became worse than that of the commercial diode-limiter. Besides, for 1 V test signals, at
100 MHz the total noise figure with the limiter B (6.3 dB) is lower than those of limiter A
(7.0 dB) and the commercial diode limiter (7.2 dB). However, after 110 MHz, the total
noise figures of limiter A and B both became worse than that of the commercial diode-
limiter. Since the noise figures were obtained from their magnitude vs. frequency
responses, as the frequency increases the total noise figures also degrade.

(a) (b)
Figure 4.9: (a) the total noise figures of limiters and a preamplifier using 50 mV test
signals, (b) the total noise figures of the limiters and a preamplifier using 1 V test signals.

0 20 40 60 80 100 120
4
5
6
7
8
9
10
Frequency(MHz)
Totla Noise Figure(dB)
Limiter A
Limiter B
Commercial Limiter
0 20 40 60 80 100 120
4
5
6
7
8
9
10
Frequency (MHz)
Total Noise Figure(dB)
Limiter A
Limiter B
Commercial Limiter
105

To evaluate the transient responses of these limiters, their response times were
obtained from the time of the suppressed output signals in reacting to the input signals
until the time required the output to approach to the 1% point of the final outputs. A
100MHz pulse wave with minimum rise/fall time (2.5 ns) from the function generator
(AFG3251, Tektronix, Beaverton, OR) was used to drive RF power amplifier (325LA,
Electronics & Innovation, Rochester, NY). Next, the high voltage output signals of the
power amplifier were sent through each limiter and the output waveforms were recorded
using an oscilloscope at 1 MΩ load setting.
At very high operating frequencies, if the distances between the transducer and the
targets are short, the transmitted discharged pulses may interfere the received echo
signals. Therefore, the limiter needs a quick recovery time to avoid the echo signal
distortion. Otherwise, the transducers need to be placed at an enough distance from the
targets. The high voltage input signals and their discharged output signals of the limiters
are shown in Fig. 4.10 (a), (b), (c), and (d). The suppressed output waveforms at 1 MΩ
load setting in the oscilloscope were used to measure the response time. Using 100 MHz
and 50 V positive pulse signal, the response time of the suppressed output signals of
limiter A, B and commercial limiter are 41, 38 and 50 ns, respectively. Using 100 MHz
and 50 V negative pulse signal, the response times of limiter A, B and commercial limiter
are 42, 39 and 55 ns, respectively. Clearly, among these limiters, Limiter B has the fastest
response time (38-39 ns).

106

(a) (b)

(c) (d)
Figure 4.10: (a) a original 100 MHz and 50 V positive uni-polar pulse, (b) the output
suppressed signals of the limiters when one cycle 100 MHz and 50V uni-polar positive
pulses were applied, (c) a original 100 MHz and 50 V uni-polar negative pulse, (d) the
output suppressed signals of the limiters when 100 MHz and 50 V negative uni-polar
pulses were applied.

The electrical impedances of all limiters were also measured with an impedance
analyzer (HP 4294A, Agilent Technologies, Santa Clara, CA). After that, the magnitude
and phase vs. frequency was plotted to analyze the impedance mismatch between the
high frequency transducer and receiving electronics because the electrical impedance
matching is more crucial for high frequency ultrasound system.
0.06 0.09 0.12 0.15
0
10
20
30
40
50
Time (us)
Amplitude (V)
Original 100M Hz 50V signal
0.06 0.09 0.12 0.15
0
2
Time(us)
Amplitude(V)
Limiter-A
Limiter-B
Commercial Limiter
0.06 0.09 0.12 0.15
-50
-40
-30
-20
-10
0
Amplitude(V)
Time(us)
Origianl 100MHz 50V signal
0.06 0.09 0.12 0.15
-2
0
Time (us)
Amplitude(V)
Limiter A
Limiter B
Commercial Limiter
107

As the frequency increases, the performances of the electronic components are
limited by parasitic impedances; thus electrical impedance mismatch at high frequencies
becomes quite crucial (Larson 2001). To maximize the energy transfer, it is required to
match to the typical 50 Ω resistance for the next stage electronics such as preamplifiers or
filters (Pozar 1998; Tiebout 2001). As shown in Figure 4.11 (a) and (b), the impedances
of the limiters were plotted vs. frequency. At 100 MHz, the magnitudes of the
impedances of the limiter A, B, and commercial limiter are 50.7, 49.7 and 46.1 Ω,
respectively. These values are quite close to 50 Ω; however, the impedance phase angles
of the limiter A, B, and commercial limiter are -17.3
o
, -28
o
and -62.2
o
,

respectively. The
measured data show that, after 40 MHz, the phase angles of the limiter A and B are lower
than that of the commercial limiter. Therefore, for the limiter A and B, their input
impedance mismatches for the preamplifiers or filters are smaller. This may be able to
increase the efficiency of energy transfer.

(a) (b)
Figure 4.11: (a) the magnitudes of the impedances of all limiters, (b) the phase angles of
the impedances of all limiters.

0 20 40 60 80 100 120
0
50
100
150
200
Magnitude (Ohm)
Frequency (M Hz)
Lim iter A
Lim iter B
Com m ercial Lim iter
0 20 40 60 80 100 120
-100
-80
-60
-40
-20
0
Phase (Degree)
Frequency(M Hz)
Lim iter A
Lim iter B
C om m ercial Lim iter
108

The dynamic DC power consumption of the limiter A, B, and the commercial
limiters were measured. The dynamic DC power consumption of a limiter circuit can be
obtained using the following equation (Camacho 2008)
2
dc p p p
P f T V / R =
(4.16)
where the pulse duration (T
P
), the amplitude of pulser (V
P
), the pulse repetition frequency
(f
P
), and the resistor (R).
The estimated power consumption of the limiter A, B and commercial limiter was
1.77, 1.81 and 1.95 mW. Obviously, these bipolar-power-transistor-based limiters (the
limiter A, B) consumed less power than the commercial limiter. Although, a bipolar
power transistor ($ 1) is usually more expensive than a diode ($ 0.1), the area of bipolar-
transistor-based limiters (two & three transistors) is smaller than that of the commercial
limiter (eight diodes). Therefore, using such bipolar-transistor-based limiters may be
advantageous for miniature ultrasound imaging devices.
Table 4.1 and 4.2 summarized the modeled and measured data of the limiter A, B,
and the commercial limiter at 100MHz. The modeled magnitude vs. frequency responses
of the new limiters were simulated using the P-spice program (Cadence Design Systems,
Inc., San Jose, CA). Using the equations (4.14) and (4.15), the modeled THD and the
total noise figure were also obtained. The modeled and measured data are well matched
within 2 dB mean deviation.

109

Table 4.1: The modeled and measured data of all limiters at 100 MHz when the 50 mV
test signals were applied.
Limiter A Limiter B
Commercial
Limiter
Magnitude Frequency
Response
Modeled -5.8 -4.4 --------------
Measured -6.1 -4.7 -5.0
Total Harmonic
Distortion
Modeled -70.1 -79.4 ---------------
Measured -68.5 -74.5 -66.3
Total Noise Figure
Modeled 6.8 5.4 ---------------
Measured 7.1 5.7 6.0

Table 4.2: The modeled and measured data of all limiters at 100 MHz when the 1 V test
signals were applied.
Limiter A Limiter B
Commercial
Limiter
Magnitude Frequency
Response
Modeled -6.5 -4.4 ---------------
Measured -6.0 -5.3 -6.1
Total Harmonic
Distortion
Modeled -54.5 -70.6 ---------------
Measured -60.5 -69.3 -48.0
Total Noise Figure
Modeled 7.6 5.4 ---------------
Measured 7.0 6.3 7.2
* All values are in dB scales.

4.4.2. Pulse-Echo Responses of the High Frequency Transducers with the Limiters
To compare with the performance of commercial diode limiters, the pulse-echo
responses of the transducers were measured to evaluate the ability of limiter B since it is
the best among these new limiters. Limiter B was connected with a 100MHz single-
element ultrasound transducer previously fabricated by our group because high-frequency
ultrasound transducers typically have lower sensitivity and smaller bandwidth than low-
frequency transducers. The transducer was positioned in a degassed/deionized water bath
opposite a flat quartz reflector. A pulser (AVB2-TE-C, Avtech Electorsystems, Ottawa,
Ontario, Canada) was used to excite this 100MHz single-element transducer along with a
commercial diode expander (DEX-3, Matec Instruments, Northborough, MA, USA).
110

The echoes from the transducer were sent through limiter C and the preamplifier and
then digitized and displayed using an oscilloscope (LC534, LeCroy Corp., Chestnut
Ridge, NY). Using the fast Fourier transform (FFT), the frequency responses of the
echoes were obtained.
To evaluate the capability of limiter B, it was used in the pulse-echo measurement of
the 100MHz ultrasound transducer and the result is shown in Figure 4.12. We used the
limiter to isolate the ultrasound receiver from the harmful high voltage spikes from the
power amplifier; and the preamplifier was used to amplify the weaker echo signals at
higher frequencies. It showed that, using the limiter B and the preamplifier, instead of
using a commercial diode limiter with the same preamplifier, the measured -6 dB
bandwidth had been improved by 6 % and the measured peak-peak voltage of the echo
signal increased as 2.6 times. The echo signal amplitude was significantly increased since
the differences of the magnitude vs. frequency responses at 100 MHz between the limiter
B (-4.7 dB) and the commercial limiter (-5.0 dB) were further magnified through the
preamplifier. Besides, for 50 mV input signal, though the -3 dB bandwidth of the limiter
B was narrower than that of the commercial limiter but still wide enough to cover up to
135 MHz; consequently using the limiter B for the transducers does not appear to
compromise its performance.
111

Figure 4.12: Pulse-echo responses with commercial diode and limiter B for 100MHz
single element ultrasonic transducer.

The bipolar-power-transistors-based limiters, which are designed for high-frequency
ultrasound imaging systems, are shown to have considerable improvements in terms of
higher magnitude vs. frequency response, less total harmonic distortion, and less total
noise figure, but at the price of incurring stronger frequency dependence. These
disadvantages can be readily attributed to the characteristics of the bipolar power
transistors.
The discrete components of the bipolar transistors intrinsically have undesired effects
caused by unmatched parasitic impedances (C
un
≠ C
up
and

R
on
≠ R
op
). Furthermore,
unbalanced amplitudes of the parasitic capacitances of the bipolar transistors also affect
the magnitude frequency response, the total harmonic distortion and the total noise figure.
Since the total harmonic distortion depends on the currents or voltages from the signal
path to the ground of a limiter, the parasitic resistances and capacitances are important
factors that need to be considered.

2.8 2.9
-0.15
-0.10
-0.05
0.00
0.05
0.10
0.15
Spectrum(dB)
Frequency(MHz)
Amplitude(V)
Time(us)
Commercial Limiter
Limiter B
60 80 100 120 140
-24
-18
-12
-6
0
112

Smaller parasitic impedances of the bipolar transistors improve the performance of
the limiters. Therefore, to reduce these undesired effects, chip fabrication process may be
adopted. The space of the device interconnections can be dramatically reduced by directly
attaching limiters to the preamplifier; thus the attenuation between them is reduced. Here
the electrical specification of the bipolar transistors, such as the size, high voltage
capability, and bandwidth should be optimized and the requirement of the limiters
(including total noise figures, sensitivity, response time, and the total harmonic
distortions) need to be carefully considered when designing such a chip.

4.5. Conclusion of Novel Bipolar-Transistor-Based Limiters for High Frequency
Ultrasonic Transducers
We have demonstrated the capability of these novel designs of high-frequency
limiters. Among them, at 100 MHz and 50 mV input test signals, limiter B has the best
performance because of its lowest total harmonic distortion (-74.5 dB) and highest
magnitude vs. frequency response (-4.7 dB). Using this bipolar-power-transistor-based
limiter, the bandwidth and the sensitivity of a high frequency ultrasonic transducer are
shown to be improved. However, the disadvantage of the novel limiters is that their
performances are restricted by their internal parasitic impedances; therefore they are
more sensitive to frequency. The results also show that, although the bandwidth of limiter
B is not as wide as that of the diode limiters, it is still wide enough to cover up to
100MHz. These new limiters may have applications for the high-frequency ultrasound
imaging where both low harmonic distortion and fast-recovering time are required.
113

CHAPTER 5: FUTURE WORK

5.1. Integrated Circuit for Intravascular Ultrasound Radial Array

5.1.1. Introduction to Intravascular Ultrasound Radial Array
Cardiovascular disease is a prominent health problem. The detection and diagnosis
of the disease depends on the imaging techniques. Intravascular ultrasound imaging
(IVUS) has become one of standard imaging modalities since it can provide direct
visualization of the vessel wall. Two scanning methods for ultrasound imaging system are
widely used. The first method is a single-element ultrasonic transducer on a rotating shaft.
The fabrication of the transducer and imaging system is relatively easy, but the rotating
shaft can limit the frame rate of the imaging system.
The second method is radial array transducer with electronic scan. With an
electronic scan, the scanning speed is improved but this approach relies on the fabrication
of ultrasonic array transducer which is more difficult and more complicate circuit of the
ultrasound imaging system.
Due to the limited size of human coronary artery (2~4 mm of inner diameter), the
size of an intravascular ultrasound radial array will be down to 1.5 mm outer diameter
and the number of the cables inside the catheter are limited.
114

5.1.2. Architecture of Custom Integrated Circuit
The limited space and pin connections inside the IVUS catheter and chip package
make connecting 128 wires for 128 elements unrealizable. To solve this problem, we
propose to integrate 128-element array transducer with a custom chip. The custom chip
consists of eight numbers of 16 to 16 HV (High V oltage) analog switches and 128 to 4
HV multiplexer/de-multiplexer and control logic. HV switches and multiplexer/de-
multiplexer circuits with control logic circuit can control the transmission/reception of
signals to/from the array.
Tutwiler proposed the idea to select the transducers or power
amplifier/preamplifier from the “control” in a computer. However, we do not have
enough pin connections so that control logic should be designed inside the chip. Figure
5.1 shows that the control logic through “data input” generates the “address” and
“programmable signal” combination to control HV switches and HV multiplexer/de-
multiplexer in order to select each element of the transducers or receiving signals of the
receiver in one sequence at the same time.

Figure 5.1: Architecture of the radial array transducer and custom IC chip.
128 Channel
Radial Array
Transducer
Eight 16 to 16
HV Switches
Novel
Limiter-1
Preamplifier-1
Custom IC Chip
Power
Amplifier-1
Control Logic For HV Switches
Multiplexer/De-Multiplexer
Data
Input
One 128 to 4
HV Multiplexer/
De-Multiplexer
.
.
.
.
.
.
.
.
.
.
.
Ground
Novel
Limiter-4
T/R
Switch-4
Preamplifier-4
Power
Amplifier-4
.
T/R
Switch-1
.. . .
.
.
.
.
.
.
.
.
..
T1
T2
T127
T128
C1
C2
C4
C7
Supply
C3
115

Proposed cable length from the radial array transducer is 0.2 mm and area of the
transducer is 1.5 mm such that total pins of the connection need to be 7 pins and the pad
of custom IC chip should be enough size to cover the conductive lines in order to be
connected through cables. Except for 128 pin connections (T1,T2,…T128) between the
transducers and HV switches, there are only 7 pins needed for 1 data input (C1), supply
voltage (C2), ground (C3) and 4 output connections to the T/R switches (C4~C7). This
transducer array and custom IC chip assembly scheme will dramatically reduce the
number of cables needed for synthetic aperture imaging (Shung 2005; Karaman et al
1995)
The scheme for transmit and receive mode for the custom chip is illustrated in
Figure 5.2. For transmit scheme, one signal triggers four transducers through first T/R
switch and, then, another signal also triggers next four transducers at through second
switch until sixteen transducers will be triggered. For receive scheme, returned four
signals from four transducers goes to the output of the four T/R switches and then,
another returned four signals from next four transducers goes to the output of same four
T/R switches until 16 transducer will be returned.
116

Figure 5.2: Transmit and receive scheme for operation mechanism.

After multiplexer/de-multiplexer circuit, T/R switches and limiters would be also
needed to select transmitter/receiver signals. T/R switches and limiters also protect the
receiver from being damaged by the transmitting high voltage signals from the power
amplifiers.
High frequency array use thinner PZT materials: it is challenging to achieve good
sensitivity with only 70Vp-p to 80Vp-p excitation voltage. Therefore, minimizing the
insertion loss of the HV switches, multiplexer/de-multiplexer and T/R switches with
limiters for high frequency operation (>20MHz) needs to be addressed because insertion
loss and total noise performances of them are dominant for front-end receiver if the
passive network like multiplexer/de-multiplexer or T/R switches/limiters is followed by
preamplifier in the array system (Razavi 2003; Hara et al 2005). The novel
switches/limiters with custom IC chip will be used to reduce the insertion loss and
harmonic distortion for high frequency operation (Choi et al 2010).
Data
Input
Ground
T1
T2
C1
C2
C4
C7
Supply
C3
C5
C6
Transmit
Scheme
T3
T4
T14
T15
T16
T13
T5~T8
T9~T12
Data
Input
Ground
T1
T2
C1
C2
C4
C7
Supply
C3
C5
C6
Receive
Scheme
T3
T4
T14
T15
T16
T13
117

Another crucial issue is the insertion loss between the high frequency array
transducers and front-end receiver, which is caused by the loading of long cables (1.5~1.8
m). Solving this issue demands the front-end preamplifier to be directly attached to the
transducer through multiplexer/de-multiplexer and switches/limiter to reduce the
insertion loss. On the receiver side, the low noise pre-amplifier chains should compensate
the weak attenuated signals. The radial array transducers will be first bonded to the
flexible circuit and then, diced. After dicing, the custom IC chip will be connected to the
radial array transducers on the flexible circuit through electrical conductive cable lines.
After assembly, IC and array transducers in flexible circuit will be wrapped outside a thin
tube like cylindrical shape (Eberle et al 2011).

5.2. Enhanced Linearity Power Amplifier with a Expander
A high voltage short pulse signal is used to trigger the ultrasonic transducer to
increase the resolution of the transducer but Doppler imaging is used for continuous wave
to measure the velocity of the blood flow (Foster et al 1978; Molina et al 2005). For
continuous wave Doppler processing, the preamplifier needs to handle the signals with a
high dynamic range (Zhou et al 2007; Eberhard et al 2002). Linearity of the power
amplifier can affect the dynamic range such that improved dynamic range can enhance
the image resolution. There are pre- and post-distortion techniques to improve the
linearity of the amplifier (Wong et al 2000; Aparin et al 2005; Huang et al 2006; Sun et al
2009).

118

The pre-distortion technique can be used to improve the linearity of the amplifier by
adding non-linear elements before the power amplifier, but some of pre-distortion
linearization methods for the amplifier can add insertion loss and can deteriorate the
signal-to-noise ratio of the receiver (Wong et al., 2000).

Figure 5.3: Integrated preamplifier with pre-distortion linearizer.

The post-distortion linearization technique, which adds non-linear elements after the
amplifier, can improve the dynamic range of the power amplifier to maintain the
adequate signal-to-noise ratio, but this can reduce the power gain of the power amplifier
and post-distortion-linearization technique does not cause a problem for the amplifier
(Wong et al 2000). However, the matching with the next stage amplifier needs to be
considered to avoid performance degradation.

Figure 5.4: Integrated preamplifier with post-distortion linearizer.
Pre-distortion
linearizer
Power
Amplifier
Expander
Input
Output
Post-distortion
linearizer
Power
Amplifier
Expander
Input Output
119

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Abstract (if available)

Abstract This dissertation describes the development of a novel integrated preamplifier with a Sallen-Key Butterworth filter and novel bipolar transistor-based limiter for a high frequency ultrasonic transducer. First, the motivation for the integrated preamplifier results from the fact that the integrated preamplifier may reduce cable loss because the impedance matching with the high frequency transducer can affect the performance of the transducer due to cable loading effect. The design of an integrated circuit consisting of a preamplifier with the Sallen-Key Butterworth filter for a high frequency ultrasonic transducer will be presented. The This dissertation describes the development of a novel integrated preamplifier with a Sallen-Key Butterworth filter and novel bipolar transistor-based limiter for a high frequency ultrasonic transducer. First, the motivation for the integrated preamplifier results from the fact that the integrated preamplifier may reduce cable loss because the impedance matching with the high frequency transducer can affect the performance of the transducer due to cable loading effect. The design of an integrated circuit consisting of a preamplifier with the Sallen-Key Butterworth filter for a high frequency ultrasonic transducer will be presented. The front-end circuits consisting of integrated preamplifier with Sallen-Key Butterworth filter is usually interfacing with transducer and power amplifier such that the simulations and experiments with transducer and power amplifier is required to consider their effect to obtain proper performances. The simulation and experimental results of the integrated preamplifier and filter chain demonstrate the improved performances of pulse-echo response and wire-phantom imaging with a high frequency thick film (LiNbO3) transducer and thick film (PZT) array element transducer. The integrated preamplifier which had high frequency silicon germanium (SiGe) hetero-junction bipolar transistors (HBT's) was fabricated in an IBM 0.18 um bipolar complementary metal oxide semiconductor (BiCMOS) process. This implementation represents the first step in the eventual realization of a complete integrated high frequency receiving system. ❧ Second, high-frequency ultrasound imaging systems are not only dramatically affected by the electrical impedance mismatch between the transducer and the electronics but the attenuation caused by passive components of the protection devices and the system. These protection devices are used to protect the front-end circuits from the unexpected voltage signals induced by a transmitter. Therefore, to optimize the performances of the imaging system, there is a need to improve the design of these limiter circuits. These novel limiter circuits were analyzed with the small signal and large signal models of bipolar transistors. And, the improved performances of these limiters such as magnitude frequency responses, total harmonic distortions and total noise figures including preamplifiers were measured and compared with a commercial diode limiter. The capability of the novel limiters was also demonstrated through pulse-echo responses with a high frequency ultrasonic transducer. These new bipolar-transistor-based limiters may have applications for the high-frequency ultrasound imaging where both the bandwidth and signal to noise ratio are crucial.

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Asset Metadata

Creator Choi, Hojong (author)

Core Title Development of front-end circuits for high frequency ultrasound system

School Viterbi School of Engineering

Degree Doctor of Philosophy

Degree Program Electrical Engineering

Publication Date 04/06/2013

Defense Date 11/01/2011

Publisher University of Southern California (original), University of Southern California. Libraries (digital)

Tag front-end circuits,high frequency ultrasonic transducer,high frequency ultrasound system,OAI-PMH Harvest,preamplifier,ultrasonic transducer,ultrasound system

Language English

Contributor Electronically uploaded by the author (provenance)

Advisor Chen, Yong (committee member), Dapkus, Paul Daniel (committee member), Parker, Alice C. (committee member), Shung, Kirk Koping (committee member)

Creator Email hojongch@usc.edu,hojongchoi@yahoo.com

Permanent Link (DOI) https://doi.org/10.25549/usctheses-c3-3625

Unique identifier UC11288082

Identifier usctheses-c3-3625 (legacy record id)

Legacy Identifier etd-ChoiHojong-579.pdf

Dmrecord 3625

Document Type Dissertation

Rights Choi, Hojong

Type texts

Source University of Southern California (contributing entity), University of Southern California Dissertations and Theses (collection)

Access Conditions The author retains rights to his/her dissertation, thesis or other graduate work according to U.S. copyright law. Electronic access is being provided by the USC Libraries in agreement with the a...

Repository Name University of Southern California Digital Library

Repository Location USC Digital Library, University of Southern California, University Park Campus MC 2810, 3434 South Grand Avenue, 2nd Floor, Los Angeles, California 90089-2810, USA