Charge-mode analog IC design: a scalable, energy-efficient approach for designing analog circuits in ultra-deep sub-µm all-digital CMOS technologies 

Applications of all-optical wavelength shifting using semiconductor optical amplifiers for switching and routing functions in a dynamically reconfigurable wavelength-division-multiplexed fiber-op... 

Integrated multi-band and wideband reconfigurable wireless receivers 

Methods and protocols for detecting the intracellular assembly of elastin-like polypeptides 

Nano-engineered devices for display and analog computing 

Against reality: AI co-creation as a powerful new programming tool 

Fresnel beamforming for low-cost, portable ultrasound systems 

Formal methods for behavioral and system-level power optimization and synthesis. 

Demand based techniques to improve the energy efficiency of the execution units and the register file in general purpose graphics processing units 

Performant, scalable, and efficient deployment of network function virtualization 

Generalized network structure of transversal filter suitable for VLSI implementation 

The instructional media handbook: A systems approach 

Memristor device engineering and memristor-based analog computers for mobile robotics 

USC Computer Science Technical Reports, no. 604 (1995) 

etd-ZhangLequa-235.pdf 

High-frequency ultrasound imaging system with Doppler features for biomedical applications using 30~35 mHz linear arrays and an analog beamformer 

VLSI design of adaptive neural systems 

Engineered control of the CAR-T-tumor synapse using customized DNA linkers 

Adaptive execution: improving performance through the runtime adaptation of performance parameters 

Clustering techniques for coarse -grained, antifuse-based FPGAs 

CMOS mixed-signal charge-metering stimulus amplifier for biomimetic microelectronic systems 

Improving the speed-power-accuracy trade-off in low-power analog circuits by reverse back-body biasing 

Quantum computation in wireless networks 

From abacus to apple to ? 

Dynamic logic synthesis for reconfigurable hardware