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Improving the efficiency of conflict detection and contention management in hardware transactional memory systems
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A paralell algorithm for finding maximal cliques
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Mapping image algorithms onto window architecture
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Algorithms and architectures for high-performance IP lookup and packet classification engines
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Shape from shading: Models, algorithms and analysis
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Mapping/matching algorithms to reconfigurable mesh arrays
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Analysis of parallel efficiency of a domain decomposition technique
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Parallelization of interactive PDE solvers on shared-memory multiprocessors
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Parallel memory-based parsing on a marker-passing computer
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Performance optimization of scientific applications on emerging architectures
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Modeling, evaluation and design of serial-parallel manipulator systems
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Mapping algorithms to VLSI array processors
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Spread spectrum acquisition by serial sequential algorithms
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Compiler optimizations for architectures supporting superword-level parallelism
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Algorithms/applications/architectures of artificial neural nets
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Kronecker and array algebra for parallel image processing
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Efficient communication algorithms for parallel computing platforms
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Hardware techniques for efficient communication in transactional systems
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Algorithms for computing the 2-D arithmetic Fourier transform
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Parallel VLSI architectures of signal and communication processors
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A parallel marker-passing computer for knowledge processing
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Parallel concatenated code system employing Berlekamp's architecture
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Search, synthesis, and analysis for semiconductor device design
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Parallel Stap Benchmarks And Their Performance On The Ibm Sp2
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Distributed asynchronous implementation with stochastic delays of iterative algorithms
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