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Pulse Oximetry Failure Rates
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Parallel Stap Benchmarks And Their Performance On The Ibm Sp2
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Propofol Effects On Eeg And Levels Of Sedation
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A technical survey of embedded processors
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Optimum complementary bipolar process for silicon-germanium HBTs
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Platform-based design for mobile multimedia applications
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Area comparisons of FIFO queues using SRAM and DRAM memory cores
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Design tradeoffs in a packet-switched network on chip architecture
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A low-cost framework for processor functional verification
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A 1.2 V micropower CMOS active pixel sensor
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Stochastic modeling of a power-managed system: Construction and optimization
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Techniques for audiovisual data confidentiality, integrity and copyright protection
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Compiler optimizations for architectures supporting superword-level parallelism
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String matching architectures for network security on reconfigurable computers
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Approximation in the identification of second order degenerate distributed parameter systems
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Systematic design of the control path for high performance VLSI microprocessors.
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Quantitative pipeline optimizations for VLSI microprocessors
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Energy recovery techniques for CMOS microprocessor design
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Performance evaluation of branch prediction strategies in superscalar microprocessors.
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