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A logic partitioning framework and implementation optimizations for 3-dimensional integrated circuits
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Redundancy driven design of logic circuits for yield/area maximization in emerging technologies
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Designing efficient algorithms and developing suitable software tools to support logic synthesis of superconducting single flux quantum circuits
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Efficient techniques for sharing on-chip resources in CMPs
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Fault equivalence in logic networks
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Pseudo-Exhaustive Built-In Self-Test System For Logic Circuits
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The tri-partite nature of the soul in Plato's philosophy
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Accurate and efficient testing of resistive bridging faults
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Benchmarking interactive social networking actions
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Intelligent knowledge acquisition systems:  from descriptive to predictive models
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Conditions of belonging: life, historical preservation and tourism development in the making of Pelourinho-Maciel, Salvador da Bahia, 1965-1985
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On mass, collectives and pseudopartitives
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Radio localization techniques using ranked sequences
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The anxiety of interrupted kinship: Transpacific cultures of Korean historical trauma
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Techniques for de novo sequence assembly: algorithms and experimental results
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Applications of quantum error-correcting codes to quantum information processing
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On scheduling, timeliness and security in large scale distributed computing
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Demand based techniques to improve the energy efficiency of the execution units and the register file in general purpose graphics processing units
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Optimal redundancy design for CMOS and post‐CMOS technologies
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Innovative sequencing techniques elucidate gene regulatory evolution in Drosophila
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System-level synthesis techniques with emphasis on participating and design planning
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Roving emulation: Theory and analysis
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Wirability analysis circuits
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Switch level test generation for CMOS circuits
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