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Structural delay testing of latch-based high-speed circuits with time borrowing
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Automatic conversion from flip-flop to 3-phase latch-based designs
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An asynchronous resilient circuit template and automated design flow
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Clustering and fanout optimizations of asynchronous circuits
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Library characterization and static timing analysis of asynchornous circuits
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Redundancy driven design of logic circuits for yield/area maximization in emerging technologies
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Demonstrating the role of multiple memory mechanisms in learning patterns using neuromorphic circuits
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Power optimization of asynchronous pipelines using conditioning and reconditioning based on a three-valued logic model
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Architectures and integrated circuits for RF and mm-wave multiple-antenna systems on silicon
A knowledge based system for designing testable VLSI circuits
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Wirability analysis circuits
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Circuit level modeling and parameterization of integrated circuit structures
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Single event upset in silicon integrated circuits
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Optically powered monolithic optoelectronic devices and optoelectronic integrated circuit based smart pixels for parallel information processing and interconnection
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BSIM_plus: An advanced MOS transistor model for VLSI circuits
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Pseudo-Exhaustive Built-In Self-Test System For Logic Circuits
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A framework for soft error tolerant SRAM design
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Induced hierarchical verification of asynchronous circuits using a partial order technique
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Timing and power analysis of CMOS logic cells under noisy inputs
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Static timing analysis of GasP
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Low-power, dual sampling-rate, shared-architecture ADC for implantable biomedical systems
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Formal equivalence checking and logic re-synthesis for asynchronous VLSI designs
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Nanomaterials for macroelectronics and energy storage device
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Theory, implementations and applications of single-track designs
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Improving efficiency to advance resilient computing
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