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Clustering and fanout optimizations of asynchronous circuits
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Power efficient design of SRAM arrays and optimal design of signal and power distribution networks in VLSI circuits
Advanced cell design and reconfigurable circuits for single flux quantum technology
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Low power and reliability assessment techniques for advanced processor design
Average-case performance analysis and optimization of conditional asynchronous circuits
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Error-rate testing to improve yield for error tolerant applications
Logic synthesis for high performance and low power
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Stochastic models for testability analysis of digital circuits
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Pseudo-Exhaustive Built-In Self-Test System For Logic Circuits
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Fault equivalence in logic networks
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Accurate and efficient testing of resistive bridging faults
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Large-scale fault isolation in the Internet
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Timing-oriented approach for delay testing
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Optically powered monolithic optoelectronic devices and optoelectronic integrated circuit based smart pixels for parallel information processing and interconnection
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Fault diagnosis in digital circuits based on effect-cause analysis
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Automatic conversion from flip-flop to 3-phase latch-based designs
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A logic partitioning framework and implementation optimizations for 3-dimensional integrated circuits
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Thwarting adversaries with unpredictability: massive-scale game-theoretic algorithms for real-world security deployments
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Gated Multi-Level Domino: a high-speed, low power asynchronous circuit template
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Effects of non-uniform substrate temperature in high-performance integrated circuits: Modeling, analysis, and implications for signal integrity and interconnect performance optimization
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Power optimization of asynchronous pipelines using conditioning and reconditioning based on a three-valued logic model
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Disentangling the network: understanding the interplay of topology and dynamics in network analysis
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Efficient indexing and querying of geo-tagged mobile videos
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