Variation-aware circuit and chip level power optimization in digital VLSI systems 

Gated Multi-Level Domino: a high-speed, low power asynchronous circuit template 

Lifetime reliability studies for microprocessor chip architecture 

Power efficient design of SRAM arrays and optimal design of signal and power distribution networks in VLSI circuits 

A logic partitioning framework and implementation optimizations for 3-dimensional integrated circuits 

Stochastic dynamic power and thermal management techniques for multicore systems 

Dynamic packet fragmentation for increased virtual channel utilization and fault tolerance in on-chip routers 

Single photon emission characteristics of on-chip integrable ordered single quantum dots: towards scalable quantum optical circuits 

Redundancy driven design of logic circuits for yield/area maximization in emerging technologies 

Trustworthiness of integrated circuits: a new testing framework for hardware Trojans 

Synchronization and timing techniques based on statistical random sampling 

In-situ digital power measurement technique using circuit analysis 

Improving the speed-power-accuracy trade-off in low-power analog circuits by reverse back-body biasing 

Radiation hardened by design asynchronous framework 

CMOS mixed-signal charge-metering stimulus amplifier for biomimetic microelectronic systems 

Energy aware integrated circuits for communication and biomedical applications 

Design of low-power and resource-efficient on-chip networks 

A modular microscale laboratory 

Towards a cross-layer framework for wearout monitoring and mitigation 

Optimal redundancy design for CMOS and post‐CMOS technologies 

Performance improvement and power reduction techniques of on-chip networks 

Clustering and fanout optimizations of asynchronous circuits 

A biomimetic approach to non-linear signal processing in ultra low power analog circuits 

Thermal management in microprocessor chips and dynamic backlight control in liquid crystal diaplays 

An asynchronous resilient circuit template and automated design flow