Energy-efficient shutdown of circuit components and computing systems 

Low cost fault handling mechanisms for multicore and many-core systems 

Performance testing of data -path circuits 

Integration of technology-based design systems for VLSI circuits 

Pseudo-Exhaustive Built-In Self-Test System For Logic Circuits 

An integrated test controller synthesis system 

Testing on-chip and multiprocessor interconnection networks and switches 

Switch level test generation for CMOS circuits 

Intraocular and extraocular cameras for retinal prostheses: effects of foveation by means of visual prosthesis simulation 

Stochastic dynamic power and thermal management techniques for multicore systems 

Area efficient VLSI architectures for image computations 

Advanced test generation techniques: Improving yield and protecting intellectual property 

VIT-001730~0001.eps 

Fault tolerance for array processors 

Scan chaining and test scheduling in an integrated scan design system 

VSLI image compression 

QUALCOMM, Inc., Capabilities/Background. 

Floating-point unit design using Taylor-series expansion algorithms 

Testing techno-globalism: MITI and the internationalization of research programs 

High level design for yield via redundancy in low yield environments 

Silicon-based photonic crystal waveguides and couplers 

Correspondence and the QUALCOMM, INC., FIVE YEAR BUSINESS PLAN, October 1985 

Designing efficient algorithms and developing suitable software tools to support logic synthesis of superconducting single flux quantum circuits 

Depth inference and visual saliency detection from 2D images 

QUALCOMM, INC., Five Year Business Plan, October 1985