Improving the speed-power-accuracy trade-off in low-power analog circuits by reverse back-body biasing
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Designing efficient algorithms and developing suitable software tools to support logic synthesis of superconducting single flux quantum circuits
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Low -power circuit techniques for battery -powered DSP applications
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Modeling the reliability of highly scaled field-programmable gate arrays in ionizing radiation
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An analog edge detection chip and a digital neural multiprocessor chip for machine vision processing.
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Communication mechanisms for processing-in-memory systems
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Circuit design with nano electronic devices for biomimetic neuromorphic systems
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Towards a cross-layer framework for wearout monitoring and mitigation
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Extending the design space for networks on chip
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Improving the efficiency of conflict detection and contention management in hardware transactional memory systems
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A thermal management design for system -on -chip circuits and advanced computer systems
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USC Computer Science Technical Reports, no. 960 (2015)
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A technical survey of embedded processors
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Nonuniform sampling and digital signal processing for analog-to-digital conversion
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Mapping sparse matrix scientific applications onto FPGA-augmented reconfigurable supercomputers
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A logic partitioning framework and implementation optimizations for 3-dimensional integrated circuits
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Design Of Smart Pixel Interfaces For Optical Page-Oriented Memories
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Multi-gigabit/second parallel fiber -optic ring network for multimedia applications
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Plasticity in CMOS neuromorphic circuits
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Modeling and mapping for dynamically reconfigurable hybrid architectures
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An efficient design space exploration for balance between computation and memory
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Optoelectronic enhancements to single instruction multiple data processing architectures
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Microsoft Word - $ASQ117920_supp_undefined_36A1D492-099D-11E1-858F-A02A9E1A67F9.docx
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