Page 1 |
Save page Remove page | Previous | 1 of 143 | Next |
|
small (250x250 max)
medium (500x500 max)
Large (1000x1000 max)
Extra Large
large ( > 500x500)
Full Resolution
All (PDF)
|
This page
All
|
IMPROVING THE EFFICIENCY OF CONFLICT DETECTION
AND CONTENTION MANAGEMENT
IN HARDWARE TRANSACTONAL MEMORY SYSTEMS
by
Woojin Choi
______________________________________________________________
A Dissertation Presented to the
FACULTY OF THE USC GRADUATE SCHOOL
UNIVERSITY OF SOUTHERN CALIFORNIA
In Partial Fulfillment of the
Requirements for the Degree
DOCTOR OF PHILOSOPHY
(COMPUTER ENGINEERING)
December 2012
Copyright 2012 Woojin Choi
Object Description
| Title | Improving the efficiency of conflict detection and contention management in hardware transactional memory systems |
| Author | Choi, Woojin |
| Author email | woojinch@usc.edu;woojinch1732@gmail.com |
| Degree | Doctor of Philosophy |
| Document type | Dissertation |
| Degree program | Computer Engineering |
| School | Viterbi School of Engineering |
| Date defended/completed | 2012-08-29 |
| Date submitted | 2012-11-12 |
| Date approved | 2012-11-12 |
| Restricted until | 2012-11-12 |
| Date published | 2012-11-12 |
| Advisor (committee chair) | Draper, Jeffrey |
| Advisor (committee member) |
Annavaram, Murali Nakano, Aiichiro |
| Abstract | Chip Multiprocessors (CMPs) are becoming the mainstream due to the physical power limits of process technology. In this parallel era, software applications no longer automatically benefit from improvements in processor performance as they did in past decades. The benefit of CMPs can only be realized by environments that enable efficient creation of parallel applications. ❧ Transactional Memory (TM) is a promising paradigm that aims to simplify parallel programming by providing a programmer-friendly alternative to traditional lock-based synchronization. With TM, programmers just focus on the correctness of their parallel programs by composing applications in units of a transaction, a block of codes that execute atomically and in isolation. The underlying TM system is responsible for enforcing atomicity and extracting performance. By decoupling correctness and performance, TM can make parallel programming much easier and enable better programmer productivity than lock primitives. ❧ TM systems attempt to harvest high performance by executing multiple transactions in parallel. In TM systems, a conflict occurs when a memory block is accessed concurrently by two or more transactions and at least one of them is a write access. Detecting conflicts is critical to the correctness as well as performance of TM systems. In this dissertation, we propose two conflict detection mechanisms, adaptive-grain signatures and unified signatures to improve the efficiency of conflict detection. ❧ Observing that some false positives can be helpful to performance by triggering the early abortion of a transaction which would encounter a true conflict later anyway, we propose an adaptive grain signature to improve performance by dynamically changing the range of address keys based on the history. With the use of adaptive grain signatures, we can increase the number of performance-friendly false positives as well as decrease the number of performance-destructive false positives. ❧ Instead of using separate read- and write-signatures, as is often done in TM systems, we implement a single signature, a unified signature, to track all read- and write-accesses. By merging read- and write-signatures, a unified signature can effectively enlarge the signature coverage without additional overhead. Within the constraints of a given hardware budget, a TM system with a unified signature outperforms a baseline system with the same-sized traditional signatures by reducing the number of falsely detected conflicts. Even though the unified signature scheme incurs read-read dependencies, we show that these false dependencies do not negate the benefit of unified signatures and can effectively be filtered out. A TM system with a 2K-bit unified signature with helper signature scheme achieves speedups of 15% over baseline TM with 33% less area and 49% less power. ❧ How to resolve or prevent the conflicts, or contention management is another building block of TM systems that significantly impacts TM performance. Traditionally, critical sections or transactions have been treated to execute in any order with no weights as long as the atomicity can be maintained. We have observed that some transactions are more important than others with respect to the performance based on the implemented algorithm. Based on this observation, we propose a mileage technique, a software/hardware cooperative approach with new instructions and a new functional unit to exploit performance-criticality among transactions. We propose Mileage-based contention management and can achieve average speedups of 15% over baseline contention management. |
| Keyword | parallel processors; transactional memory; conflict detection; contention management |
| Language | English |
| Part of collection | University of Southern California dissertations and theses |
| Publisher (of the original version) | University of Southern California |
| Place of publication (of the original version) | Los Angeles, California |
| Publisher (of the digital version) | University of Southern California. Libraries |
| Provenance | Electronically uploaded by the author |
| Type | texts |
| Legacy record ID | usctheses-m |
| Contributing entity | University of Southern California |
| Rights | Choi, Woojin |
| Physical access | The author retains rights to his/her dissertation, thesis or other graduate work according to U.S. copyright law. Electronic access is being provided by the USC Libraries in agreement with the author, as the original true and official version of the work, but does not grant the reader permission to use the work if the desired use is covered by copyright. It is the author, as rights holder, who must provide use permission if such use is covered by copyright. The original signature page accompanying the original submission of the work to the USC Libraries is retained by the USC Libraries and a copy of it may be obtained by authorized requesters contacting the repository e-mail address given. |
| Repository name | University of Southern California Digital Library |
| Repository address | USC Digital Library, University of Southern California, University Park Campus MC 7002, 106 University Village, Los Angeles, California 90089-7002, USA |
| Repository email | cisadmin@dots.usc.edu |
| Archival file | uscthesesreloadpub_Volume4/etd-ChoiWoojin-1286.pdf |
Description
| Title | Page 1 |
| Contributing entity | University of Southern California |
| Repository email | cisadmin@dots.usc.edu |
| Full text | IMPROVING THE EFFICIENCY OF CONFLICT DETECTION AND CONTENTION MANAGEMENT IN HARDWARE TRANSACTONAL MEMORY SYSTEMS by Woojin Choi ______________________________________________________________ A Dissertation Presented to the FACULTY OF THE USC GRADUATE SCHOOL UNIVERSITY OF SOUTHERN CALIFORNIA In Partial Fulfillment of the Requirements for the Degree DOCTOR OF PHILOSOPHY (COMPUTER ENGINEERING) December 2012 Copyright 2012 Woojin Choi |
