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LIBRARY CHARACTERIZATION AND STATIC TIMING ANALYSIS
OF ASYNCHRONOUS CIRCUITS
by
Mallika Prakash
A Thesis Presented to the
FACULTY OF THE USC VITERBI SCHOOL OF ENGINEERING
UNIVERISTY OF SOUTHERN CALIFORNIA
In Partial Fulfillment of the
Requirements for the Degree
MASTER OF SCIENCE
(COMPUTER ENGINEERING)
December 2007
Copyright 2007 Mallika Prakash
Object Description
| Title | Library characterization and static timing analysis of asynchornous circuits |
| Author | Prakash, Mallika |
| Author email | mallikap@usc.edu |
| Degree | Master of Science |
| Document type | Thesis |
| Degree program | Computer Engineering |
| School | Viterbi School of Engineering |
| Date defended/completed | 2007-10-29 |
| Date submitted | 2007 |
| Restricted until | Unrestricted |
| Date published | 2007-12-10 |
| Advisor (committee chair) | Beerel, Peter A. |
| Advisor (committee member) |
Pedram, Massoud Breuer, Melvin A. |
| Abstract | For main stream acceptance of asynchronous circuits, a mature EDA tool flow is necessary that leverages off commercially available libraries and tools for synchronous circuits. Many asynchronous templates however rely on specialized and complex circuits that are not present in commercial libraries. For such templates, designers either technology map these cells to existing libraries at the cost of area and performance or rely on full-custom design and extensive SPICE simulation to verity timing correctness and performance. This thesis addresses both of these issues by developing both library characterization and static timing analysis flows for nonstandard asynchronous circuit templates that together support back-annotated power and timing simulations as well as static timing and performance verification. We first create a fully-automated characterization flow for the static single-track full-buffers template. We then develop a fully-automated static-timing flow for timing and performance verification using the gold-standard commercial tool, Synopsys PrimeTime. The proposed flow is successfully demonstrated on three different asynchronous design styles. |
| Keyword | asynchornous circuits; library characterization; static timing analysis |
| Language | English |
| Part of collection | University of Southern California dissertations and theses |
| Publisher (of the original version) | University of Southern California |
| Place of publication (of the original version) | Los Angeles, California |
| Publisher (of the digital version) | University of Southern California. Libraries |
| Type | texts |
| Legacy record ID | usctheses-m974 |
| Contributing entity | University of Southern California |
| Rights | Prakash, Mallika |
| Repository name | Libraries, University of Southern California |
| Repository address | Los Angeles, California |
| Repository email | cisadmin@dots.usc.edu |
| Filename | etd-Prakash-20071210 |
| Archival file | uscthesesreloadpub_Volume44/etd-Prakash-20071210.pdf |
Description
| Title | Page 1 |
| Contributing entity | University of Southern California |
| Repository email | cisadmin@dots.usc.edu |
| Full text | LIBRARY CHARACTERIZATION AND STATIC TIMING ANALYSIS OF ASYNCHRONOUS CIRCUITS by Mallika Prakash A Thesis Presented to the FACULTY OF THE USC VITERBI SCHOOL OF ENGINEERING UNIVERISTY OF SOUTHERN CALIFORNIA In Partial Fulfillment of the Requirements for the Degree MASTER OF SCIENCE (COMPUTER ENGINEERING) December 2007 Copyright 2007 Mallika Prakash |
