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ERROR TOLERANCE APPROACH FOR SIMILARITY SEARCH
PROBLEMS
by
Hye-Yeon Cheong
A Dissertation Presented to the
FACULTY OF THE USC GRADUATE SCHOOL
UNIVERSITY OF SOUTHERN CALIFORNIA
In Partial Fulfillment of the
Requirements for the Degree
DOCTOR OF PHILOSOPHY
(ELECTRICAL ENGINEERING)
May 2011
Copyright 2011 Hye-Yeon Cheong
Object Description
| Title | Error tolerance approach for similarity search problems |
| Author | Cheong, Hye-Yeon |
| Author email | hyeyeon.cheong@gmail.com; hyeyeonc@usc.edu |
| Degree | Doctor of Philosophy |
| Document type | Dissertation |
| Degree program | Electrical Engineering (Multimedia & Creative Technology) |
| School | Viterbi School of Engineering |
| Date defended/completed | 2010-06-09 |
| Date submitted | 2011 |
| Restricted until | Unrestricted |
| Date published | 2011-02-03 |
| Advisor (committee chair) | Ortega, Antonio |
| Advisor (committee member) |
Gupta, Sandeep K. Shahabi, Cyrus |
| Abstract | As the system complexity increases and VLSI chip circuit becomes more highly condensed and integrated towards nano-scale, the requirement of 100% exact execution of designed operations and correctness for all transistors and interconnects is prohibitively expensive, if not impossible, to meet in practice. To deal with these problems, defect tolerance (DT) and fault tolerance (FT) techniques at the design and manufacturing stages have been widely studied and practiced. FT and DT techniques ideally try to mask all effects of faults and internal errors by exploiting and managing redundancies, which leads to more complex and costly system to achieve hopefully ideal or at least acceptable output quality at the expense of additional complexity cost.; On the other hand, a recently introduced error tolerance (ET) approach is an exercise of designing and testing systems cost-effectively by exploiting the advantages of a controlled relaxation of system level output quality precision requirement. The basic theme of ET approach is to allow erroneous output leading to imperceptible degree of system level quality degradation in order to simplify and optimize the circuit size and complexity, power consumption, costs as well as chip manufacturing yield rate. Motivation of ET approach is two-fold: By exploiting certain range of distortions/errors which lead to negligible impact on system level performance, i) a significant portion of manufactured dies with such minor imperfection of physical origin can be saved, thus increasing overall effective yield, and ii) considerable circuit simplification and high power efficiency is attainable by systematically and purposefully introducing such distortions/errors.; With a primary focus on similarity search problem within the scope of this ET concept, this thesis presents several methodologies to deal with the problems of system complexity and high vulnerability to hardware defects and fabrication process variability and consequently a lower yield rate.; Many real world similarity search problems present serious computational burden and remain a long standing challenge as they involve high dimensional search space, often largely varying database, and increasingly more dynamic and user-interactive search metrics. This leads to complexity (response time, circuit/power complexity) becoming more important criterion for a successful design. Thus, great potential benefit of ET concept can be reaped in such area.; First part of this thesis studies similarity search problem and presents a novel methodology, called quantization based nearest-neighbor-preserving metric approximation algorithm(QNNM), which leads to significant complexity reduction in search metric computation. Proposed algorithm exploits four observations: homogeneity of viewpoint property, concentration of extreme value distribution, NN-preserving not distance-preserving criterion, fixed query info during search process. Based on these, QNNM approximates original/benchmark metric by applying query-dependent non-uniform quantization directly on the dataset, which is designed to minimize the average NNS error, while achieving significantly lower complexity, e.g., typically 1-bit quantizer. We show how the optimal query adaptive quantizers minimizing NNS error can be designed "off-line" without prior knowledge of the query information to avoid the on-line overhead complexity and present an efficient and specifically tailored off-line optimization algorithm to find such optimal quantizer.; Three distinguishing characteristics of QNNM are statistical modeling of dataset, employing quantization within a metric, and query-adaptive metric, all of which allow QNNM to improve performance complexity trade-off significantly and provide robust result especially when the problem involves non-predefined or largely varying data set or metric function due to its intrinsic flexibility from query to query change.; With motion estimation (ME) application, QNNM with coarsest 1-bit quantizer per pixel (note that a quantizer for each pixel is different to exploit the correlation of input distribution) results in on average 0.01dB performance loss while reducing more than 70% to 98% metric computation cost.; Second part of the thesis, we present a complete analysis of the effect of inter-connect faults in NNS metric computation circuit. We provided a model to capture the effect of any fault (or combination of multiple faults) on the matching metric. We then describe how these errors in metric computation lead to errors in the matching process. Our motivation was twofold. First, we used this analysis to predict the behavior of NNS algorithms and MMC architectures in the presence of faults. Second, this analysis is a required step towards developing efficient ET based acceptability decision strategies and can be used to simplify fault space, separate acceptable/unacceptable faults, and consequently simplify testing. Based on this model, we investigated the error tolerance behavior of NNS process in the presence of multiple hardware faults from both algorithmic and hardware architecture point of views by defining the characteristics of the search algorithm and hardware architecture that lead to increased error tolerance.; With ME application, our simulation showed that search algorithms satisfying error tolerant characteristics we defined perform up to 2.5dB higher than other search methods in the presence of fault, and they also exhibit significant complexity reduction (more than 99%) without having to compromise with the performance. Our simulation also showed that if error tolerant hardware architecture is used, the expected error due to a fault can be reduced by more than 95% and more than 99.2% of fault locations within matching metric computation circuits result in less than 0.01dB performance degradation.; Throughout this thesis, motion estimation process for video coding and vector quantization for image coding are tested as example applications to numerically evaluate and verify our proposed algorithms and modeling in actual practical application setting. |
| Keyword | nearest neighbor search; similarity search; approximation algorithm; error tolerance; QNNM; motion estimation; vector quantization; multiple faults modeling |
| Language | English |
| Part of collection | University of Southern California dissertations and theses |
| Publisher (of the original version) | University of Southern California |
| Place of publication (of the original version) | Los Angeles, California |
| Publisher (of the digital version) | University of Southern California. Libraries |
| Provenance | Electronically uploaded by the author |
| Type | texts |
| Legacy record ID | usctheses-m3639 |
| Contributing entity | University of Southern California |
| Rights | Cheong, Hye-Yeon |
| Repository name | Libraries, University of Southern California |
| Repository address | Los Angeles, California |
| Repository email | cisadmin@dots.usc.edu |
| Filename | etd-Cheong-4320 |
| Archival file | uscthesesreloadpub_Volume29/etd-Cheong-4320.pdf |
Description
| Title | Page 1 |
| Contributing entity | University of Southern California |
| Repository email | cisadmin@dots.usc.edu |
| Full text | ERROR TOLERANCE APPROACH FOR SIMILARITY SEARCH PROBLEMS by Hye-Yeon Cheong A Dissertation Presented to the FACULTY OF THE USC GRADUATE SCHOOL UNIVERSITY OF SOUTHERN CALIFORNIA In Partial Fulfillment of the Requirements for the Degree DOCTOR OF PHILOSOPHY (ELECTRICAL ENGINEERING) May 2011 Copyright 2011 Hye-Yeon Cheong |
